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* intel/blorp: Add swizzle support for all hardwareJason Ekstrand2018-05-092-1/+69
| | | | | | | This commit makes blorp capable of swizzling anything even on hardware that doesn't support texture swizzle. Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/isl: Add a helper for inverting swizzlesJason Ekstrand2018-05-092-0/+32
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/isl: Add a helper for composing swizzlesJason Ekstrand2018-05-092-0/+38
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* intel/isl: Add an isl_swizzle_supports_rendering helperJason Ekstrand2018-05-093-32/+71
| | | | | | | This helper encodes more details, specifically about Haswell, than the previous asserts in isl_surface_state.c. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/surface_state: Use an identity swizzle pre-HaswellJason Ekstrand2018-05-091-0/+6
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* blorp: Handle the RGB workaround more like other workaroundsJason Ekstrand2018-05-091-30/+30
| | | | | | | | | | | | | The previous version was sort-of strapped on in that it just adjusted the blit rectangle and trusted in the fact that we would use texelFetch and round to the nearest integer to ensure that the component positions matched. This new version, while slightly more complicated, is more accurate because all three components end up with exactly the same dst_pos and so they will get interpolated and sampled at the same texture coordinate. This makes the workaround suitable for using with scaled blits. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: silence unused variableLionel Landwerlin2018-05-091-1/+0
| | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: 2dc29e095f9da ("i965: Don't leak blorp on Gen4-5.") Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* intel: devinfo: silence coverity warningLionel Landwerlin2018-05-091-0/+1
| | | | | | | | It's just not possible to have a device with no subslices. CID: 1433511 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* dri3: Only update number of back buffers in loader_dri3_get_buffersMichel Dänzer2018-05-091-8/+11
| | | | | | | | | | | | | | And only free no longer needed back buffers there as well. We want to stick to the same back buffer throughout a frame, otherwise we can run into various issues. Bugzilla: https://bugs.freedesktop.org/105906 Bugzilla: https://bugs.freedesktop.org/106399 Fixes: 3160cb86aa92 "egl/x11: Re-allocate buffers if format is suboptimal" Reported-by: Sergii Romantsov <[email protected]> Tested-by: Eero Tamminen <[email protected]> Acked-by: Daniel Stone <[email protected]>
* anv: ignore pColorBlendState if all color attachments of the subpass are unusedSamuel Iglesias Gonsálvez2018-05-092-3/+13
| | | | | | | | | | | | | | | | | | | According to Vulkan spec: "pColorBlendState is a pointer to an instance of the VkPipelineColorBlendStateCreateInfo structure, and is ignored if the pipeline has rasterization disabled or if the subpass of the render pass the pipeline is created against does not use any color attachments." Fixes tests from CL#2505: dEQP-VK.renderpass.*.simple.color_unused_omit_blend_state v2: - Check that blend is not NULL before usage. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* mesa: remove hard-coded OpenGL 3.2 compat limitTimothy Arceri2018-05-091-8/+0
| | | | | | | | Just let validate_context_version() do it instead. This fixes MESA_GL_VERSION_OVERRIDE for compat, it will also allow us to enable new compat versions on a per driver bases in future. Reviewed-by: Marek Olšák <[email protected]>
* mesa: add GLSLVersionCompat constantTimothy Arceri2018-05-095-3/+10
| | | | | | | | This allows drivers to define what version of GLSL they support in compat. This will be needed in order to support compat 3.2 without breaking drivers that wont support it. Reviewed-by: Marek Olšák <[email protected]>
* mesa: dont call _mesa_override_glsl_version() in _mesa_init_constants()Timothy Arceri2018-05-091-3/+0
| | | | | | | | All drivers that support GLSL will later set their default GLSL versions overriding this override call. They currently all call _mesa_override_glsl_version() again later in order to support overrides. Reviewed-by: Marek Olšák <[email protected]>
* mesa: dont set GLSLVersion in _mesa_init_constants()Timothy Arceri2018-05-091-1/+0
| | | | | | | Just leave it as 0 and let the drivers set it (as they already do) to avoid redundantly initialising it. Reviewed-by: Marek Olšák <[email protected]>
* pipe-loader: Free driver_name in error pathJan Vesely2018-05-081-0/+1
| | | | | | CC: <[email protected]> Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* glsl: change ast_type_qualifier bitset size to work around GCC 5.4 bugBrian Paul2018-05-081-1/+7
| | | | | | | | | | | | | | | Change the size of the bitset from 128 bits to 96. This works around an apparent GCC 5.4 bug in which bad SSE code is generated, leading to a crash in ast_type_qualifier::validate_in_qualifier() (ast_type.cpp:654). This can be repro'd with the Piglit test tests/spec/glsl-1.50/execution/ varying-struct-basic-gs-fs.shader_test Bugzilla:https://bugs.freedesktop.org/show_bug.cgi?id=105497 Cc: [email protected] Reviewed-by: Charmaine Lee <[email protected]> Tested-by: Charmaine Lee <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Dump validation list on INTEL_DEBUG=bat,submit.Kenneth Graunke2018-05-081-1/+3
| | | | | | | | | | This is really useful when debugging any sort of buffer management issues, so just printing it during INTEL_DEBUG=bat,submit seems reasonable. With bat, we're already spamming so much output that it doesn't really hurt. With submit, it's still easy to grep for the older information, and the new information is nice too. Reviewed-by: Scott D Phillips <[email protected]>
* i965/miptree: Remove redundant fields from intel_miptree_aux_bufferJason Ekstrand2018-05-082-37/+7
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Simplify brw_emit_depthbuffer and brw_emit_depth_stencil_hizJason Ekstrand2018-05-081-81/+26
| | | | | | | | Now that we're using ISL, a good chunk of brw_emit_depthstencil is pointless checks which ISL will do for us anyway. Since we only have one manual depth buffer emit function, move the useful bits into it. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move brw_emit_depth_stencil_hiz higher up in the fileJason Ekstrand2018-05-081-50/+40
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use ISL for emitting depth/stencil/hiz state on gen6+Jason Ekstrand2018-05-089-671/+129
| | | | | | | | | | | | | | We leave gen4-5 alone because the ISL code hasn't really been well- tested on gen4-5 or with combined depth-stencil because we don't use BLORP for depth operations on gen4-5. Also, the gen4-5 code has to deal with intratile offsets for LOD hacks and ISL doesn't handle those yet. We could make ISL handle gen4-5 capable or we could just not bother. Among other things, this should make future platform enabling easier because it means we don't have to update multiple (or hand-rolled!) depth stencil emit paths. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use the brw_depthbuffer atom on all gensJason Ekstrand2018-05-084-17/+4
| | | | | | | | | | The only reason why we had two atoms was that the one we used for gen7+ depended on _NEW_DEPTH and _NEW_STENCIL as well as _NEW_BUFFERS. Since this is no longer true, we can combine them into one atom. We do add a dependence on BRW_NEW_AUX_STATE but that should never get set on gen4-5 so adding it is a no-op for those platforms. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Always set depth/stencil write enables on gen7+Jason Ekstrand2018-05-082-11/+6
| | | | | | | | | The hardware will AND these fields with the corresponding fields in DEPTH_STENCIL_STATE so there's no real reason to toggle them on and off based on state bits. This removes our reliance on the _NEW_DEPTH and _NEW_STENCIL state bits and better matches what ISL does. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Re-order depth/stencil/hiz/clear packets to match ISLJason Ekstrand2018-05-083-47/+47
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Re-emit depth/stencil/hiz on BRW_NEW_AUX_STATEJason Ekstrand2018-05-081-1/+2
| | | | | | | | | | Certain things can change the aux usage or fast clear color of a depth surface and we want to re-emit if that happens. For instance, if you do a fast depth clear of an already clear depth surface, we will just set the clear color and not do anything else. In that case, we could fail to re-emit 3DSTATE_CLEAR_PARAMS and not get the new fast-clear color. Reviewed-by: Kenneth Graunke <[email protected]>
* intel: devinfo: fix assertion on devices with odd number of EUsLionel Landwerlin2018-05-081-5/+1
| | | | | | | | | | | | I forgot to change the assert in the second helper function in a previous change. This hit the assert() on a Broadwell platform with 1 slice, 3 subslices but all EUs disabled in subslice 1 & 2. Fixes: c1900f5b0fb ("intel: devinfo: add helper functions to fill fusing masks values") Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* vulkan/wsi: Only use LINEAR modifier for prime if supported.Bas Nieuwenhuizen2018-05-083-2/+5
| | | | | | | | | | | | This was setting the LINEAR modifier if neither the X server nor the driver supported modifiers. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106180 Fixes: c80c08e226 "vulkan/wsi/x11: Add support for DRI3 v1.2" CC: 18.1 <[email protected]> Tested-by: Abel Garcia Dorta <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* eg/compute: Drop reference to kernel_param bo in destructorJan Vesely2018-05-081-0/+1
| | | | | | CC: <[email protected]> Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600: Cleanup constant buffers on context destructionJan Vesely2018-05-081-1/+5
| | | | | | CC: <[email protected]> Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/formatquery: remove online compression check on is_resource_supportedAlejandro Piñeiro2018-05-081-2/+1
| | | | | | | | | | | | | | | is_resource_supported returns if the combination of target/internalformat is supported in at least one operation. Online compression is only mandatory for glTexImage2D. Some formats doesn't support online compression, but can be used in any case, with glCompressed*D methods. Without this commit, ETC2 internalformats were returning FALSE, even for the drivers supporting it. So any other query (like TEXTURE_COMPRESSED) was returning FALSE/NONE instead of the proper value. Reviewed-by: Marek Olšák <[email protected]>
* intel/genxml: Assert that genxml field start and ends are sane.Kenneth Graunke2018-05-071-0/+7
| | | | | | | | | Chris recently fixed a bunch of genxml end < start bugs, as well as booleans that are wider than a bit. These are way too easy to write, so asserting that the fields are sane is a good plan. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* intel/genxml: Fix some more fake booleans in genxml.Kenneth Graunke2018-05-075-11/+11
| | | | | | | | | None of these are actually booleans. Tile Parameter is a tiling mode enum. Display pipes take plane numbers. Predicate Enable has some operations (and the default value of 6 was particular bogus). Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Make assert in gen_pack_header print a message.Kenneth Graunke2018-05-071-1/+1
| | | | | | | | | | Python's assert can take both a condition and a string, which will cause it to print the string if the assertion trips. (You can't use parens as that creates a tuple.) Doing "condition and string" works in C, but doesn't have the desired effect in Python. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Don't leak blorp on Gen4-5.Kenneth Graunke2018-05-071-2/+1
| | | | | | | | We used to only initialize BLORP on Gen6+. When we added it on Gen4-5, we forgot to destroy it unconditionally. Fixes: 752d7af77a52898cebf5597def4fdd38b1d6303e (i965: Add blorp support for gen4-5) Reviewed-by: Matt Turner <[email protected]>
* nir: Transform discard_if(true) into discardMatt Turner2018-05-071-1/+16
| | | | | | | | | | | | | | | | Noticed while reviewing Tim Arceri's NIR inlining series. Without his series: instructions in affected programs: 16 -> 14 (-12.50%) helped: 2 With his series: instructions in affected programs: 196 -> 174 (-11.22%) helped: 22 Reviewed-by: Jason Ekstrand <[email protected]>
* eg/compute: Drop reference on code_bo in destructor.Jan Vesely2018-05-071-3/+1
| | | | | Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* anv: remove unused field anv_queue::poolScott D Phillips2018-05-072-3/+0
| | | | | | | The last use of the field was removed in 2015's ("48a87f4ba06 anv/queue: Get rid of the serial") Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Set initial kflags on BO creation.Kenneth Graunke2018-05-071-6/+11
| | | | | | | | | | | | | This simplifies kflag initialization, by creating a bufmgr-wide setting for initial kflags, and just applying it whenever we create a new BO. This also properly allows 48-bit addresses for imported BOs (via prime or flink), which I had missed in my earlier 48-bit support series. This will be useful when adding softpin support, as we'll want to add EXEC_OBJECT_PINNED to initial_kflags as well. Reviewed-by: Chris Wilson <[email protected]>
* intel/genxml: Fix a few invalid field widthsChris Wilson2018-05-076-28/+28
| | | | | | | | | | A couple of typos found by inspecting field.end - field.start, revealed a few wide integers declared as bool and some that ended before they started. Cc: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* swr/rast: Fix include for createInstructionCombiningPass with llvm-7.0.Vinson Lee2018-05-051-0/+1
| | | | | | | | | | | | | | | Fix build error after llvm-7.0.0svn r330669 ("InstCombine: Fix layering by not including Scalar.h in InstCombine"). CXX rasterizer/jitter/libmesaswr_la-blend_jit.lo rasterizer/jitter/blend_jit.cpp:816:20: error: use of undeclared identifier 'createInstructionCombiningPass'; did you mean 'createInstructionSimplifierPass'? passes.add(createInstructionCombiningPass()); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ createInstructionSimplifierPass Suggested-by: George Kyriazis <[email protected]> Signed-off-by: Vinson Lee <[email protected]> Reviewed-By: George Kyriazis <[email protected]>
* clover: Add explicit virtual destructor to argument classJan Vesely2018-05-051-0/+1
| | | | | | | | | | It is needed to destroy the v vector in scalar_argument Fixes memory leaks on parameter set/bind. v2: Drop redundant sclara_argument destructor Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* anv/device: expose shaderInt16 support in gen8+Iago Toral Quiroga2018-05-051-1/+1
| | | | | | | | This rollbacks the revert of this patch introduced with commit 7cf284f18e6774c810ed6db17b98e597bf96f8a5. Tested-by: Mark Janes <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compiler: handle conversion to smaller type in the lowering pass for thatIago Toral Quiroga2018-05-052-12/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This rollbacks the revert of this same patch introduced in commit 7b9c15628aae8729118b648f5f473e6ac926b99b. And also squahes the following patch to prevent a piglit regression caused by this change: intel/compiler: Fix lower_conversions for 8-bit types. Author: Jose Maria Casanova Crespo <[email protected]> For 8-bit types the execution type is word. A byte raw MOV has 16-bit execution type and 8-bit destination and it shouldn't be considered a conversion case. So there is no need to change alignment and enter in lower_conversions for these instructions. Fixes a regresion in the piglit test "glsl-fs-shader-stencil-export" that is introduced with this patch from the Vulkan shaderInt16 series: 'i965/compiler: handle conversion to smaller type in the lowering pass for that'. The problem is caused because there is already a case in the driver that injects Byte instructions like this: mov(8) g127<1>UB g2<32,8,4>UB And the aforementioned pass was not accounting for the special handling of the execution size of Byte instructions. This patch fixes this. v2: (Jason Ekstrand) - Simplify is_byte_raw_mov, include reference to PRM and not consider B <-> UB conversions as raw movs. v3: (Matt Turner) - Indentation style fixes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106393 Tested-by: Mark Janes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/compiler: handle 16-bit to 64-bit conversions in BSW platformsIago Toral Quiroga2018-05-051-4/+4
| | | | | | | | | | | | | | | | | These are subject to the general restriction that anything that is converted to 64-bit needs to be aligned to 64-bit. We had this already in place for 32-bit to 64-bit conversions, so this patch generalizes the implementation to take effect on any conversion to 64-bit from a source smaller than 64-bit. Fixes assembly validation errors in the following CTS tests in BSW: dEQP-VK.spirv_assembly.instruction.compute.sconvert.int16_to_int64 dEQP-VK.spirv_assembly.instruction.compute.uconvert.uint16_to_uint64 dEQP-VK.spirv_assembly.instruction.compute.sconvert.int16_to_uint64 Tested-by: Mark Janes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: recognize 0x, 0o and 0b when setting default valueCaio Marcelo de Oliveira Filho2018-05-041-1/+2
| | | | | | | | | | | | | Remove the need of converting values that are documented in hexadecimal. This patch would allow writing <field name="3D Command Sub Opcode" ... default="0x1B"/> instead of <field name="3D Command Sub Opcode" ... default="27"/> Reviewed-by: Lionel Landwerlin <[email protected]>
* r200: Enable NV_fog_distanceIan Romanick2018-05-041-0/+1
| | | | | | | With the previous fixes in place, it appears to just work. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Enable NV_fog_distanceIan Romanick2018-05-041-0/+1
| | | | | | | With the previous fixes in place, it appears to just work. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* ffvertex: Don't try to read output registers in fog calculationIan Romanick2018-05-041-4/+6
| | | | | | | | | Gallium drivers use _mesa_remove_output_reads() via st_program to lower output reads away. It seems better to just generate the right thing in the first place. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Add missing support for glFogiv(GL_FOG_DISTANCE_MODE_NV)Ian Romanick2018-05-041-0/+1
| | | | | | | | Found by inspection, so I made a piglit test too. Signed-off-by: Ian Romanick <[email protected]> Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Silence an unused parameter warningIan Romanick2018-05-041-5/+4
| | | | | | | | | | | main/framebuffer.c: In function ‘update_color_draw_buffers’: main/framebuffer.c:629:46: warning: unused parameter ‘ctx’ [-Wunused-parameter] update_color_draw_buffers(struct gl_context *ctx, struct gl_framebuffer *fb) ^~~ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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