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* radv/android: Add android hardware buffer import/export.Bas Nieuwenhuizen2019-10-103-7/+156
| | | | | | Support does not include images yet. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Deal with Android external formats.Bas Nieuwenhuizen2019-10-105-39/+76
| | | | | | | | To abstract things a bit, this adds a helper function in radv_android.c. However, this means we have to link in radv_android.c on non-android as well, which means some scaffolding changes. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Derive android usage from create flags.Bas Nieuwenhuizen2019-10-103-0/+43
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Disallow sparse shared images.Bas Nieuwenhuizen2019-10-101-8/+7
| | | | | | | | | Since we really cannot share them ever. Also remove an unused switch. Fixes: b70829708ac "radv: Implement VK_KHR_external_memory" Reviewed-by: Samuel Pitoiset <[email protected]>
* radv/android: Add android hardware buffer queries.Bas Nieuwenhuizen2019-10-102-0/+182
| | | | | | | | | | | | Derived from the Intel code. For the internal format we just use the internal Vulkan format, as we have Vulkan formats for all android formats we care about. For the ycbcr properties we just do something. I do not have a real clue what would be recommended. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv/android: Add android hardware buffer field to device memory.Bas Nieuwenhuizen2019-10-102-0/+13
| | | | | | | You cannot go from BO to Android hardware buffer, so for export we have to remember it. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add VK_ANDROID_external_memory_android_hardware_buffer.Bas Nieuwenhuizen2019-10-102-0/+14
| | | | | | Still disabled but now we can add entrypoints. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Unset vk_info in radv_image_create_layout.Bas Nieuwenhuizen2019-10-101-4/+8
| | | | | | For better test coverage of this corner case. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Handle slightly different image dimensions.Bas Nieuwenhuizen2019-10-101-11/+99
| | | | | | | | | | | | | The minigbm comment really says it all. We should fix minigbm as well, but for now this is the more robust solution. Note that this only changes width and height for the surface creation, not for the image and hence also not for the sampler, where it would wreak havoc due to the normalized coords. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Delay patching for imported images until layout time.Bas Nieuwenhuizen2019-10-101-26/+35
| | | | | | | | | | | | | We want this flexibility because in GFX10 we lose any stride fields, so we have to make sure our width/height are in alignment with the external image we import. Furthermore, we need the ability to inject tiling modifiers on import time which is strictly after create time for Android. So, with the layout & patch functions being fully independent of pCreateInfo, we can delay it until import/bind time. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Split out layout code from image creation.Bas Nieuwenhuizen2019-10-101-61/+77
| | | | | | So we can delay the layout until later in some import cases. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Handle device memory alloc failure with normal free.Bas Nieuwenhuizen2019-10-101-12/+22
| | | | | | Less duplication/complexity. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Cleanup buffer_from_fd.Bas Nieuwenhuizen2019-10-103-6/+3
| | | | | | Unused stride/offset args. Reviewed-by: Samuel Pitoiset <[email protected]>
* intel/tools: Support multiple contexts in intel_dump_gpu.Rafael Antognolli2019-10-104-31/+62
| | | | | | | | | | | Create basic aub_context on GEM_CONTEXT_CREATE. Set it up and submit a context + ring + pphwsp during execbuf submission, if it has not been initialized yet. v2: Write the HWSP only once per engine (Lionel). Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/tools: Add basic aub_context code and helpers.Rafael Antognolli2019-10-103-0/+115
| | | | | | | | | | v2: - Only dump context if there were no erros (Lionel). - Store counter for context handles in aub_file (Lionel). v3: - Add a comment about aub_context -> GEM context (Lionel). Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/tools: Use common code for GGTT address allocation.Rafael Antognolli2019-10-102-20/+22
| | | | | | | We want to be able to create contexts on demand, and increase the GGTT as needed for that. Use the aub_map_ggtt() function for that. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/tools: Factor out GGTT allocation.Rafael Antognolli2019-10-101-63/+63
| | | | | | | | | We want to reuse it in execlists_setup(). v2: Rename it to write_ggtt_ptes() (Lionel). v3: Rename it to aub_map_ggtt() (Lionel). Reviewed-by: Lionel Landwerlin <[email protected]>
* radv: Implement & enable VK_EXT_texel_buffer_alignment.Bas Nieuwenhuizen2019-10-102-0/+16
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: use a compute shader for copying timestamp query resultsSamuel Pitoiset2019-10-102-30/+227
| | | | | | | | | | | | | | When the timestamp is not ready (ie. UINT64_MAX), the availabily bit should be zero. The previous code used to copy the timestamp value as the availabily bit and that's completely wrong. Because it's not that simple to emit a conditional with the CP, the driver now uses a compute shader for copying timestamp query results. Fixes dEQP-VK.pipeline.timestamp.misc_tests.reset_query_before_copy. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: sync before resetting query pools if timestamps have been writtenSamuel Pitoiset2019-10-101-0/+10
| | | | | | | | Otherwise, the GPU might write timestamp queries after the reset operation. This is similar to other query operations. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* aco: Clean up usages of PhysReg::reg from aco_assembler.Timur Kristóf2019-10-101-27/+27
| | | | | | | | | These are not needed anymore, since PhyReg has an implicit conversion operator that can convert it to unsigned int, which is equivalent to accessing this field. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Add extra assertion for number of FS input VGPRs.Timur Kristóf2019-10-101-0/+7
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Fix s_dcache_wb on GFX10.Timur Kristóf2019-10-102-0/+13
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Have s_waitcnt_vscnt write to NULL.Rhys Perry2019-10-101-2/+3
| | | | | | | | | Not sure if this instruction actually writes anything, but LLVM disassembles a destination and sets it to NULL. Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Use the VOP3-only add/sub GFX10 instructions if needed.Rhys Perry2019-10-101-1/+15
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Initial work to avoid GFX10 hazards.Rhys Perry2019-10-102-36/+117
| | | | | | | | | Currently just breaks up SMEM groups and fixes FeatureVMEMtoScalarWriteHazard (name from LLVM). Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: pad code with s_code_end on GFX10Rhys Perry2019-10-101-2/+13
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: workaround GFX10 0x3f branch bugRhys Perry2019-10-101-5/+39
| | | | | | | | | | | According to LLVM, branches with an offset of 0x3f are buggy. v2: (by Timur Kristóf) - extract the GFX10 specific part to its own function Signed-off-by: Rhys Perry <[email protected]> Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Fix VS input VGPRs on GFX10.Timur Kristóf2019-10-101-1/+5
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Assemble opsel in VOP3 instructions.Rhys Perry2019-10-102-2/+3
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Allow literals on VOP3 instructions.Rhys Perry2019-10-102-2/+4
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Reviewed-By: Timur Kristóf <[email protected]>
* aco: Support subvector loops in aco_assembler.Timur Kristóf2019-10-102-1/+26
| | | | | | | These are currently not used, but could be useful later. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Set GFX10 dimensionality on the instructions that need it.Timur Kristóf2019-10-101-0/+21
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Use ac_get_sampler_dim, delete duplicate code.Timur Kristóf2019-10-101-44/+5
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Set GFX10 DLC bit properly.Timur Kristóf2019-10-102-0/+21
| | | | | | | | | The DLC bit is now set to 1 for all loads when GLC is also set, but cleared to 0 for all stores (otherwise it causes issues), and also cleared to 0 for atomics. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Support GFX10 VOP3 and VOP1 as VOP3 in aco_assembler.Timur Kristóf2019-10-101-6/+18
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Support GFX10 EXP in aco_assembler.Timur Kristóf2019-10-101-1/+7
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Fix GFX9 FLAT, SCRATCH, GLOBAL instructions, add GFX10 support.Timur Kristóf2019-10-102-8/+27
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Support GFX10 MIMG and GFX9 D16 in aco_assembler.Timur Kristóf2019-10-101-3/+17
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Support GFX10 MTBUF in aco_assembler.Timur Kristóf2019-10-102-10/+21
| | | | | | | | Also remove img_format from aco_ir, since it can be calculated from dfmt and nfmt. So only the assember needs to deal with it. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Link ACO with amd/common.Timur Kristóf2019-10-101-0/+3
| | | | | | | | | We'd like to use some functions, for example some ac_shader_util functions in ACO, so we need to link ACO to AC. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* amd/common: Add extern "C" to some headers that were missing it.Timur Kristóf2019-10-103-0/+24
| | | | | | | | | We'd like to include some of these in C++ code later. Specifically, ACO is written in C++ and we would like to use some of this code in ACO in order to avoid code duplication. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Support GFX10 MUBUF in aco_assembler.Timur Kristóf2019-10-101-1/+9
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Support GFX10 DS in aco_assembler.Timur Kristóf2019-10-101-2/+7
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Support GFX10 VINTRP in aco_assembler.Timur Kristóf2019-10-101-1/+9
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Support GFX10 SMEM in aco_assembler.Timur Kristóf2019-10-101-13/+60
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Add missing GFX10 specific fields and some README notes.Timur Kristóf2019-10-103-2/+33
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Set +wavefrontsize64 for LLVM disassembler in GFX10 wave64 mode.Timur Kristóf2019-10-104-7/+15
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* v3d: take into account prim_counts_offsetAlejandro Piñeiro2019-10-101-1/+1
| | | | | | | | | | | | | | | | | | Specifically when reading the primitive counters. This fixed ~700 CTS tests using this pattern: dEQP-GLES3.functional.transform_feedback.* when run after tests like dEQP-GLES3.functional.prerequisite.read_pixels on the same caselist. When run individually those tests were passing because prim_counts_offset was zero. Fixes: 0f2d1dfe65bfe1ee8f02ce45f100a5508debdfd4 ("v3d: use the GPU to record primitives written to transform feedback") Reviewed-by: Jose Maria Casanova Crespo <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* radv: get the device name from radeon_info::nameSamuel Pitoiset2019-10-101-39/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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