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* radv: only bind descriptor sets to stages that need themDave Airlie2016-12-071-16/+29
* radv: move descriptor set userdata emission to draw flush time.Dave Airlie2016-12-072-2/+23
* radv: refactor descriptor set userdata emission out.Dave Airlie2016-12-071-15/+22
* radv: pass pipeline to constant flush functionDave Airlie2016-12-071-4/+6
* radv: consolidate compute pipeline flushing (v1.1)Dave Airlie2016-12-071-12/+14
* radeonsi: wait for outstanding LDS instructions in memory barriers if neededMarek Olšák2016-12-071-1/+17
* tgsi: fix the src type of TGSI_OPCODE_MEMBARMarek Olšák2016-12-071-0/+1
* radeonsi: wait for outstanding memory instructions in TCS barriersMarek Olšák2016-12-071-1/+5
* radeonsi: allow specifying simm16 of emit_waitcnt at call sitesMarek Olšák2016-12-071-5/+7
* radeonsi: write shader descriptors into hang reportsMarek Olšák2016-12-073-0/+117
* radeonsi: check for sampler state CSO corruptionMarek Olšák2016-12-073-0/+17
* radeonsi: properly declare context sampler statesMarek Olšák2016-12-073-4/+4
* radeonsi: fix incorrect FMASK checking in bind_sampler_statesMarek Olšák2016-12-071-4/+4
* radeonsi: always restore sampler states when unbinding sampler viewsMarek Olšák2016-12-071-3/+8
* radeonsi: take LDS into account for compute shader occupancy statsMarek Olšák2016-12-071-11/+18
* st/mesa: round lod_bias to a multiple of 1/256Marek Olšák2016-12-071-0/+6
* gallium: decrease the size of pipe_sampler_state fieldsMarek Olšák2016-12-071-3/+3
* cso: don't release sampler states that are boundMarek Olšák2016-12-071-1/+3
* i965: Increase max texture to 16k for gen7+Jordan Justen2016-12-071-3/+10
* intel/blorp_blit: Add split_blorp_blit_debug switchJordan Justen2016-12-071-3/+9
* intel/blorp_blit: Enable splitting large blorp blitsJordan Justen2016-12-071-1/+40
* intel/blorp_blit: Move RGB=>R conversion to follow blit splittingJordan Justen2016-12-071-48/+65
* intel/blorp_blit: Adjust blorp surface parameters for split blitsJordan Justen2016-12-071-3/+94
* intel/blorp_blit: Split blorp blits if they are too largeJordan Justen2016-12-071-6/+96
* intel/blorp_blit: Create structure for src & dst coordinatesJordan Justen2016-12-071-19/+56
* vulkan: use STATIC_ASSERT instead of static_assertEdward O'Callaghan2016-12-073-3/+3
* i965: enable INTEL_conservative_rasterization on Gen9+Lionel Landwerlin2016-12-076-5/+18
* mesa: add support for GL_INTEL_conservative_rasterizationLionel Landwerlin2016-12-0713-7/+129
* i965: Add i965 plumbing for ARB_post_depth_coverage for i965 (gen9+).Plamena Manolova2016-12-074-3/+13
* mesa: Add GL and GLSL plumbing for ARB_post_depth_coverage for i965 (gen9+).Plamena Manolova2016-12-0711-1/+53
* radeonsi: fix isolines tess factor writes to control ringNicolai Hähnle2016-12-071-4/+12
* i965: Drop redundant key->outputs_written initialization.Kenneth Graunke2016-12-061-2/+0
* i965: Initialize "separate" flag in VUE maps.Kenneth Graunke2016-12-061-0/+3
* nir: In split_var_copies_block, uint, int, and bool types cannot be matricesIan Romanick2016-12-061-3/+5
* radeonsi: Use amdgcn intrinsics for fs interpolationTom Stellard2016-12-071-54/+142
* freedreno/a5xx: fix draw packet size with index bufferRob Clark2016-12-061-1/+1
* freedreno/a5xx: gmem bypass modeRob Clark2016-12-061-0/+72
* freedreno/a5xx: fix emit_string_marker()Rob Clark2016-12-061-1/+4
* freedreno: pitch alignment should match gmem alignmentRob Clark2016-12-065-15/+22
* freedreno/a5xx: more formatsRob Clark2016-12-061-41/+41
* freedreno/a5xx: fix fragfaceRob Clark2016-12-061-2/+4
* freedreno/a5xx: fix fragcoordRob Clark2016-12-061-4/+11
* freedreno: update generated headersRob Clark2016-12-067-20/+129
* freedreno/a5xx: fix alpha testRob Clark2016-12-063-5/+1
* freedreno/a5xx: fix VPC_VAR[n].DISABLE bitsRob Clark2016-12-061-13/+13
* anv/TODO: Document sampling from HiZNanley Chery2016-12-061-0/+1
* i965: Don't force SSO layout for VS->TCS.Kenneth Graunke2016-12-062-4/+3
* i965: Unify shader interfaces explicitly.Kenneth Graunke2016-12-061-0/+29
* genxml/gen9: Change the default of MI_SEMAPHORE_WAIT::RegisterPoleModeJason Ekstrand2016-12-061-1/+1
* gallivm: optimize 16bit->32bit gather path a bitRoland Scheidegger2016-12-061-3/+39
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