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* intel/common: Use isl for decoder surface formatsJordan Justen2018-03-053-1/+10
* intel/isl: Add isl_format_is_validJordan Justen2018-03-052-0/+10
* intel: Split gen_device_info out into libintel_devJordan Justen2018-03-0533-29/+137
* gallium/aux/hud: Avoid possible buffer overflowGert Wollny2018-03-051-2/+6
* gbm: give a name to rgba fieldsEric Engestrom2018-03-052-9/+14
* egl: remove duplicated initializationAndres Gomez2018-03-051-1/+0
* freedreno/ir3: start dealing with half-precisionRob Clark2018-03-053-30/+81
* freedreno/ir3: fix fixing-up register footprintRob Clark2018-03-052-18/+27
* freedreno: surfaces can be PIPE_BUFFERRob Clark2018-03-051-4/+10
* freedreno/a5xx: handle compute resourcesRob Clark2018-03-051-2/+4
* freedreno/ir3: ignore return jumpRob Clark2018-03-051-0/+1
* freedreno: add some more compute capsRob Clark2018-03-052-4/+21
* freedreno/a5xx: don't expose 64b pointers yetRob Clark2018-03-051-2/+5
* freedreno: steal handy macro for compute caps from nouveauRob Clark2018-03-051-42/+17
* freedreno: add global_bindings stateRob Clark2018-03-054-4/+85
* freedreno/ir3: small cleanupRob Clark2018-03-051-3/+3
* freedreno: add pctx->memory_barrier()Rob Clark2018-03-051-0/+8
* freedreno/ir3: cmdline compiler updates for spv shadersRob Clark2018-03-051-0/+7
* ac: add ac_build_fsign()Samuel Pitoiset2018-03-054-36/+32
* ac: add ac_build_isign()Samuel Pitoiset2018-03-054-32/+30
* ac: add ac_build_fract()Samuel Pitoiset2018-03-054-34/+39
* virgl: add offset alignment values to to v2 caps struct[email protected]2018-03-053-2/+6
* virgl: reduce some default capset limits.Dave Airlie2018-03-051-8/+8
* virgl: handle getting new capsets.Dave Airlie2018-03-056-31/+52
* radeonsi/nir: call ac_lower_indirect_derefs()Timothy Arceri2018-03-054-4/+6
* radeonsi: add chip class to compiler_ctx_stateTimothy Arceri2018-03-053-0/+4
* ac/radv: move lower_indirect_derefs() to ac_nir_to_llvm.cTimothy Arceri2018-03-055-48/+44
* radv: Fix copying from 3D images starting at non-zero depth.Bas Nieuwenhuizen2018-03-051-0/+3
* swr/rast: Fix macOS macro.Vinson Lee2018-03-041-2/+2
* vbo: Try to reuse the same VAO more often for successive dlists.Mathias Fröhlich2018-03-031-3/+14
* mesa: Silence unused parameter warnings from TEXSTORE_PARAMSIan Romanick2018-03-022-13/+27
* i965: Silence unused parameter warnings in genX_state_uploadIan Romanick2018-03-021-20/+14
* isl: Silence unused parameter warnings in __gen_combine_address implementationsIan Romanick2018-03-022-2/+6
* genxml: Silence unused parameter warnings in generated pack codeIan Romanick2018-03-021-3/+11
* i965: Silence unused parameter warnings in blorpIan Romanick2018-03-023-17/+15
* nir: Silence unused parameter warnings in generated nir_constant_expressions ...Ian Romanick2018-03-021-1/+2
* i965: Silence unused parameter warnings in generated OA codeIan Romanick2018-03-021-1/+1
* i965: Silence warnings about mixing enum and non-enum in conditionalIan Romanick2018-03-021-1/+1
* intel/compiler: Silence unused parameter warnings in release buildsIan Romanick2018-03-022-6/+7
* i965: Silence unused parameter warningsIan Romanick2018-03-021-1/+1
* intel: Drop program size pointer from vec4/fs assembly getters.Kenneth Graunke2018-03-029-25/+17
* i965: Mark upload buffers with MAP_ASYNC and MAP_PERSISTENT.Kenneth Graunke2018-03-021-1/+3
* i965: Generalize intel_upload.c to support multiple uploaders.Kenneth Graunke2018-03-029-91/+101
* intel/compiler: Memory fence commit must always be enabled for gen10+Anuj Phogat2018-03-021-1/+3
* Revert "i965/fs: Predicate byte scattered writes if needed"Francisco Jerez2018-03-021-14/+1
* intel/fs: Handle surface opcode sample masks via predication.Francisco Jerez2018-03-021-1/+42
* intel/eu: Plumb header present bit to codegen helpers for HDC messages.Francisco Jerez2018-03-024-29/+50
* intel/ir: Allow arbitrary scratch flag registers for SHADER_OPCODE_FIND_LIVE_...Francisco Jerez2018-03-023-4/+6
* intel/ir: Allow representing additional flag subregisters in the IR.Francisco Jerez2018-03-027-14/+24
* intel/l3: Don't allocate SLM partition on ICL+.Francisco Jerez2018-03-021-1/+1
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