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Author
Age
Files
Lines
*
ilo: update WM and PS related functions for Gen8
Chia-I Wu
2015-02-12
2
-76
/
+264
*
ilo: update SBE related functions for Gen8
Chia-I Wu
2015-02-12
1
-20
/
+97
*
ilo: update SF related functions for Gen8
Chia-I Wu
2015-02-12
3
-81
/
+267
*
ilo: update CLIP related functions for Gen8
Chia-I Wu
2015-02-12
1
-18
/
+20
*
ilo: update SF_CLIP_VIEWPORT for Gen8
Chia-I Wu
2015-02-12
3
-14
/
+40
*
ilo: update streamout related functions for Gen8
Chia-I Wu
2015-02-12
3
-44
/
+78
*
ilo: update 3DSTATE_{DS,HS,GS} for Gen8
Chia-I Wu
2015-02-12
1
-8
/
+24
*
ilo: update 3DSTATE_CONSTANT_x for Gen8
Chia-I Wu
2015-02-12
1
-3
/
+16
*
ilo: update 3DSTATE_URB_x for Gen8
Chia-I Wu
2015-02-12
1
-1
/
+8
*
ilo: update 3DSTATE_PUSH_CONSTANT_ALLOC_x for Gen8
Chia-I Wu
2015-02-12
1
-7
/
+8
*
ilo: update render engine common helpers for Gen8
Chia-I Wu
2015-02-12
4
-34
/
+91
*
ilo: update BLT helpers for Gen8
Chia-I Wu
2015-02-12
1
-25
/
+58
*
ilo: update MI helpers for Gen8
Chia-I Wu
2015-02-12
2
-30
/
+59
*
ilo: add functions for Gen8 relocs
Chia-I Wu
2015-02-12
1
-6
/
+39
*
ilo: update the toy compiler for Gen8
Chia-I Wu
2015-02-12
5
-91
/
+501
*
ilo: update genhw headers
Chia-I Wu
2015-02-12
19
-529
/
+1704
*
ilo: clean up ilo_gpe_init_dsa()
Chia-I Wu
2015-02-12
1
-54
/
+82
*
ilo: clean up ilo_gpe_init_blend()
Chia-I Wu
2015-02-12
3
-87
/
+106
*
ilo: clean up sample patterns
Chia-I Wu
2015-02-12
5
-68
/
+71
*
glsl: Optimize (f2i(trunc x)) into (f2i x).
Matt Turner
2015-02-11
1
-0
/
+9
*
glsl: Optimize round-half-up pattern.
Matt Turner
2015-02-11
1
-0
/
+33
*
glsl: Add trunc() to ir_builder.
Matt Turner
2015-02-11
2
-0
/
+6
*
i965: Add LINTERP/CINTERP to can_do_cmod().
Matt Turner
2015-02-11
1
-0
/
+2
*
program: Remove _mesa_nop_vertex_program/_mesa_nop_fragment_program.
Matt Turner
2015-02-11
2
-97
/
+0
*
nir: Recognize open-coded fmin/fmax.
Matt Turner
2015-02-11
1
-0
/
+2
*
nir: Add algebraic opt for int comparisons with identical operands.
Eric Anholt
2015-02-11
1
-0
/
+9
*
nir: Fix load_const comparisons for CSE.
Eric Anholt
2015-02-11
1
-1
/
+1
*
i965/fs: Remove conditional mod when optimizing a SEL into a MOV.
Matt Turner
2015-02-11
1
-0
/
+1
*
darwin: build fix
Jeremy Huddleston Sequoia
2015-02-10
1
-0
/
+5
*
darwin: build fix
Jeremy Huddleston Sequoia
2015-02-10
1
-0
/
+1
*
glsl: Optimize 1/exp(x) into exp(-x).
Matt Turner
2015-02-10
1
-0
/
+6
*
nir: Remove casts from void*.
Matt Turner
2015-02-10
4
-14
/
+13
*
nir: Replace assert(0) with unreachable().
Matt Turner
2015-02-10
1
-7
/
+7
*
nir: Remove unused has_indirect variable.
Matt Turner
2015-02-10
1
-4
/
+0
*
i965/vec4: Emit MADs from (x + abs(y * z)).
Matt Turner
2015-02-10
1
-3
/
+15
*
i965/vec4: Emit MADs from (x + -(y * z)).
Matt Turner
2015-02-10
1
-0
/
+12
*
i965/skl: Implement WaDisable1DDepthStencil
Neil Roberts
2015-02-10
1
-0
/
+12
*
i965/gen7-8: Implement glMemoryBarrier().
Francisco Jerez
2015-02-10
2
-0
/
+41
*
i965: Generalize the update_null_renderbuffer_surface vtbl hook to non-render...
Francisco Jerez
2015-02-10
4
-56
/
+55
*
i965: Allocate binding table space for shader images.
Francisco Jerez
2015-02-10
2
-0
/
+12
*
i965: Don't tile 1D miptrees.
Francisco Jerez
2015-02-10
1
-0
/
+7
*
i965/vec4: Don't set any dependency control bits for F32TO16 on Gen8.
Francisco Jerez
2015-02-10
1
-0
/
+5
*
i965: Handle negated unsigned immediate values in constant propagation.
Francisco Jerez
2015-02-10
3
-19
/
+19
*
i965/vec4: Take into account non-zero reg_offset during register allocation.
Francisco Jerez
2015-02-10
1
-1
/
+3
*
i965/vec4: Add register classes up to MAX_VGRF_SIZE.
Francisco Jerez
2015-02-10
3
-7
/
+9
*
i965/vec4: Init mlen for several send from GRF instructions.
Francisco Jerez
2015-02-10
3
-5
/
+11
*
i965/vec4: Don't infer MRF dependencies for send from GRF instructions.
Francisco Jerez
2015-02-10
1
-14
/
+18
*
i965/vec4: Fix the scheduler to take into account reads and writes of multipl...
Francisco Jerez
2015-02-10
3
-5
/
+29
*
i965/vec4: Make vec4_visitor::implied_mrf_writes() return zero for sends from...
Francisco Jerez
2015-02-10
1
-1
/
+1
*
i965/vec4: Pass dst register to the vec4_instruction constructor.
Francisco Jerez
2015-02-10
1
-7
/
+5
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