summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Collapse)AuthorAgeFilesLines
* anv/image: Disable HiZ for depth buffer arraysNanley Chery2017-01-111-0/+2
| | | | | | | | | We currently don't perform clears or resolves on multiple array layers with HiZ. Cc: [email protected] Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Fix programmed HiZ qpitchNanley Chery2017-01-111-1/+1
| | | | | | | | | | Match the comment above the field by using units of pixels and not HiZ blocks. Cc: [email protected] Suggested-by: Jason Ekstrand <[email protected]> Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Fix arrayed depth/stencil attachmentsNanley Chery2017-01-111-2/+5
| | | | | | | | | | Enable multiple layers of the depth/stencil buffers to be accessible. Fixes the crucible test, func.depthstencil.arrayed_clear. Cc: [email protected] Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* clover: Check for executables before enqueueing a kernelPierre Moreau2017-01-111-1/+4
| | | | | | | | | | Without this check, the kernel::bind() method would fail with a std::out_of_range exception, letting an exception escape from the library into the client, rather than returning the corresponding error code CL_INVALID_PROGRAM_EXECUTABLE. Signed-off-by: Pierre Moreau <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* spirv: Shut up unhandled enumeration value warnings.Kenneth Graunke2017-01-111-0/+2
| | | | | | We don't want to do anything for the other cases. Signed-off-by: Kenneth Graunke <[email protected]>
* nir: don't turn ieq/ine into inot if used by an ifTimothy Arceri2017-01-122-2/+8
| | | | | | | | | | | | | | | | | | | Otherwise we will end up with an extra instruction to compare the result of the inot. On BDW: total instructions in shared programs: 13060620 -> 13060481 (-0.00%) instructions in affected programs: 103379 -> 103240 (-0.13%) helped: 127 HURT: 0 total cycles in shared programs: 256590950 -> 256587408 (-0.00%) cycles in affected programs: 11324730 -> 11321188 (-0.03%) helped: 114 HURT: 21 Reviewed-by: Jason Ekstrand <[email protected]>
* nir: add late opt to turn inot/b2f combos back to bcselTimothy Arceri2017-01-122-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | We turn these from bcsel into inot/b2f combos in order for other optimisation passes to get further. Once we have finished turn the ones that remain and are used in more than a single expression back into a bcsel. On BDW: total instructions in shared programs: 13060965 -> 13060297 (-0.01%) instructions in affected programs: 835701 -> 835033 (-0.08%) helped: 670 HURT: 2 total cycles in shared programs: 256599536 -> 256598006 (-0.00%) cycles in affected programs: 114655488 -> 114653958 (-0.00%) helped: 419 HURT: 240 LOST: 0 GAINED: 1 The 2 HURT is because inserting bcsel creates the only use of const 1.0 in two shaders from tri-of-friendship-and-madness. Reviewed-by: Jason Ekstrand <[email protected]>
* nir: add imprecise flrp optimisationTimothy Arceri2017-01-121-0/+1
| | | | | | | | | | | | | | | | | | On BDW: total instructions in shared programs: 13061890 -> 13061877 (-0.00%) instructions in affected programs: 2441 -> 2428 (-0.53%) helped: 13 HURT: 0 total cycles in shared programs: 256612254 -> 256611784 (-0.00%) cycles in affected programs: 16418 -> 15948 (-2.86%) helped: 10 HURT: 2 V2: don't use ffma directly Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Use the nir_move_comparisons pass.Kenneth Graunke2017-01-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the below stats are encouraging this pass will also become very usefull for avoiding regression once brw_do_channel_expressions() and brw_do_vector_splitting() are disabled. On Broadwell: total instructions in shared programs: 13078787 -> 13060898 (-0.14%) instructions in affected programs: 1809827 -> 1791938 (-0.99%) helped: 4527 HURT: 157 total cycles in shared programs: 256562762 -> 256590424 (0.01%) cycles in affected programs: 159749392 -> 159777054 (0.02%) helped: 5583 HURT: 2289 total spills in shared programs: 14929 -> 14923 (-0.04%) spills in affected programs: 62 -> 56 (-9.68%) helped: 1 HURT: 0 total fills in shared programs: 20144 -> 20141 (-0.01%) fills in affected programs: 253 -> 250 (-1.19%) helped: 1 HURT: 3 LOST: 0 GAINED: 2 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Move nir_lower_locals_to_regs a bit later.Kenneth Graunke2017-01-121-2/+2
| | | | | | | | | | | | | I'm going to add a boolean scheduling pass that I want run late, but after copy propagation and dead code elimination. Yet, I don't want to have to think about registers. So, move the register conversion a little later. No impact on shader-db. Suggested by Jason Ekstrand. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* nir: Introduce a nir_opt_move_comparisons() pass.Kenneth Graunke2017-01-123-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This tries to move comparisons (a common source of boolean values) closer to their first use. For GPUs which use condition codes, this can eliminate a lot of temporary booleans and comparisons which reload the condition code register based on a boolean. V2: (Timothy Arceri) - fix move comparision for phis so we dont end up with: vec1 32 ssa_227 = phi block_34: ssa_1, block_38: ssa_240 vec1 32 ssa_235 = feq ssa_227, ssa_1 vec1 32 ssa_230 = phi block_34: ssa_221, block_38: ssa_235 - add nir_op_i2b/nir_op_f2b to the list of comparisons. V3: (Timothy Arceri) - tidy up suggested by Jason. - add inot/fnot to move comparison list V4: (Jason Ekstrand) - clean up move_comparison_source - get rid of the tuple - rework phi handling Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* nir/algebraic: add support for conditional helper functions to expressionsTimothy Arceri2017-01-123-1/+15
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* anv/TODO: Check off a bunch of stuffJason Ekstrand2017-01-111-12/+0
|
* nir/search: Only allow matching SSA valuesJason Ekstrand2017-01-111-5/+11
| | | | | | | | This is more correct and should also be a tiny bit faster since we're just comparing pointers instead of calling nir_src_equal. Reviewed-by: Timothy Arceri <[email protected]> Cc: "13.0" <[email protected]>
* egl/dri2: add image_loader_extension back into loader extensions for waylandDerek Foreman2017-01-111-0/+1
| | | | | | | | | | | | | before commit f871946594129500a67c05a6d9fe99db54b4bb64 image_loader_extension was always present in dri2_dpy->extensions, after that commit it is only present for render nodes. Its removal broke partial render based on buffer age on (at least) raspberry pi. Fixes: f8719465941 "egl/dri2: rework dri2_egl_display::extensions storage" Signed-off-by: Derek Foreman <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gallium/tgsi: fix overflow in parse propertyLi Qiang2017-01-111-3/+6
| | | | | | | | | | | In parse_identifier, it doesn't stop copying '*pcur' untill encounter the NULL. As the 'ret' has a fixed-size buffer, if the '*pcur' has a long string, there will be a buffer overflow. This patch avoid this. Signed-off-by: Li Qiang <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Marc-André Lureau <[email protected]>
* st/dri: remove trailing whitespaceMauro Rossi2017-01-111-1/+1
| | | | | Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* android: st/mesa: fix building error in libmesa_st_mesaMauro Rossi2017-01-111-1/+3
| | | | | | | Fixes building error due to dependency on nir generated headers Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radv: fix multi-viewport emissionDave Airlie2017-01-111-2/+2
| | | | | | | This set context req seq was in the wrong place. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: change asserts to unreachable in nir_type_conversion_opTapani Pälli2017-01-111-3/+3
| | | | | | | | | this is to avoid following compilation error on Android: error: control may reach end of non-void function [-Werror,-Wreturn-type] Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* spirv: gl_PrimitiveID in the fragment shader is handled as an inputIago Toral Quiroga2017-01-111-1/+4
| | | | | | | | | Geometry and Tessellation stages do handle this as a system value instead. Fixes: dEQP-VK.geometry.basic.primitive_id Reviewed-by: Dave Airlie <[email protected]>
* freedreno: add "nogrow" debug paramRob Clark2017-01-103-1/+4
| | | | | | | Sometimes it is useful to disable the "growable" cmdstream buffers for debugging. (See 419a154d in libdrm) Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: remove hack for glamorRob Clark2017-01-101-3/+0
| | | | | | | Now that issues glamor was hitting w/ glsl>=130 (aka missing INSTANCED bit in vertex attribute state) is fixed, remove hack. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fixed instancedRob Clark2017-01-101-0/+1
| | | | | | Add missing bit, now that we know where it is. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: use the non-_ZERO_BASE for vertexidRob Clark2017-01-104-6/+20
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: add texture MIPLVLSRob Clark2017-01-101-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fix fragcoord related hangsRob Clark2017-01-102-2/+6
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-01-106-13/+22
| | | | Signed-off-by: Rob Clark <[email protected]>
* anv: Enable tessellation shaders.Kenneth Graunke2017-01-102-1/+2
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Initialize physical device limits for tessellationKenneth Graunke2017-01-101-8/+8
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Clamp depth buffer dimensions to be at least 1.Kenneth Graunke2017-01-101-2/+2
| | | | | | | | | | | | | When there are no framebuffer attachments, fb->width and fb->height will be 0. Subtracting 1 results in 4294967295 which is too large for the field, causing genxml assertions when trying to create the packet. In this case, we can just program it to 1. Caught by dEQP-VK.tessellation.tesscoord.triangles_equal_spacing. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Compile TCS/TES shaders.Kenneth Graunke2017-01-101-2/+191
| | | | | | | | v2: Merge more TCS/TES info. v3: Fix caching keys. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Emit 3DSTATE_HS/TE/DS packets.Kenneth Graunke2017-01-102-4/+89
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Handle patch primitives.Kenneth Graunke2017-01-101-2/+7
| | | | | | | | v2: Use anv_pipeline_has_stage rather than tess_info != NULL. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add a pass to lower TES patch_vertices intrinsics to a constant.Kenneth Graunke2017-01-103-0/+55
| | | | | | | | | | | | | | In Vulkan, we always have both the TCS and TES available in the same pipeline, so we can simply use the TCS OutputVertices execution mode value as the TES PatchVertices built-in. For GLSL, we handle this in the linker. But we could use this pass in the case when both TCS and TES are linked together, if we wanted. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Silence unsupported tessellation capability warnings.Kenneth Graunke2017-01-102-2/+6
| | | | | | | | ...when the capability bit is set. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Tidy some repeated if checks by using a switch statement.Kenneth Graunke2017-01-101-8/+9
| | | | | | | Iago suggested tidying this. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Add tessellation varying and built-in support.Kenneth Graunke2017-01-103-6/+52
| | | | | | | | | | | | We need to: - handle the extra array level for per-vertex varyings - handle the patch qualifier correctly - assign varying locations Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Handle tessellation execution modes.Kenneth Graunke2017-01-101-6/+41
| | | | | | | | | | v2: Use info->tess. v3: Handle more things in either TCS/TES. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]> [v1] Reviewed-by: Iago Toral Quiroga <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* compiler: Merge shader_info's tcs and tes structs.Kenneth Graunke2017-01-109-36/+37
| | | | | | | | | | | | | | | Annoyingly, SPIR-V lets you specify all of these fields in either the TCS or TES, which means that we need to be able to store all of them for either shader stage. Putting them in a union won't work. Combining both is an easy solution, and given that the TCS struct only had a single field, it's pretty inexpensive. This patch renames the combined struct to "tess" to indicate that it's for tessellation in general, not one of the two stages. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* genxml: Rename 3DSTATE_HS::Enable to "Function Enable".Kenneth Graunke2017-01-104-4/+4
| | | | | | | "Function Enable" is what the other stages use. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: set input_slots_valid on brw_wm_prog_keyLionel Landwerlin2017-01-101-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | With shaders using a lot of inputs/outputs, like this (from Gtk+) : layout(location = 0) in vec2 inPos; layout(location = 1) in float inGradientPos; layout(location = 2) in flat int inRepeating; layout(location = 3) in flat int inStopCount; layout(location = 4) in flat vec4 inClipBounds; layout(location = 5) in flat vec4 inClipWidths; layout(location = 6) in flat ColorStop inStops[8]; layout(location = 0) out vec4 outColor; we're missing the programming of the input_slots_valid field leading to an assert further down the backend code. v2: Use valid slots of the geometry or vertex stage (Jason) v3: Use helper to find correct vue map (Jason) v4: Set the valid slots off the previous stages (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: add helper to get vue map for fragment shaderLionel Landwerlin2017-01-102-6/+12
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: add get_.*_prog_data for tesselation stagesLionel Landwerlin2017-01-101-0/+2
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: make get_.*_prog_data take a const pipelineLionel Landwerlin2017-01-101-1/+1
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Fix anonymous union initialization with older GCC.Vinson Lee2017-01-091-1/+1
| | | | | | | | | | | | | | | Fix this build error with GCC 4.4.7. CC nir/nir_opt_copy_prop_vars.lo nir/nir_opt_copy_prop_vars.c: In function ‘copy_prop_vars_block’: nir/nir_opt_copy_prop_vars.c:765: error: unknown field ‘deref’ specified in initializer nir/nir_opt_copy_prop_vars.c:765: warning: missing braces around initializer nir/nir_opt_copy_prop_vars.c:765: warning: (near initialization for ‘(anonymous).<anonymous>’) nir/nir_opt_copy_prop_vars.c:765: warning: initialization from incompatible pointer type Fixes: 62332d139c8f ("nir: Add a local variable-based copy propagation pass") Signed-off-by: Vinson Lee <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* radv/ac: add support for multi sample image coordsDave Airlie2017-01-101-1/+16
| | | | | | | | | | | | | This just adds the nir->llvm support, enabling the extension causes some failures on llvm 3.9 at least, but this code seems fine. NIR passes the sampler in src[1].x, and we LLVM/SI requires it as the last parameters in the coords (coord[2] for 2D, coord[3] for 2DArray). Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* glsl: Do not allow scalar types in vector relational functionsBoyan Ding2017-01-091-19/+10
| | | | | | | | | | According to OpenGL Shading Language 4.50 spec, Section 8.7 "Vector Relational Functions", functions of this type do not operate on scalar types, so remove scalar types from signature definitions to make the behavior consistent with glslangValidator and other drivers. Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Boyan Ding <[email protected]>
* nir: remove duplicated foreach loopThomas Hindoe Paaboel Andersen2017-01-091-1/+0
| | | | | | | | The foreach loop was called both in the else case and right after. The indentation seems to indicate that the extra call was from a previous version with an else section with out curly brackets. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Fix number of slots in SSO mode when there are no user varyings.Kenneth Graunke2017-01-091-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | We want vue_map->num_slots to be one more than the final slot. When assigning fixed slots, built-in slots, and non-SSO user varyings, we do slot++. This leaves "slot" as one past the most recently assigned slot. But for SSO user varyings, we computed slot based on the varying location value...and left it at that slot value. To work around this inconsistency, I made num_slots be "slot + 1" if separate and "slot" otherwise. The problem is...if there are no user varyings in SSO mode...then we would have done slot++ when assigning built-ins, so it would be off by one. This resulted in loops from 0 to vue_map->num_slots hitting a bonus BRW_VARYING_SLOT_PAD at the end. This used to break the SIMD8 VS/TES backends, but I fixed that in commit 480d6c1653713dcae617ac523b2ca5deee01c845. It's probably safe at this point, but we should fix it anyway. To fix this, do slot++ in all cases. For SSO mode, we overwrite slot for every varying, so this increment only matters on the last varying. Because we process varyings in order, this will set slot to 1 more than the highest assigned slot. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 04:02:03 +0000