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* v3d: Don't forget to flush writes to UBOs.Eric Anholt2018-12-072-5/+16
| | | | | If someone did TF into a UBO, we might have left the TF job un-flushed at the point of reading.
* v3d: Make an array for frag/vert texture state in the context.Eric Anholt2018-12-077-42/+21
| | | | | This simplifies a bunch of our texture handling, while introducing the slots necessary for adding new shader stages.
* v3d: Re-use the wrap mode uniform on V3D 3.3.Eric Anholt2018-12-071-24/+4
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* v3d: Put default vertex attribute values into the state uploader as well.Eric Anholt2018-12-073-8/+12
| | | | | The default attributes are long-lived (the state struct is cached), and only 256 bytes each.
* v3d: Create a state uploader for packing our shaders together.Eric Anholt2018-12-074-13/+35
| | | | | | Shaders are usually quite short, and are private to the context. We can save memory and reduce the work the kernel needs to do at exec time by packing them together in a stream uploader for long-lived state.
* v3d: Update simulator cache flushing code to match the kernel better.Eric Anholt2018-12-071-13/+19
| | | | | We were missing the invalidate between bin and render (possibly relevant for SSBOs), and still trying to flush the nonexistent L2C on 3.3+.
* v3d: Use the TFU to do generatemipmap.Eric Anholt2018-12-077-1/+175
| | | | | This is a separate, dedicated hardware unit for texture layout conversions and mipmap generation.
* v3d: Add the V3D TFU submit interface to the simulator.Eric Anholt2018-12-073-20/+90
| | | | | | | | | The TFU lets us format raster and SAND images into formats that can be read by the texture engine, and do mipmap generation. The UAPI comes from drm-next e69aa5f9b97f ("Merge tag 'drm-misc-next-2018-12-06' of git://anongit.freedesktop.org/drm/drm-misc into drm-next")
* v3d: Use combined input/output segments.Eric Anholt2018-12-074-5/+41
| | | | | | | The HW apparently has some issues (or at least a much more complicated VCM calculation) with non-combined segments, and the closed source driver also uses combined I/O. Until I get the last CTS failure resolved (which does look plausibly like some VPM stomping), let's use combined I/O too.
* v3d: Add missing OES_half_float_linear support.Eric Anholt2018-12-071-0/+1
| | | | | | | | We were exposing ARB_texture_float, but apparently not the OES subset flag. Fixes regression from GLES3 support to GLES2. Fixes: fcf9fcee3c8a ("mesa/main: do not require float-texture filtering for es3")
* v3d: Add support for RGBA_SRGB along with BGRA_SRGB.Eric Anholt2018-12-071-0/+2
| | | | | This is the actual native format for the hardware, without swizzling. Noticed while debugging why GLES3 disappeared.
* intel/blorp: Expand blorp_address::offset to be 64 bits.Kenneth Graunke2018-12-074-4/+4
| | | | | | | | | | | | | In the softpin world, surface state base address may be a fixed 64-bit address (with no associated BO). It makes sense to store this in the offset field. But it needs to be the full size. We also update the clear color address to be consistently uint64_t everywhere so we can continue passing intel_miptree_get_clear_color a pointer to the blorp_address's offset field without type mismatches. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* freedreno/drm: fix memory leakRob Clark2018-12-071-0/+3
| | | | | | | | Fix an emberrasing memory leak with the non-softpin submit/rb implementation. Fixes: f3cc0d27475 freedreno: import libdrm_freedreno + redesign submit Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: track max flow control depth for a5xx/a6xxRob Clark2018-12-075-4/+37
| | | | | | Rather than just hard-coding BRANCHSTACK size. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: code-motionRob Clark2018-12-076-838/+942
| | | | | | | Split up ir3_compiler_nir.c a bit before starting to add new stuff for a6xx SSBO/image instructions. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: sync instr/disasmRob Clark2018-12-074-25/+132
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: don't fetch unused tex componentsRob Clark2018-12-072-0/+29
| | | | | | | Detect when a component of an (for example) texture fetch is unused and propagate the updated wrmask back to the parent instruction. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: blitter fixesRob Clark2018-12-072-3/+80
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-12-077-35/+56
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/drm: fix relocs in nested stateobjsRob Clark2018-12-071-3/+15
| | | | | | | | If we have an reloc from stateobjA to stateobjB, we would previously leave stateobjB's bos out of the submit's bos table. Handle this case by copying into stateobjA's reloc_bos table. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx+a6xx: remove unused fs/vs pvt memRob Clark2018-12-074-20/+0
| | | | | | copy/pasta from older gens Signed-off-by: Rob Clark <[email protected]>
* gallium: fix typoRob Clark2018-12-071-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: remove unused fd_surface fieldsRob Clark2018-12-071-5/+0
| | | | Signed-off-by: Rob Clark <[email protected]>
* nir: Fixup algebraic test for variable-sized conversionsConnor Abbott2018-12-071-1/+1
| | | | | | | | | | b2i can now take any size boolean in preparation for 1-bit booleans, so the error message printed is slightly different. Fixes: dca6cd9ce65 ("nir: Make boolean conversions sized just like the others") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108961 Cc: Jason Ekstrand <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* gallium: add missing PIPE_CAP_SURFACE_SAMPLE_COUNT default valueSamuel Pitoiset2018-12-071-0/+3
| | | | | | Fixes: 2710c40e3c8 ("gallium: Add new PIPE_CAP_SURFACE_SAMPLE_COUNT") Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Michel Dänzer <[email protected]>
* freedreno: Add support for EXT_multisampled_render_to_textureKristian H. Kristensen2018-12-063-1/+7
| | | | | | | | | There is not much to do in freedreno - tile layout and multisample state for gmem renderings is programmed based on the pfb sample count, while resolve blits take the destination sample count from the resource. Reviewed-by: Rob Clark <[email protected]> Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: MSAARob Clark2018-12-0610-24/+74
| | | | | Reviewed-by: Kristian H. Kristensen <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* st/mesa: Add support for EXT_multisampled_render_to_textureKristian H. Kristensen2018-12-063-0/+5
| | | | | | | | | In gallium, we model the attachment sample count as a new nr_samples field in pipe_surface. A driver can indicate support for the extension using the new pipe cap, PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Kristian H. Kristensen <[email protected]>
* gallium: Add new PIPE_CAP_SURFACE_SAMPLE_COUNTKristian H. Kristensen2018-12-064-2/+19
| | | | | | | | | | | This new pipe cap and the new nr_samples field in pipe_surface lets a state tracker bind a render target with a different sample count than the resource. This allows for implementing EXT_multisampled_render_to_texture and EXT_multisampled_render_to_texture2. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Kristian H. Kristensen <[email protected]>
* mesa: Add core support for EXT_multisampled_render_to_texture{,2}Kristian H. Kristensen2018-12-0610-16/+96
| | | | | | | | | This also turns on EXT_multisampled_render_to_texture which is a subset of EXT_multisampled_render_to_texture2, allowing only COLOR_ATTACHMENT0. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Kristian H. Kristensen <[email protected]>
* nir/algebraic: Make algebraic_parser_test.sh executable.Vinson Lee2018-12-061-0/+0
| | | | | | | | | | Fixes make check permission error. ../../bin/test-driver: line 107: ./nir/tests/algebraic_parser_test.sh: Permission denied FAIL nir/tests/algebraic_parser_test.sh (exit status: 126) Fixes: a0ae12ca91a4 ("nir/algebraic: Add unit tests for bitsize validation") Signed-off-by: Vinson Lee <[email protected]>
* amd: remove support for LLVM 6.0Samuel Pitoiset2018-12-0621-520/+85
| | | | | | | User are encouraged to switch to LLVM 7.0 released in September 2018. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: Android build fixesKristian H. Kristensen2018-12-052-1/+2
| | | | | | | A couple of simple fixes for building on Android with autotools. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* nir: Make boolean conversions sized just like the othersJason Ekstrand2018-12-0520-74/+121
| | | | | | | | | Instead of a single i2b and b2i, we now have i2b32 and b2iN where N is one if 8, 16, 32, or 64. This leads to having a few more opcodes but now everything is consistent and booleans aren't a weird special case anymore. Reviewed-by: Connor Abbott <[email protected]>
* nir/opt_algebraic: Add 32-bit specifiers to a bunch of booleansJason Ekstrand2018-12-051-56/+56
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/opt_algebraic: Drop bit-size suffixes from conversionsJason Ekstrand2018-12-051-29/+29
| | | | | | | | Suffixes are dropped from a bunch of conversion opcodes when it makes sense to do so. Others are kept if we really do want the bit-size restriction. Reviewed-by: Connor Abbott <[email protected]>
* nir/opt_algebraic: Simplify an optimization using the new search opsJason Ekstrand2018-12-051-7/+2
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/algebraic: Add support for unsized conversion opcodesJason Ekstrand2018-12-053-10/+140
| | | | | | | | | | | | All conversion opcodes require a destination size but this makes constructing certain algebraic expressions rather cumbersome. This commit adds support to nir_search and nir_algebraic for writing conversion opcodes without a size. These meta-opcodes match any conversion of that type regardless of destination size and the size gets inferred from the sizes of the things being matched or from other opcodes in the expression. Reviewed-by: Connor Abbott <[email protected]>
* nir/algebraic: Refactor codegen a bitJason Ekstrand2018-12-051-10/+11
| | | | | | | Instead of using an OrderedDict, just have a (necessarily sorted) array of transforms and a set of opcodes. Reviewed-by: Connor Abbott <[email protected]>
* nir/algebraic: Clean up some __str__ cruftJason Ekstrand2018-12-051-4/+0
| | | | | | | Both of these things are already handled in the Value base class so we don't need to handle them explicitly in Constant. Reviewed-by: Connor Abbott <[email protected]>
* nir/opcodes: Rename tbool to tbool32Jason Ekstrand2018-12-051-11/+11
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/opcodes: Pull in the type helpers from constant_expressionsJason Ekstrand2018-12-053-35/+35
| | | | | | | While we're at it, we rework them a bit to all use regular expressions and assert more. Reviewed-by: Connor Abbott <[email protected]>
* nir/algebraic: Add unit tests for bitsize validationConnor Abbott2018-12-054-1/+129
| | | | | | | | | The non-failure path can be tested by just compiling mesa and then testing it, but the failure paths won't be hit unless you make a mistake, so it's best to test them with some unit tests. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* nir/algebraic: Rewrite bit-size inferenceConnor Abbott2018-12-053-366/+317
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, there were two copies of the algorithm: one in C, that we would use to figure out what bit-size to give the replacement expression, and one in Python, that emulated the C one and tried to prove that the C algorithm would never fail to correctly assign bit-sizes. That seemed pretty fragile, and likely to fall over if we make any changes. Furthermore, the C code was really just recomputing more-or-less the same thing as the Python code every time. Instead, we can just store the results of the Python algorithm in the C datastructure, and consult it to compute the bitsize of each value, moving the "brains" entirely into Python. Since the Python algorithm no longer has to match C, it's also a lot easier to change it to something more closely approximating an actual type-inference algorithm. The algorithm used is based on Hindley-Milner, although deliberately weakened a little. It's a few more lines than the old one, judging by the diffstat, but I think it's easier to verify that it's correct while being as general as possible. We could split this up into two changes, first making the C code use the results of the Python code and then rewriting the Python algorithm, but since the old algorithm never tracked which variable each equivalence class, it would mean we'd have to add some non-trivial code which would then get thrown away. I think it's better to see the final state all at once, although I could also try splitting it up. v2: - Replace instances of "== None" and "!= None" with "is None" and "is not None". - Rename first_src to first_unsized_src - Only merge the destination with the first unsized source, since the sources have already been merged. - Add a comment explaining what nir_search_value::bit_size now means. v3: - Fix one last instance to use "is not" instead of != - Don't try to be so clever when choosing which error message to print based on whether we're in the search or replace expression. - Fix trailing whitespace. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* radv: expose VK_EXT_scalar_block_layoutSamuel Pitoiset2018-12-052-0/+7
| | | | | | | | | | | | Nothing to do, the compiler already handles that. All new dEQP.VK.ubo.* and dEQP.VK.ssbo.* pass, except some 16-bit tests that are quite related to fdo bug #108114. Only enable the extension on CIK+ because it might not work on SI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* spirv: add SpvCapabilityInt64AtomicsSamuel Pitoiset2018-12-052-1/+5
| | | | | | | Required for VK_KHR_shader_atomic_int64. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* drisw: Use separate drisw_loader_funcs for shmMichal Srb2018-12-051-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | The original code was modifying the global drisw_lf variable, which is bad when there are multiple contexts in single process, each initialized with different loader. One may support put_image_shm and the other not. Since there are currently only two possible combinations, lets create two global tables, one for each. Lets make them const, since we won't change them and they can be shared. This fixes crash in VLC. It used two GL contexts (each in different thread), one was initialized by its Qt GUI, the other by its video output plugin. The first one set the put_image_shm=drisw_put_image_shm, the second did not, but since the same structure was used, the drisw_put_image_shm was used too. Then it crashed because the second loader did not have putImageShm set. Downstream bug: https://bugzilla.opensuse.org/show_bug.cgi?id=1113533 v2: Added Fixes and described the VLC bug. Fixes: 63c427fa71a ("drisw: use putImageShm if available") Signed-off-by: Michal Srb <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gallium: Constify drisw_loader_funcs structMichal Srb2018-12-054-5/+5
| | | | | | | | The content is not expected to change. Cc: [email protected] Signed-off-by: Michal Srb <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radv: wait on the high 32 bits of timestamp queriesSamuel Pitoiset2018-12-051-1/+4
| | | | | | | | In case we are unlucky if the low part is 0xffffffff. Fixes: 5d6a560a29 ("radv: do not use the availability bit for timestamp queries") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: reset pending_reset_query when flushing cachesSamuel Pitoiset2018-12-052-1/+5
| | | | | | | | | | | | | If the driver used a compute shader for resetting a query pool, it should be completed when caches are flushed. This might reduce the number of stalls if operations are done between vkCmdResetQueryPool() and vkCmdBeginQuery() (or vkCmdWriteTimestamp()). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Alex Smith <[email protected]>
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