| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
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It's always the same as *texObj->Name.
Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
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It's always the same as *texObj->Target.
Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
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It's about to be destroyed, so there's no point.
Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
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Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
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Light-weight glBindTexture for internal use.
Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
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Changes in this series use this function.
This reverts commit 048de9e34a2214371481143cddcaa53f52468c6b.
Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
Cc: Samuel Pitoiset <[email protected]>
Cc: Timothy Arceri <[email protected]>
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Also, the comment on _mesa_record_error was wrong.
dd_function_table::Error was not called because that function does not
exist.
Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
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The in-place resolve probably has some additional restrictions when not
operating on a super tiled surface. Disable it on non-supertiled surfaces
for now to work around a GPU hang.
Fixes: 78ade659569e ("etnaviv: Do GC3000 resolve-in-place when possible")
Cc: [email protected]
Signed-off-by: Lucas Stach <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Overall it does not really help or hurt. The deferred demo gets 1%
improvement and some games a 3% decrease, so I don't think this
should be enabled by default.
But with the code upstream it is easier to experiment with it.
v2: Remove initializing the registers from si_emit_config.
Reviewed-by: Dave Airlie <[email protected]>
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Letting it be disabled by default.
Reviewed-by: Dave Airlie <[email protected]>
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These are the same, we don't need a separate opcode enum per backend.
Reviewed-by: Jason Ekstrand <[email protected]>
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For GL_ARB_compute_variable_group_size
Reported-by: Karol Herbst <[email protected]>
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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v2: Add preventative comment (Ilia Mirkin)
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Pierre Moreau <[email protected]>
Signed-off-by: Rhys Kidd <[email protected]>
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Reviewed-by: Pierre Moreau <[email protected]>
Signed-off-by: Rhys Kidd <[email protected]>
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Reviewed-by: Pierre Moreau <[email protected]>
Signed-off-by: Rhys Kidd <[email protected]>
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piglit doesn't care, but I'm quite confident that the size actually bound
as range should be reported and not the base size of the resource (and
some quick piglit test hacking confirms this).
Also, the array in the constant buffer looks overallocated by a factor of 4.
For eg, also decrease the size by another factor of 2 by using the same
constant slot for both buffer size (required for txq for TBOs) and the number
of layers for cube arrays, as these are mutually exclusive. Could of course use
some more logic and only actually do this for the samplers/images/buffers where
it's required rather than for all, but ah well...
Reviewed-by: Dave Airlie <[email protected]>
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Maybe upon a time it wasn't always true.
Reviewed-by: Dave Airlie <[email protected]>
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Those are implemented as texture sampling, so we need to make the
texture TC-compatible too.
Fixes: 34d23e82ca9 "radv: set some dcc parameters depending on if texture will be sampled"
Reviewed-by: Fredrik Höglund <[email protected]>
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Before this DCC was in practice disabled for most games. This
enables practical DCC use. Expect a 5-10% perf increase on a
bunch of games on vega @ 4k.
Reviewed-by: Dave Airlie <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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If both source and destination are DCC compressed, and their formats
are not compatible, we need to decompress one of them to make
sure we can do reinterpretation (which needs src format == dst format)
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Reviewed-by: Dave Airlie <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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Apps can use this for render feedback loops, where things are
defined if they render each pixel only once. However, DCC fails
here, as the level of coherence is a block not a pixel, so disable it.
This is also going to help implementing other stuff.
Even if we optimize this later to only happen if there actually is
a loop (if possible at all ...), then the machinery is still useful
to exclude images accessible by the SDMA queue when that is implemented.
Reviewed-by: Dave Airlie <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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It should already be valid there + the RB will update it during
rendering.
Reviewed-by: Dave Airlie <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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For fast clear eliminate and decompressions, we always use the most compressed
format.
For clears, the code already creates a renderpass on demand with the exact same
layout as specified.
Otherwise we start distinguishing between GENERAL and TRANSFER_DST_OPTIMAL.
Reviewed-by: Dave Airlie <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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We do an in place copy where we read compressed and write decompressed.
By doing this in sizes that cover entire DCC blocks and waiting for all
reads in the block before starting to write we avoid corruption.
In the end we clear the DCC metadata to 0xffffffff.
Reviewed-by: Dave Airlie <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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Simplifies failure paths. The caller already calls
radv_device_finish_meta_fast_clear_flush_state on failure.
Reviewed-by: Dave Airlie <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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We don't get a layout when binding to a descriptor set, but can
assume that the LAYOUT is GENERAL.
For DCC stores with the DCC bits set will result in a hang, so
better be safe than sorry.
Reviewed-by: Dave Airlie <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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This reverts commit 59515780433837ad3975f8ed20b93cf2fe6870e5.
The mentioned commit causes a hang in DoW3 on Vega.
Fixes: 59515780433 "radv/gfx9: fix block compression texture views."
Acked-by: Dave Airlie <[email protected]>
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The SVGA_NEW_FS flag is needed since we now examine the fragment
shader's fs_shadow_compare_units flags. The SVGA_NEW_TEXTURE_FLAGS
flag is not needed since it's only for pre-VGPU10.
No piglit changes. This doesn't fix any known issues but it could
pop up somewhere. Suggested by Charmaine.
Reviewed-by: Charmaine Lee <[email protected]>
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This should fix:
dEQP-VK.pipeline.sampler.view_type.*.format.b4g4r4a4_unorm_pack16.address_modes.all_mode_clamp_to_border_opaque_black
and a few others in that area.
Fixes: b11c4a5546 (radv: add texture descriptor/fmask/cmask support for GFX9)
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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amdvlk is probably more subtle than this but it never uses
the inv cb/db variants, we fail some CTS tests without this.
Fixes:
dEQP-VK.renderpass.dedicated_allocation.formats.d32_sfloat_s8_uint.input*.
Fixes: c2fbeb7ca05 (radv: add GFX9 cache flushing support.)
Reviewed-by: Bas Nieuwenhuizen <[email protected]> (for now :-)
Signed-off-by: Dave Airlie <[email protected]>
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This ports a fix from amdvlk, to fix the sizing for mip levels
when block compressed images are viewed using uncompressed views.
Fixes:
dEQP-VK.image.texel_view_compatible.graphic.extended*bc*
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This fixes some of the broken:
dEQP-VK.synchronization.op.multi_queue.*64x64x8* tests.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This fixes some of the broken:
dEQP-VK.synchronization.op.multi_queue.*64x64x8* tests.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This fixes some of the broken:
dEQP-VK.synchronization.op.multi_queue.*64x64x8* tests.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Previously, we were flagging the instruction state buffer for capture
but not surface state or dynamic state. We want those captured too.
Reviewed-by: Lionel Landwerlin <[email protected]>
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Some older versions of the Vulkan driver didn't properly tag dynamic
state as needing to be captured. Also, this prevents crashes when
looking at dumps on older kernels.
Reviewed-by: Lionel Landwerlin <[email protected]>
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We were walking the sections, printing the batches, and then freeing
them in one pass. If the batch happens to reference any earlier
sections (which it almost certainly will since it's at the end), we will
access freed memory.
Reviewed-by: Lionel Landwerlin <[email protected]>
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This reverts commit 7665383a33f9ce9256aa121cbe4d3bd948dff145 and is
squashed together with https://patchwork.freedesktop.org/patch/194610/
(spirv: avoid infinite loop / freeze in vtn_cfg_walk_blocks()) which
fixes https://bugs.freedesktop.org/show_bug.cgi?id=104359 properly.
Fixes: 9702fac68e (spirv: consider bitsize when handling OpSwitch cases)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104359
Reviewed-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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This can happen when there's no active fragment shader, such as
when using transform feedback. This wasn't hit by any Piglit test
but is hit by Daniel Rákos' Nature demo. VMware bug 2026189.
Reviewed-by: Charmaine Lee <[email protected]>
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Change 59f458cd8703b97b31b8 added more enums to glsl_base_type. We
have to bump up the size of the bitfields for fields of this type
for MSVC. Also, add another assertion to catch another place where
this enum bitfield is used.
Reviewed-by: Neha Bhende <[email protected]>
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It's legal to a pipeline stat query on a compute queue,
but we'd emit the wrong packet here. This should fix it to emit
the correct packet.
Noticed while inspecting the mpv hang.
Fixes: ad61eac250 (radv: factor out eop event writing code. (v2))
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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The event emission wasn't sending the correct packet for gfx8 compute
queues, which explains why it works on vega fine.
This fixes the mpv vulkan hang.
Fixes: ad61eac250 (radv: factor out eop event writing code. (v2))
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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These seem mildly unstable on vega, crashing CTS in various fun ways,
and looks like leaking memory.
Disable for now, but leave the option to enable them.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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We destroy the pools but don't free the container.
This fixes:
dEQP-VK.wsi.xlib.swapchain.simulate_oom*
Fixes: d50937f137 (vulkan/wsi: Implement prime in a completely generic way)
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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HW resolve does not support it either.
Fixes: 2a04f5481df "radv/meta: select resolve paths"
Reviewed-by: Dave Airlie <[email protected]>
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Framebuffer is from 0,0, not (dst.x, dst.y).
Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex shaders"
Reviewed-by: Dave Airlie <[email protected]>
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The position start at (dst.x, dst.y), so if we want the source to
start at (src.x, src.y), we have to offset by (src.x-dst.x,src.y-dst.y).
Haven't tested that this fixed anything yet, but found by inspection.
Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex shaders"
Reviewed-by: Dave Airlie <[email protected]>
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