| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | radeon/llvm: fix opcode for RECIP_UINT_r600 | Vadim Girlin | 2012-05-25 | 1 | -1/+1 |
| * | radeon/llvm/loader: convert hardcoded gpu name to option | Vadim Girlin | 2012-05-25 | 1 | -2/+3 |
| * | r600g: add RECIP_INT, PRED_SETE_INT to r600_bytecode_get_num_operands | Vadim Girlin | 2012-05-25 | 1 | -0/+2 |
| * | i915g: Check for geometry shader earlier in i915_set_constant_buffer. | Vinson Lee | 2012-05-24 | 1 | -4/+4 |
| * | scons: Fix SCons build infrastructure for FreeBSD. | Vinson Lee | 2012-05-24 | 3 | -3/+3 |
| * | radeon/llvm: Lower UDIV using the Selection DAG | Tom Stellard | 2012-05-24 | 8 | -212/+126 |
| * | radeon/llvm: Remove auto-generated AMDIL->ISA conversion code | Tom Stellard | 2012-05-24 | 14 | -280/+28 |
| * | radeon/llvm: Remove AMDIL instructions MULHI, SMUL | Tom Stellard | 2012-05-24 | 3 | -10/+5 |
| * | radeon/llvm: Remove AMDIL bitshift instructions (SHL, SHR, USHR) | Tom Stellard | 2012-05-24 | 8 | -693/+6 |
| * | radeon/llvm: Remove AMDIL FTOI and ITOF instructions | Tom Stellard | 2012-05-24 | 7 | -316/+7 |
| * | radeon/llvm: Remove AMDIL EXP* instructions | Tom Stellard | 2012-05-24 | 5 | -15/+7 |
| * | radeon/llvm: Remove AMDIL ADD instructions | Tom Stellard | 2012-05-24 | 6 | -179/+4 |
| * | radeon/llvm: Remove AMDIL binary instrutions (OR, AND, XOR, NOT) | Tom Stellard | 2012-05-24 | 8 | -422/+8 |
| * | radeon/llvm: Remove AMDILMachinePeephole pass | Tom Stellard | 2012-05-24 | 4 | -177/+0 |
| * | radeon/llvm: Remove AMDIL CMP instructions and associated lowering code | Tom Stellard | 2012-05-24 | 3 | -661/+22 |
| * | radeon/llvm: Remove AMDIL ROUND_NEAREST instruction | Tom Stellard | 2012-05-24 | 4 | -6/+6 |
| * | radeon/llvm: Remove AMDIL ROUND_POSINF instruction | Tom Stellard | 2012-05-24 | 4 | -6/+10 |
| * | radeon/llvm: Add custom SDNode for FRACT | Tom Stellard | 2012-05-24 | 6 | -6/+10 |
| * | radeon/llvm: Use -1 as true value for SET* integer instructions | Tom Stellard | 2012-05-24 | 3 | -32/+28 |
| * | radeon/llvm: Handle SETGE_INT, SETGE_UINT, and SETGT_UINT opcodes | Tom Stellard | 2012-05-24 | 1 | -0/+6 |
| * | radeon/llvm: Avoid error with SI in EmitInstrWithCustomInserter() | Tom Stellard | 2012-05-24 | 1 | -0/+1 |
| * | tgsi: Initialize Padding struct fields. | Vinson Lee | 2012-05-23 | 1 | -0/+4 |
| * | i965: Gut the separate OpenGL ES extension enabling. | Kenneth Graunke | 2012-05-23 | 7 | -148/+4 |
| * | mesa: Remove the OES_draw_texture extension from ES2. | Kenneth Graunke | 2012-05-23 | 1 | -1/+1 |
| * | i965: use cut index to handle primitive restart when possible | Jordan Justen | 2012-05-23 | 1 | -1/+80 |
| * | i965: add flag to enable cut_index | Jordan Justen | 2012-05-23 | 4 | -1/+12 |
| * | i965: create code path to handle primitive restart in hardware | Jordan Justen | 2012-05-23 | 7 | -0/+112 |
| * | glsl/tests: Add .gitignore for uniform initialization unit test. | Paul Berry | 2012-05-23 | 1 | -0/+1 |
| * | glsl/constant propagation: kill whole var if LHS involves array indexing. | Paul Berry | 2012-05-23 | 1 | -1/+20 |
| * | glsl/tests: Add test for uniform initialization by the linker | Ian Romanick | 2012-05-23 | 5 | -1/+1186 |
| * | mesa: Use initializers to configure samplers | Ian Romanick | 2012-05-23 | 1 | -32/+9 |
| * | ir_to_mesa: Don't set initial uniform values again | Ian Romanick | 2012-05-23 | 1 | -104/+0 |
| * | ir_to_mesa: Propagate initial values in _mesa_associate_uniform_storage | Ian Romanick | 2012-05-23 | 1 | -0/+9 |
| * | glsl: Propagate sampler uniform initializers to gl_shader_program::SamplerUnits | Ian Romanick | 2012-05-23 | 1 | -0/+9 |
| * | glsl: Initialize samplers to 0, propagate sampler values to the gl_program | Ian Romanick | 2012-05-23 | 2 | -3/+11 |
| * | glsl: Set initial values for uniforms in the linker | Ian Romanick | 2012-05-23 | 4 | -0/+178 |
| * | i965/gen6+: Add support for GL_ARB_blend_func_extended. | Eric Anholt | 2012-05-23 | 13 | -8/+112 |
| * | mesa: Keep a computed value for dual source blend func with each buffer. | Eric Anholt | 2012-05-23 | 3 | -17/+32 |
| * | i965/gen6+: Add support for fast depth clears. | Eric Anholt | 2012-05-23 | 8 | -12/+150 |
| * | i965/gen6: Add CC viewport state setup to blorp code. | Eric Anholt | 2012-05-23 | 1 | -0/+26 |
| * | i965/gen7: Add CC viewport setup to blorp code. | Eric Anholt | 2012-05-23 | 1 | -0/+21 |
| * | i965: Drop a layer of indirection in doing HiZ resolves. | Eric Anholt | 2012-05-23 | 7 | -120/+9 |
| * | i965: Replace intel_need_resolve with the hiz ops it maps to. | Eric Anholt | 2012-05-23 | 3 | -17/+21 |
| * | i965: Add an interface for doing hiz ops from C code. | Eric Anholt | 2012-05-23 | 4 | -15/+44 |
| * | i965: Rename the clear function for this driver. | Eric Anholt | 2012-05-23 | 1 | -2/+2 |
| * | i965: Simplify the remaining clear logic by relying on the meta clear. | Eric Anholt | 2012-05-23 | 1 | -47/+11 |
| * | i965: Switch blit color clears to tri clears on gen4/5. | Eric Anholt | 2012-05-23 | 1 | -28/+2 |
| * | i965: Remove dead logic for non-tri depth/stencil clears. | Eric Anholt | 2012-05-23 | 1 | -26/+2 |
| * | i965: We always have GLSL, so always use it for tri clears. | Eric Anholt | 2012-05-23 | 1 | -4/+1 |
| * | i915: Drop gen4+ code from the forked clear code. | Eric Anholt | 2012-05-23 | 1 | -10/+1 |
