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* intel/isl: Move isl_calc_array_pitch_el_rows higher upJason Ekstrand2017-06-011-117/+117
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/isl: Remove the device parameter from isl_tiling_get_infoJason Ekstrand2017-06-015-32/+17
| | | | | | | | | We were only using it for validating that we don't use Ys/Yf on gen8 and earlier. Removing it from isl_tiling_get_info lets us remove it from a bunch of other things that had no business needing a hardware generation. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Rework Sandy Bridge HiZ and stencil layoutsJason Ekstrand2017-06-015-29/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sandy Bridge does not technically support mipmapped depth/stencil. In order to work around this, we allocate what are effectively completely separate images for each miplevel, ensure that they are page-aligned, and manually offset to them. Prior to layered rendering, this was a simple matter of setting a large enough halign/valign. With the advent of layered rendering, however, things got more complicated. Now, things weren't as simple as just handing a surface off to the hardware. Any miplevel of a normally mipmapped surface can be considered as just an array surface given the right qpitch. However, the hardware gives us no capability to specify qpitch so this won't work. Instead, the chosen solution was to use a new "all slices at each LOD" layout which laid things out as a mipmap of arrays rather than an array of mipmaps. This way you can easily offset to any of the miplevels and each is a valid array. Unfortunately, the "all slices at each lod" concept missed one fundamental thing about SNB HiZ and stencil hardware: It doesn't just always act as if you're always working with a non-mipmapped surface, it acts as if you're always working on a non-mipmapped surface of the same size as LOD0. In other words, even though it may only write the upper-left corner of each array slice, the qpitch for the array is for a surface the size of LOD0 of the depth surface. This mistake causes us to under-allocate HiZ and stencil in some cases and also to accidentally allow different miplevels to overlap. Sadly, piglit test coverage didn't quite catch this until I started making changes to the resolve code that caused additional HiZ resolves in certain tests. This commit switches Sandy Bridge HiZ and stencil over to a new scheme that lays out the non-zero miplevels horizontally below LOD0. This way they can all have the same qpitch without interfering with each other. Technically, the miplevels still overlap, but things are spaced out enough that each page is only in the "written area" of one LOD. Cc: "17.0 17.1" <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Drop duplicate shadow variable.Kenneth Graunke2017-06-011-1/+0
| | | | | | We already initialized this at the top of the function. Trivial.
* automake: Link all libGL.so variants with -Bsymbolic.Jose Fonseca2017-06-012-0/+2
| | | | | | | | | | | | | | | | | | We were linking src/glx with -Bsymbolic, but not the classic/gallium X11 libGL.so. But it's always a good idea to build all libGL.so and all DRI drivers with -Bsymbolic, otherwise they might resolve symbols from the 3rd party application executable or shared libraries, which is _never_ what we want. In particular, this can happen when intercepting OpenGL calls with apitrace, before https://github.com/apitrace/apitrace/commit/63194b2573176ef34efce1a5c8b08e624b8dddf5 Cc: [email protected] Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965/dri: Fix bad GL error in intel_create_winsys_renderbuffer()Chad Versace2017-06-011-5/+1
| | | | | | | | | | | This function never occurs in the callchain of a GL function. It occurs only in the callchain of eglCreate*Surface and the analogous paths for GLX. Therefore, even if a thread does have a bound GL context, emitting a GL error here is wrong. A misplaced GL error, when no GL call is made, can confuse clients. Cc: [email protected] Reviewed-by: Ian Romanick <[email protected]>
* i965: Cleanup in intel_create_winsys_renderbuffer()Chad Versace2017-06-011-5/+2
| | | | | | | Combine variable declarations and assignments. Trivial cleanup. Reviewed-by: Ian Romanick <[email protected]>
* i965: Remove bad assert on isl_formatChad Versace2017-06-011-1/+0
| | | | | | | translate_tex_format() asserted that isl_format != 0. But 0 is a valid format, ISL_FORMAT_R32G32B32A32_FLOAT. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Fix return type of translate_tex_format()Chad Versace2017-06-013-6/+6
| | | | | | | | | It returns an isl_format, not GLuint BRW_FORMAT. I updated every translate_tex_format() found by git-grep. No change in behavior. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Fix return type of brw_isl_format_for_mesa_format() [v2]Chad Versace2017-06-013-8/+10
| | | | | | | | | | | It returns an isl_format, not uint32_t BRW_FORMAT. I updated every brw_isl_format_for_mesa_format() found by git-grep. No change in behavior. v2: Rebased atop Anuj's patch, which has some of the same fixes. Reviewed-by: Jason Ekstrand <[email protected]> (v1)
* i965: Remove an extra semicolonAnuj Phogat2017-06-011-1/+1
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]>
* i965: Rename brw_format variable names to isl_formatAnuj Phogat2017-06-013-7/+9
| | | | | | | | | | This patch makes non functional changes. Renaming is just to make the code more readable. V2: update the types to "enum isl_format" Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Reject unsupported formats in glEGLImageTargetTexture2D()Chad Versace2017-06-011-0/+4
| | | | | | | | | | If the EGLImage's format is not a supported texture format according to brw_surface_formats.c, then refuse to create the miptree. This follows the precedent in glEGLImageRenderbufferStorage (implemented by intel_image_target_renderbuffer_storage), which rejects the EGLImage's format if is not renderable. Reviewed-by: Kenneth Graunke <[email protected]>
* genxml: Make 3DSTATE_CONSTANT_BODY on Gen7+ use arrays.Kenneth Graunke2017-06-016-42/+32
| | | | | | This will let us initialize the constant buffers with loops. Reviewed-by: Lionel Landwerlin <[email protected]>
* genxml: Fix decoder to print the array element on field members.Kenneth Graunke2017-06-011-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | Previously we'd print things like: 0xfffbb568: 0x00010000 : Dword 1 ReadLength: 0 ReadLength: 1 0xfffbb568: 0x00000001 : Dword 1 ReadLength: 1 ReadLength: 0 instead of the more obvious: 0xfffbb568: 0x00010000 : Dword 1 ReadLength[0]: 0 ReadLength[1]: 1 0xfffbb568: 0x00000001 : Dword 1 ReadLength[2]: 1 ReadLength[3]: 0 (Yes, the ralloc context here is bogus - the decoder leaks just about everything. We need to use proper ralloc contexts someday...) Acked-by: Lionel Landwerlin <[email protected]>
* genxml: Fix decoding of array groups.Kenneth Graunke2017-06-011-1/+1
| | | | | | | | | | | | | | | | | | | If you had a group as the first element of a struct, i.e. <struct name="3DSTATE_CONSTANT_BODY" length="10"> <group count="4" start="0" size="16"> <field name="ReadLength" start="0" end="15" type="uint"/> </group> ... </struct> we would get a group_offset of 0, causing create_field() to think the field wasn't in a group, and fail to offset forward for successive array elements. So we'd mark all the array elements as offset 0. Using ctx->group->elem_size is a better check for "are we in a group?". Acked-by: Lionel Landwerlin <[email protected]>
* genxml: Fix decoder for groups with multiple fields.Kenneth Graunke2017-06-011-4/+2
| | | | | | | | | | | | | | | | | If you have something like: <group count="0" start="96" size="32"> <field name="Entry_0" start="0" end="15" type="GATHER_CONSTANT_ENTRY"/> <field name="Entry_1" start="16" end="31" type="GATHER_CONSTANT_ENTRY"/> </group> We would reset ctx->group_count to 0 after processing the first field, so the second would not have a group count. This is largely untested, as the only groups with multiple fields are packets we don't emit in Mesa. Found by inspection. Acked-by: Lionel Landwerlin <[email protected]>
* genxml: Fix parsing of address fields in groups.Kenneth Graunke2017-06-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For example, <group count="4" start="64" size="64"> <field name="Pointer" start="5" end="63" type="address"/> </group> used to generate: const uint64_t v2_address = __gen_combine_address(data, &dw[2], values->Pointer, 0); ... const uint64_t v4_address = __gen_combine_address(data, &dw[4], values->Pointer, 0); ... but now generates code with proper subscripts: const uint64_t v2_address = __gen_combine_address(data, &dw[2], values->Pointer[0], 0); ... const uint64_t v4_address = __gen_combine_address(data, &dw[4], values->Pointer[1], 0); ... Reviewed-by: Lionel Landwerlin <[email protected]>
* util/rand_xor: add missing include statementsNicolas Dechesne2017-06-011-0/+1
| | | | | | | | | | | | | | Fixes for: src/util/rand_xor.c:60:13: error: implicit declaration of function 'open' [-Werror=implicit-function-declaration] int fd = open("/dev/urandom", O_RDONLY); ^~~~ src/util/rand_xor.c:60:34: error: 'O_RDONLY' undeclared (first use in this function) int fd = open("/dev/urandom", O_RDONLY); ^~~~~~~~ Signed-off-by: Nicolas Dechesne <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* etnaviv: always do cpu_fini in transfer_unmapLucas Stach2017-06-011-3/+6
| | | | | | | | | | | | | | | | | The cpu_fini() call pushes the buffer back into the GPU domain, which needs to be done for all buffers, not just the ones with CPU written content. The etnaviv kernel driver currently doesn't validate this, but may start to do so at a later point in time. If there is a temporary resource the fini needs to happen before the RS uses this one as the source for the upload. Also remove an invalid comment about flushing CPU caches, cpu_fini takes care of everything involved in this. Fixes: c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs") Cc: [email protected] Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Reviewed-By: Wladimir J. van der Laan <[email protected]>
* glsl: fix a crash in ir_print_visitor() for bindless samplers/imagesSamuel Pitoiset2017-06-011-1/+5
| | | | | | | | | Bindless samplers/images are represented with 64-bit unsigned integers and they can be assigned with explicit constructors. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: teach opt_array_splitting about bindless imagesSamuel Pitoiset2017-06-011-2/+13
| | | | | | | | Memory/format layout qualifiers shouldn't be lost when arrays of images are splitted by this pass. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: teach opt_structure_splitting about images in structuresSamuel Pitoiset2017-06-011-2/+21
| | | | | | | | | GL_ARB_bindless_texture allows images to be declared inside structures, but when memory/format qualifiers are used, they should be propagated when structures are splitted. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: fix broken indentation in do_structure_splitting()Samuel Pitoiset2017-06-011-16/+13
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: handle format layout qualifiers for struct with array of imagesSamuel Pitoiset2017-06-011-1/+2
| | | | | | | | | | | This handles a situation like: struct { layout (r32f) image2D imgs[6]; } s; Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: handle memory qualifiers for struct with array of imagesSamuel Pitoiset2017-06-011-3/+4
| | | | | | | | | | | This handles a situation like: struct { image2D imgs[6]; } s; Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* nvc0: Clean up unnecessary includes from gallium/auxiliary/vl/Rhys Kidd2017-06-011-3/+0
| | | | | Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* i965: Simplify SO_DECL handling.Kenneth Graunke2017-06-011-28/+13
| | | | | | | We can initialize structs directly, avoid some temporaries, and cut out about half of the skip component handling. Reviewed-by: Rafael Antognolli <[email protected]>
* i965: Make a local for linked_xfb->Outputs[i], to shorten things.Kenneth Graunke2017-06-011-9/+10
| | | | | | This seems a bit more readable. Reviewed-by: Rafael Antognolli <[email protected]>
* i965: Move SOL PSIZ hacks from draw time to link time.Kenneth Graunke2017-06-013-34/+41
| | | | | | | | | We can just update the gl_transform_feedback_info fields at link time to make the VUE header fields have the right location and component. Then we don't need to handle them specially at draw time, which is expensive. Reviewed-by: Rafael Antognolli <[email protected]>
* mesa/main: replace remaining uses of IROUND() in GetUniform*() by round()Iago Toral Quiroga2017-06-011-2/+2
| | | | | | | | | These were correct since they were used only in conversions to signed integers, however this makes the implementation a bit more is more consistent and reduces chances of propagating use of these macros to unsigned cases in the future, which would not be correct. Reviewed-by: Matt Turner <[email protected]>
* mesa/main: conversion from float in GetUniformi64v requires rounding to nearestIago Toral Quiroga2017-06-011-1/+1
| | | | | | | | As we do for all other cases of float/double conversions to integers. v2: use round() instead of IROUND() macros (Iago) Reviewed-by: Matt Turner <[email protected]>
* mesa/main: Add conversion from double to uint64/int64 in GetUniform*i64v()Iago Toral Quiroga2017-06-011-0/+14
| | | | | | | | v2: - need unsigned rounding for double->uint64 conversion (Nicolai) - use round() instead of IROUND() macros (Iago) Reviewed-by: Matt Turner <[email protected]>
* mesa/main: Clamp GetUniformui64v values to be >= 0Iago Toral Quiroga2017-06-011-1/+45
| | | | | | | | | | Like we do for the 32-bit case. v2: - need unsigned rounding for float->uint64 conversion (Nicolai) - use roundf() instead of IROUND() macros (Iago) Reviewed-by: Matt Turner <[email protected]>
* mesa/main: Clamp GetUniformuiv values to be >= 0Kenneth Graunke2017-06-011-11/+51
| | | | | | | | | | | | | | | | | | | | | | | | Section 2.2.2 (Data Conversions For State Query Commands) of the OpenGL 4.5 October 24th 2016 specification says: "If a command returning unsigned integer data is called, such as GetSamplerParameterIuiv, negative values are clamped to zero." v2: uint to int conversion should clamp to INT_MAX (Nicolai) v3 (Iago) - Add conversions conversions from 64-bit integer paths - Rebase on master v4: - need unsigned rounding for float/double->uint conversions (Nicolai) - use round{f}() instead of IROUND() macros (Iago) Fixes: KHR-GL45.gpu_shader_fp64.state_query Reviewed-by: Nicolai Hähnle <[email protected]> (v2) Reviewed-by: Matt Turner <[email protected]>
* mesa/main: fix indentation in _mesa_get_uniform()Iago Toral Quiroga2017-06-011-98/+101
| | | | | | | v2: also change the style of the large conditional in that function to follow the style from most other parts of Mesa (Nicolai) Reviewed-by: Matt Turner <[email protected]>
* r100: Silence numerous unused this or that warningsIan Romanick2017-05-311-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | radeon_fbo.c: In function ‘radeon_map_renderbuffer_s8z24’: radeon_fbo.c:147:50: warning: unused parameter ‘ctx’ [-Wunused-parameter] radeon_map_renderbuffer_s8z24(struct gl_context *ctx, ^~~ radeon_fbo.c: In function ‘radeon_map_renderbuffer_z16’: radeon_fbo.c:186:48: warning: unused parameter ‘ctx’ [-Wunused-parameter] radeon_map_renderbuffer_z16(struct gl_context *ctx, ^~~ radeon_fbo.c: In function ‘radeon_unmap_renderbuffer_s8z24’: radeon_fbo.c:344:52: warning: unused parameter ‘ctx’ [-Wunused-parameter] radeon_unmap_renderbuffer_s8z24(struct gl_context *ctx, ^~~ radeon_fbo.c: In function ‘radeon_unmap_renderbuffer_z16’: radeon_fbo.c:377:50: warning: unused parameter ‘ctx’ [-Wunused-parameter] radeon_unmap_renderbuffer_z16(struct gl_context *ctx, ^~~ radeon_fbo.c: In function ‘radeon_nop_alloc_storage’: radeon_fbo.c:624:75: warning: unused parameter ‘rb’ [-Wunused-parameter] radeon_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, ^~ radeon_fbo.c:625:12: warning: unused parameter ‘internalFormat’ [-Wunused-parameter] GLenum internalFormat, GLuint width, GLuint height) ^~~~~~~~~~~~~~ radeon_fbo.c:625:35: warning: unused parameter ‘width’ [-Wunused-parameter] GLenum internalFormat, GLuint width, GLuint height) ^~~~~ radeon_fbo.c:625:49: warning: unused parameter ‘height’ [-Wunused-parameter] GLenum internalFormat, GLuint width, GLuint height) ^~~~~~ radeon_fbo.c: In function ‘radeon_bind_framebuffer’: radeon_fbo.c:696:74: warning: unused parameter ‘fbread’ [-Wunused-parameter] struct gl_framebuffer *fb, struct gl_framebuffer *fbread) ^~~~~~ radeon_fbo.c: In function ‘radeon_validate_framebuffer’: radeon_fbo.c:832:19: warning: unused variable ‘radeon’ [-Wunused-variable] radeonContextPtr radeon = RADEON_CONTEXT(ctx); ^~~~~~ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* r100: Use _mesa_get_format_base_format in radeon_update_wrapperIan Romanick2017-05-311-1/+1
| | | | | | | | | | | | | | The wrapper is for a renderbuffer around a texture. Textures can have formats (e.g., 3) that aren't valide for API generated renderbuffers. _mesa_base_fbo_format will return 0, but _mesa_get_format_base_format will return the base format of RGB. Fixes a crashes in piglit tests fbo-alphatest-formats (all subtests pass) and fbo-colormask-formats (some subtests pass, some fail). Signed-off-by: Ian Romanick <[email protected]> Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]>
* r100,r200: Don't assume glVisual is non-NULL during context creationIan Romanick2017-05-313-3/+1
| | | | | | | | | | | Thanks to EGL_MESA_configless_context, the visual pointer can be NULL. Fixes a segfault (or assertion failure) in piglit's egl-configless-context test. Signed-off-by: Ian Romanick <[email protected]> Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]>
* r100: Don't assume that the base mipmap of a texture existsIan Romanick2017-05-311-4/+10
| | | | | | | | Fixes crashes in piglit's gl-1.2-texture-base-level. Signed-off-by: Ian Romanick <[email protected]> Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]>
* r600/eg: add support for tracing IBs after a hang.Dave Airlie2017-06-0111-7/+785
| | | | | | | | | This is a poor man's version of radeonsi ddebug stuff, this should get hooked into that infrastructure, and grow more stuff, but for now, just create R600_TRACE var that points to a file that you want to dump the last IB to. Signed-off-by: Dave Airlie <[email protected]>
* glsl/lower_int64: only set progress when something is lowered.Dave Airlie2017-06-011-4/+1
| | | | | | | | Otherwise we'd get progress continually set if we had non 64-bit versions of these ops. Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Revert HTILE reset word to 0xFFFFFFFF.Bas Nieuwenhuizen2017-05-311-1/+1
| | | | | | | | 0x30f regressed mad max. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Dave Airlie <[email protected]> Fixes: df91abfe5af "radv: Use correct clear words for HTILE."
* egl/android: Drop unused 'format' param in get_back_bo()Chad Versace2017-05-311-2/+2
| | | | | Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl/android: Align channel masks in HAL_PIXEL_FORMAT tableChad Versace2017-05-311-4/+4
| | | | | | | Improves readability. No change in behavior. Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl/drm: remove temporary fd variableEric Engestrom2017-05-311-8/+6
| | | | | | | | | | | | In all codepaths, this var ends up assigned to the struct, except one: a cleanup codepath, where the `close()` was removed, leading to fd leaks. Remove the temp fd and assign to the struct field directly instead. CovID: 1213930 Fixes: 7ec07beedf486d8ab901 ("egl/drm: make use of the dri2_display_destroy() helper") Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Eric Engestrom <[email protected]>
* mesa: throw an INVALID_OPERATION error in get_texobj_by_name()Samuel Pitoiset2017-05-311-50/+11
| | | | | | | | Because get_texobj_by_name() can already throw a INVALID_ENUM error, it makes more sense to add a check directly there. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: add new 'name' parameter to get_texobj_by_name()Samuel Pitoiset2017-05-311-13/+12
| | | | | | | | To display better function names when INVALID_OPERATION is returned. Requested by Timothy. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: remove unused si_pm4_state::compute_pktSamuel Pitoiset2017-05-312-4/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: remove chip_class define from si_pm4.hSamuel Pitoiset2017-05-311-1/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
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