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* st/mesa: make st_draw_vbo staticMarek Olšák2017-05-103-14/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove upload code for zero-stride vertex attribsMarek Olšák2017-05-101-26/+8
| | | | | | | st/mesa takes care of it now. Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/mesa: upload zero-stride vertex attributes hereMarek Olšák2017-05-103-16/+48
| | | | | | | | | | | This is the best place to do it. Now drivers without u_vbuf don't have to do it. v2: use correct upload size and optimal alignment Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEXMarek Olšák2017-05-1017-0/+18
| | | | | | | The next patch will use it. This is really for svga and GL2-level drivers. Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/mesa: simplify the signature of get_client_arrayMarek Olšák2017-05-101-10/+8
| | | | | | Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: remove vpv->num_inputs dereferences in st_update_arrayMarek Olšák2017-05-101-20/+20
| | | | | | Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: fold error handling into setup_(non_)interleaved_attribsMarek Olšák2017-05-101-18/+10
| | | | | | Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: fold cso calls into setup_(non_)interleaved_attribsMarek Olšák2017-05-101-46/+45
| | | | | | Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: don't call util_draw_init_info in st_draw_vboMarek Olšák2017-05-101-2/+8
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* gallium: remove pipe_index_buffer and set_index_bufferMarek Olšák2017-05-10107-1217/+667
| | | | | | | | | | | | | | pipe_draw_info::indexed is replaced with index_size. index_size == 0 means non-indexed. Instead of pipe_index_buffer::offset, pipe_draw_info::start is used. For indexed indirect draws, pipe_draw_info::start is added to the indirect start. This is the only case when "start" affects indirect draws. pipe_draw_info::index is a union. Use either index::resource or index::user depending on the value of pipe_draw_info::has_user_indices. v2: fixes for nine, svga
* gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytesMarek Olšák2017-05-1014-113/+152
| | | | For faster initialization of non-indirect draws.
* gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytesMarek Olšák2017-05-1080-368/+400
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* st/glsl_to_tgsi: make sure resource file for samplers is PROGRAM_SAMPLERSamuel Pitoiset2017-05-101-9/+9
| | | | | | | | Similar to how image resources are handled. That way we are sure that inst->resource.file is PROGRAM_SAMPLER for "bound" samplers. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: silent a compiler warningSamuel Pitoiset2017-05-101-1/+1
| | | | | | | | | | | | | | This fixes: si_shader.c: In function ‘si_shader_dump_stats’: si_shader.c:6704:31: warning: passing argument 1 of ‘si_get_max_workgroup_size’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] si_get_max_workgroup_size(shader); ^~~~~~ si_shader.c:5832:17: note: expected ‘struct si_shader *’ but argument is of type ‘const struct si_shader *’ static unsigned si_get_max_workgroup_size(struct si_shader *shader) Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: use u_bit_scan() in update_program_texture_state()Samuel Pitoiset2017-05-101-9/+5
| | | | | | | | | | The check in update_single_program_texture() can also be removed. v2: - remove unused 's' variable Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: remove never used gl_shader_compiler_options::EmitNoFunctionsSamuel Pitoiset2017-05-102-2/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Elie Tournier <[email protected]>
* radeonsi: dump compute descriptor listsNicolai Hähnle2017-05-101-0/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: dump both enabled and required descriptor slotsNicolai Hähnle2017-05-101-6/+12
| | | | | | This allows a meaningful dump with info == NULL (for compute shaders). Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: dump compute shader as part of debug dumpNicolai Hähnle2017-05-101-0/+11
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move struct si_compute into a headerNicolai Hähnle2017-05-103-21/+52
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: split descriptor list dumpingNicolai Hähnle2017-05-101-16/+21
| | | | | | Prepare for dumping CS descriptor list. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: split shader dumpingNicolai Hähnle2017-05-101-12/+18
| | | | | | Prepare for dumping compute shaders. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: more const qualifiers in shader dump functionsNicolai Hähnle2017-05-102-12/+12
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ddebug: implement dd_dump_launch_gridNicolai Hähnle2017-05-102-1/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ddebug: extract dd_dump_shaderNicolai Hähnle2017-05-101-74/+82
| | | | | | Will be re-used for compute shaders. Reviewed-by: Marek Olšák <[email protected]>
* gallium/util: dump tokens in util_dump_shader_state only if type is TGSINicolai Hähnle2017-05-101-5/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/util: add util_dump_grid_infoNicolai Hähnle2017-05-102-0/+30
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radv: always free nir shaders from modules on stackGrazvydas Ignotas2017-05-102-8/+4
| | | | | | | | | valgrind reports them as leaked, and I could not find anything making a copy of the nir pointer. Also, radv_device_init_meta_blit_color() is already freeing them unconditionally like this. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* anv: don't leak DRM devicesGrazvydas Ignotas2017-05-101-0/+1
| | | | | | | | | After successful drmGetDevices2() call, drmFreeDevices() needs to be called. Fixes: b1fb6e8d "anv: do not open random render node(s)" Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> # radv version
* anv: fix possible stack corruptionGrazvydas Ignotas2017-05-101-1/+1
| | | | | | | | | | drmGetDevices2 takes count and not size. Probably hasn't caused problems yet in practice and was missed as setups with more than 8 DRM devices are not very common. Fixes: b1fb6e8d "anv: do not open random render node(s)" Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965/vec4: Delete the system value infastructureJason Ekstrand2017-05-0911-137/+5
| | | | | | | | | The only thing still using it is INVOCATION_ID for geometry shaders. That's easily enough inlined into the nir_intrinsic_load_invocation_id handling code. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Use NIR to do GS input remappingJason Ekstrand2017-05-099-101/+59
| | | | | | | | We're already doing this in the FS back-end. This just does the same thing in the vec4 back-end. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Move remapping of gl_PointSize to the NIR levelJason Ekstrand2017-05-092-26/+21
| | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/nir: Inline remap_inputs_with_vue_mapJason Ekstrand2017-05-091-27/+22
| | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Use NIR remapping for VS attributesJason Ekstrand2017-05-096-121/+34
| | | | | | | | | | | | | The NIR pass already handles remapping system values to attributes for us so we delete the system value code as part of the conversion. We also change nir_lower_vs_inputs to take an explicit inputs_read bitmask and pass in the inputs_read from prog_data instead from pulling it out of NIR. This is because the version in prog_data may get EDGEFLAG added to it on some old platforms. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/compiler/vs: Move inputs_read handling to generic codeJason Ekstrand2017-05-093-5/+3
| | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Set VERT_BIT_EDGEFLAG based on the VUE mapJason Ekstrand2017-05-092-4/+11
| | | | | | | We also add a nice little comment to make it more clear exactly what happens with the edge flag copy. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Lower gl_VertexID and friends to inputs at the NIR levelJason Ekstrand2017-05-094-70/+74
| | | | | | | | | NIR calls these system values but they come in from the VF unit as vertex data. It's terribly convenient to just be able to treat them as such in the back-end. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vs: Set uses_vertexid and friends from brw_compile_vsJason Ekstrand2017-05-093-11/+17
| | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move multiply by 4 for VS ATTR setup into the scalar backend.Jason Ekstrand2017-05-092-2/+2
| | | | | | | | | | The vec4 backend will want to count in units of vec4s, not scalar components. The simplest solution is to move the multiplication by 4 into the scalar backend. This also improves consistency with how we count varyings. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/nir: Inline remap_vs_attrsJason Ekstrand2017-05-091-30/+26
| | | | | | | | | | Now that we have nice block iterators, there's no good reason for this to be off on it's own. While we're here, we convert to using the NIR const index getters/setters instead of whacking const_index values directly. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Embed the shader_info in the nir_shader againJason Ekstrand2017-05-0956-421/+410
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b changed the shader_info from being embedded into being just a pointer. The idea was that sharing the shader_info between NIR and GLSL would be easier if it were a pointer pointing to the same shader_info struct. This, however, has caused a few problems: 1) There are many things which generate NIR without GLSL. This means we have to support both NIR shaders which come from GLSL and ones that don't and need to have an info elsewhere. 2) The solution to (1) raises all sorts of ownership issues which have to be resolved with ralloc_parent checks. 3) Ever since 00620782c92100d77c660f9783504c6d80fa1d58, we've been using nir_gather_info to fill out the final shader_info. Thanks to cloning and the above ownership issues, the nir_shader::info may not point back to the gl_shader anymore and so we have to do a copy of the shader_info from NIR back to GLSL anyway. All of these issues go away if we just embed the shader_info in the nir_shader. There's a little downside of having to copy it back after calling nir_gather_info but, as explained above, we have to do that anyway. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Make _mesa_primitive_restart_index a static inline in the header.Kenneth Graunke2017-05-092-20/+15
| | | | | | | | | | It's now basically a single expression, so it probably makes sense to have it inlined into the callers. Suggested by Marek. Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* freedreno: fix clang error in fd_get_compute_paramRob Herring2017-05-091-1/+1
| | | | | | | | | | | | With commit 10c17f23b752 ("freedreno: core compute state support"), Android builds fail with the following error: external/mesa3d/src/gallium/drivers/freedreno/freedreno_screen.c:610:17: error: format string is not a string literal (potentially insecure) [-Werror,-Wformat-security] sprintf(ret, ir); ^~ Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* mesa/vbo: fix invalid min/max indexesRob Clark2017-05-091-6/+16
| | | | | | | Fixes: c3f37e9b ("st/mesa: use min_index and max_index directly from vbo") Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* intel: compiler: prevent integer overflowLionel Landwerlin2017-05-091-2/+2
| | | | | | | CID: 1399477, 1399478 (Integer handling issues) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: compiler: remove duplicated codeLionel Landwerlin2017-05-091-12/+0
| | | | | | | CID: 1399470: (Control flow issues) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: gen decoder: don't check for size_t negative valuesLionel Landwerlin2017-05-091-1/+1
| | | | | | | | | We should get either 0 or 1 here. CID: 1373562 (Control flow issues) Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Matt Turner <[email protected]>
* android: i965: add per-gen libmesa_i965_gen{4,45,5} staticMauro Rossi2017-05-091-0/+66
| | | | | | | | | | | | | Needed to fix android building errors: external/mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:148: error: undefined reference to 'gen5_init_atoms' external/mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:150: error: undefined reference to 'gen45_init_atoms' external/mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:152: error: undefined reference to 'gen4_init_atoms' clang++: error: linker command failed with exit code 1 (use -v to see invocation) Fixes: 5a19d0b ("i965: Get real per-gen atom lists") Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* swr: fix polygonmode for front==backGeorge Kyriazis2017-05-082-1/+27
| | | | | | | | | | | | | | | | | | | | Rasterizer core only supports polygonmode front==back. Add logic for populating fillMode for the rasterizer only for that case correctly. Provide enum conversion between mesa enums and core enums. The core renders lines/points as tris. Previously, code would enable stipple for polygonmode != FILL. Modify stipple enable logic so that this works correctly. No regressions in vtk tests. Fixes the following piglit tests: pointsprite gl-1.0-edgeflag-const v2: remove cc stable, and remove "not implemented" assert v3: modified commit message Reviewed-by: Bruce Cherniak <[email protected]>
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