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* i915g: Use tgsi_info from fragment shader insteadJakob Bornecrantz2011-03-051-4/+1
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* i915g: use passthough shader for empty fragment programsDaniel Vetter2011-03-041-3/+15
| | | | | | | | | | The hw doesn't like it - demos/shadowtex is broken. The emitted shader isn't totally empty though, the depth write fixup gets emitted instead. Maybe that one is somewhat fishy, too? Idea for this patch from Jakob Bornecrantz. Signed-off-by: Daniel Vetter <[email protected]>
* egl_dri2: Fix incompatible vfunc-pointer warningBenjamin Franzke2011-03-041-1/+1
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* egl/wayland: Move wayland-egl into a subdirBenjamin Franzke2011-03-047-65/+87
| | | | | This hopefully fixes wayland-egl's dependency resolution for autogenerated wayland-drm headers.
* i965: Apply a workaround for the Ironlake "vertex flashing".Eric Anholt2011-03-041-1/+8
| | | | | | | | | | | | | | This is an awful hack and will hurt performance on Ironlake, but we're at a loss as to what's going wrong otherwise. This is the only common variable we've found that avoids the problem on 4 applications (CelShading, gnome-shell, Pill Popper, and my GLSL demo), while other variables we've tried appear to only be confounding. Neither the specifications nor the hardware team have been able to provide any enlightenment, despite much searching. https://bugs.freedesktop.org/show_bug.cgi?id=29172 Tested by: Chris Lord <[email protected]> (Pill Popper) Tested by: Ryan Lortie <[email protected]> (gnome-shell)
* r300g: preliminary implementation of clamping controlsMarek Olšák2011-03-044-22/+33
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* r300g: implement FP16 alpha testMarek Olšák2011-03-044-8/+55
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* r300g: implement blending for some of non-RGBA8 formatsMarek Olšák2011-03-042-7/+52
| | | | | | | | | | | | | | | | Blending is now fully supported with: - R8_UNORM - R8G8_UNORM - B8G8R8A8_UNORM - R16G16B16A16_FLOAT (r500-only) Blending is partially supported (DST_ALPHA not working) with: - L8A8_UNORM - I8_UNORM - B5G5R5A1_UNORM - B10G10R10A2_UNORM The other formats can't do blending.
* draw: Silence tgsi_emit_sse2 failed messages.José Fonseca2011-03-041-1/+2
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* tgsi: Disable SSE2 code generation.José Fonseca2011-03-041-3/+20
| | | | | | It's broken now that tgsi_exec_machine::Inputs/Ouputs are pointers. Temporary if anybody still cares about tgsi_sse2.c. Permanent otherwise.
* scons: Unbreak mingw cross compilation.José Fonseca2011-03-041-7/+12
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* st/mesa: set PIPE_BIND_RENDER_TARGET for sRGB formats if UNORM is supportedMarek Olšák2011-03-041-2/+9
| | | | | | | | Because the format can be changed to UNORM in a surface. This fixes: state_tracker/st_atom_framebuffer.c:163:update_framebuffer_state: Assertion `framebuffer->cbufs[i]->texture->bind & (1 << 1)' failed.
* scons: Get glsl2 and glcpp programs building correctly.José Fonseca2011-03-041-20/+21
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* glsl/glcpp: Use stdio.h instead of unistd.h.José Fonseca2011-03-041-25/+15
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* glsl: Define YY_NO_UNISTD_H on MSVC.José Fonseca2011-03-042-0/+8
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* gallium: Define __func__ on MSVC.José Fonseca2011-03-041-0/+12
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* Merge remote branch 'origin/nvc0'Christoph Bumiller2011-03-0472-8212/+9070
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| * nv50: check grclass instead of chipset for 3D capsChristoph Bumiller2011-03-032-6/+4
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| * nv50: increase size of shader code boChristoph Bumiller2011-03-034-14/+23
| | | | | | | | 512 KiB should be quite enough, but dynamic resize might be nicer.
| * nouveau: allow pipe driver to define which buffers should start in sysmemBen Skeggs2011-03-034-7/+6
| | | | | | | | | | | | | | PIPE_BIND_CONSTANT_BUFFER alone was OK for nv50/nvc0, but nv30 will need to be able to set others on certain chipsets. Signed-off-by: Ben Skeggs <[email protected]>
| * nv50: fix IB index buffer pathChristoph Bumiller2011-03-021-8/+12
| | | | | | | | Add missing VERTEX_END and treat unaligned offsets correctly.
| * nv50: fix POINT_COORD_REPLACE_MAP method sizeChristoph Bumiller2011-03-021-2/+2
| | | | | | | | Introduced in 223d98bb8d49c9e52e498a12980722467ae2bf87.
| * nv50: primitive restart trick for vertex data through FIFO modeChristoph Bumiller2011-03-021-12/+17
| | | | | | | | | | Also, on nv50 the VERTEX_BEGIN method doesn't follow VERTEX_END, which was erroneously taken over from nvc0 and is fixed now.
| * nv50: fix depth clamp for disabled primitive clippingChristoph Bumiller2011-03-021-2/+12
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| * nv50: implement independent blend functions for nva3+ and fix capChristoph Bumiller2011-03-023-6/+34
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| * nv50: fix tile size calculationsChristoph Bumiller2011-03-022-2/+2
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| * nv50: fix point sprite state validationChristoph Bumiller2011-03-023-14/+38
| | | | | | | | | | Wasn't updated if the FP didn't change, and coordinate replacement wasn't disabled anymore.
| * nv50: allow accidentally disabled IB index buffers againChristoph Bumiller2011-03-021-1/+1
| | | | | | | | Must have sneaked in from debugging.
| * nv50: apply relocations to shader codeChristoph Bumiller2011-03-021-0/+2
| | | | | | | | | | On nv50, branches are absolute, so we need to adjust them according to the shader's position in the code buffer.
| * nv50: fix wrong miptree tile flags taken over from nvc0Christoph Bumiller2011-03-021-3/+0
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| * nouveau: remove nouveau_stateobj.hBen Skeggs2011-03-011-316/+0
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nvc0: fix a crash on context destructionBen Skeggs2011-03-011-2/+6
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nouveau: ensure vbo_dirty is set when buffer write transfer completeBen Skeggs2011-03-0126-231/+267
| | | | | | | | | | | | This introduces a shared nouveau_context struct to track such things. Signed-off-by: Ben Skeggs <[email protected]>
| * nouveau: fix leak of nouveau_mman structsBen Skeggs2011-03-011-0/+2
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nvc0: port to common fence/mm/buffer codeBen Skeggs2011-03-0121-1347/+128
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nv50: multiply polygon offset units by 2Ben Skeggs2011-03-011-1/+1
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nv50: sync textures with render targets ourselvesBen Skeggs2011-03-017-7/+37
| | | | | | | | | | | | Port of the nvc0 commit doing the same. Signed-off-by: Ben Skeggs <[email protected]>
| * nv50: move onto common linear buffer managerBen Skeggs2011-03-0116-690/+74
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nouveau: common linear buffer manager, ported from nv50/nvc0 driversBen Skeggs2011-03-016-2/+638
| | | | | | | | | | | | | | nv50_resource is being called nv04_resource now temporarily, to avoid a naming conflict with nouveau_resource from libdrm. Signed-off-by: Ben Skeggs <[email protected]>
| * nouveau: create linear gart/vram mman in common screen initBen Skeggs2011-03-016-14/+19
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nouveau: fix fence_ref() where fence and *ref are the same fenceBen Skeggs2011-03-011-2/+3
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nouveau: fix compiler complaintBen Skeggs2011-03-014-2/+11
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nv50: make mm available as common codeBen Skeggs2011-03-019-70/+82
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nv50: move onto shared fence codeBen Skeggs2011-03-0110-347/+45
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nouveau: move nv50/nvc0 fencing to common location, and modify slightlyBen Skeggs2011-03-015-4/+296
| | | | | | | | | | | | | | Modified from original to remove chipset-specific code, and to be decoupled from the mm present in said drivers. Signed-off-by: Ben Skeggs <[email protected]>
| * nv50-nvc0: set cur_ctx during init if none currently boundBen Skeggs2011-03-012-0/+4
| | | | | | | | Signed-off-by: Ben Skeggs <[email protected]>
| * nv50: replace most of it with nvc0 driver ported to nv50Christoph Bumiller2011-02-2841-6621/+8825
| | | | | | | | We'll have to do some unification now to reduce code duplication.
* | i965: Fix extending VB packetsChris Wilson2011-03-041-2/+2
| | | | | | | | | | | | | | | | Computation of the delta of this array from the last had a silly little bug and ignored any initial delta==0 causing grief in Nexuiz and friends. Signed-off-by: Chris Wilson <[email protected]>
* | i965: Handle URB_FENCE erratum for BroadwaterChris Wilson2011-03-041-0/+8
| | | | | | | | | | | | | | | | | | | | There is a silicon bug which causes unpredictable behaviour if the URB_FENCE command should cross a cache-line boundary. Pad before the command to avoid such occurrences. As this command only applies to gen4/5, do the fixup unconditionally as the specs do not actually state for which chip it was fixed (and the cost is negligible)... Signed-off-by: Chris Wilson <[email protected]>
* | i965: Align index to type size and flush if the type changesChris Wilson2011-03-045-13/+22
| | | | | | | | Signed-off-by: Chris Wilson <[email protected]>
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