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Author
Age
Files
Lines
*
mesa: Make validate_shader_target() non-static.
Paul Berry
2014-01-21
2
-4
/
+7
*
mesa: Replace _mesa_program_index_to_target with _mesa_shader_stage_to_program.
Paul Berry
2014-01-21
4
-21
/
+4
*
llvmpipe: dump geometry shaders when using LP_DEBUG=tgsi
Dave Airlie
2014-01-22
1
-1
/
+4
*
mesa: Generate GL_INVALID_OPERATION for unsupported DSA TexStorage functions
Ian Romanick
2014-01-21
1
-3
/
+15
*
mesa: Silence many unused parameter warnings
Ian Romanick
2014-01-21
1
-0
/
+22
*
i965: Ignore 'centroid' interpolation qualifier in case of persample shading
Anuj Phogat
2014-01-21
1
-1
/
+1
*
i965: Use sample barycentric coordinates with per sample shading
Anuj Phogat
2014-01-21
4
-6
/
+30
*
i965: Add an option to ignore sample qualifier
Anuj Phogat
2014-01-21
5
-7
/
+9
*
mesa/x86: Remove dead read_rgba_span_x86.h.
Matt Turner
2014-01-21
1
-56
/
+0
*
i965/fs: Optimize LRP with x == y into a MOV.
Matt Turner
2014-01-21
1
-0
/
+10
*
glsl: Optimize open-coded lrp into lrp.
Jordan Justen
2014-01-21
1
-0
/
+52
*
i965: Enable AOS optimizations for the geometry shader.
Matt Turner
2014-01-21
1
-0
/
+1
*
glsl: Vectorize multiple scalar assignments
Matt Turner
2014-01-21
4
-0
/
+325
*
glsl: Add parameter to .equals() to ignore an IR type.
Matt Turner
2014-01-21
2
-36
/
+38
*
mesa: rename PreferDP4 to OptimizeForAOS.
Matt Turner
2014-01-21
8
-10
/
+13
*
i965/fs: Print the maximum register pressure.
Matt Turner
2014-01-21
1
-1
/
+3
*
i965/fs: Show register pressure in dump_instructions() output.
Kenneth Graunke
2014-01-21
3
-1
/
+16
*
i965: Compute the number of live registers at each IP.
Kenneth Graunke
2014-01-21
3
-0
/
+22
*
i965/fs: Call opt_peephole_sel later in the optimization loop.
Matt Turner
2014-01-21
1
-1
/
+1
*
i965/fs: Calculate interference better in register_coalesce.
Matt Turner
2014-01-21
1
-7
/
+72
*
i965/fs: Support coalescing registers of size > 1.
Matt Turner
2014-01-21
1
-23
/
+59
*
i965/fs: Assert that var < num_vars.
Matt Turner
2014-01-21
1
-0
/
+2
*
i965/fs: Add a comment explaining how register coalescing works.
Matt Turner
2014-01-21
1
-0
/
+12
*
i965/fs: Add and use MAX_SAMPLER_MESSAGE_SIZE definition.
Matt Turner
2014-01-21
3
-5
/
+10
*
mesa: Add STRINGIFY macro.
Matt Turner
2014-01-21
1
-0
/
+2
*
i965/fs: Fix the example about overwriting uniforms in SIMD16.
Matt Turner
2014-01-21
1
-5
/
+5
*
i965: Print reg_offset for vgrf of size > 1 in dump_instruction().
Matt Turner
2014-01-21
2
-4
/
+4
*
glsl: Match unnamed record types across stages.
Grigori Goronzy
2014-01-21
1
-0
/
+4
*
glsl: Extract function for record comparisons.
Grigori Goronzy
2014-01-21
2
-30
/
+44
*
svga: implement TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
Brian Paul
2014-01-21
4
-8
/
+47
*
svga: rename color output variables
Brian Paul
2014-01-21
3
-9
/
+10
*
svga: fix clearing for null color buffers
Brian Paul
2014-01-21
1
-3
/
+3
*
mesa: add missing TYPE_DOUBLEN_2 cases in get.c
Brian Paul
2014-01-21
1
-0
/
+12
*
i965: Modify some error messages to refer to "vec4" instead of "vs".
Paul Berry
2014-01-21
2
-5
/
+5
*
i965: Add GS support to INTEL_DEBUG=shader_time.
Paul Berry
2014-01-21
8
-10
/
+37
*
draw: fix points with negative w coords for d3d style point clipping
Roland Scheidegger
2014-01-21
1
-2
/
+6
*
i965: Reserve space for "Vertex Count" in GS outputs.
Kenneth Graunke
2014-01-21
2
-0
/
+13
*
i965: Update blitter code for 48-bit addresses.
Kenneth Graunke
2014-01-20
1
-16
/
+48
*
i965: Update PIPE_CONTROL packet lengths for Broadwell.
Kenneth Graunke
2014-01-20
1
-2
/
+20
*
i965: Re-combine the Gen4-5 and Gen6+ write_depth_count functions.
Kenneth Graunke
2014-01-20
3
-23
/
+10
*
i965: Create a helper function for emitting PIPE_CONTROL writes.
Kenneth Graunke
2014-01-20
4
-93
/
+69
*
i965: Use full-length PIPE_CONTROL packets for workaround writes.
Kenneth Graunke
2014-01-20
1
-6
/
+9
*
i965: Emit full-length PIPE_CONTROLs for (non-write) flushes.
Kenneth Graunke
2014-01-20
1
-2
/
+3
*
i965: Create a helper function for emitting PIPE_CONTROL flushes.
Kenneth Graunke
2014-01-20
4
-86
/
+66
*
i965: Fix MI_STORE_REGISTER_MEM for Broadwell.
Kenneth Graunke
2014-01-20
1
-10
/
+23
*
i965: Introduce an OUT_RELOC64 macro.
Kenneth Graunke
2014-01-20
2
-0
/
+34
*
i965: Use the new drm_intel_bo offset64 field.
Kenneth Graunke
2014-01-20
12
-30
/
+30
*
i965: Delete intel_batchbuffer_emit_reloc_fenced.
Kenneth Graunke
2014-01-20
2
-30
/
+0
*
i915: Silence warning: unused parameter warning in intel_bufferobj_buffer
Ian Romanick
2014-01-20
3
-13
/
+5
*
i915: Ensure that intel_bufferobj_map_range meets alignment guarantees
Ian Romanick
2014-01-20
1
-7
/
+21
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