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* ac/shader: gather If TES reads TESSINNER or TESSOUTERSamuel Pitoiset2018-01-155-4/+8
* ac: remove ac_shader_variant_info::fs::output_maskSamuel Pitoiset2018-01-152-3/+0
* r600/shader: Initialize max_driver_temp_used correctly for the first timeGert Wollny2018-01-151-0/+1
* freedreno/ir3: "soft" depth scheduling for SFU instructionsRob Clark2018-01-141-9/+21
* freedreno/a5xx: work around SWAP vs TILE_MODE constraintRob Clark2018-01-141-0/+20
* freedreno/a5xx: texture tilingRob Clark2018-01-1416-25/+339
* freedreno: update generated headersRob Clark2018-01-146-26/+35
* freedreno: add screen->setup_slices() for tex layoutRob Clark2018-01-143-19/+43
* r300g: remove double assignmentGrazvydas Ignotas2018-01-141-1/+0
* util: use faster zlib's CRC32 implementaionGrazvydas Ignotas2018-01-141-0/+13
* util/crc32: don't drop the const qualifierGrazvydas Ignotas2018-01-141-1/+1
* ac: add doubles support to isignTimothy Arceri2018-01-141-7/+18
* ac: add i64_0 and i64_1 to llvm build contextTimothy Arceri2018-01-142-0/+4
* ac/nir: fix translation of nir_op_b2i for doublesTimothy Arceri2018-01-141-3/+9
* ac: fix build error in si_shaderMauro Rossi2018-01-131-1/+1
* radv/radeonsi/nir: lower 64bit flrpTimothy Arceri2018-01-132-0/+2
* broadcom/vc5: Use MSF to ignore discards/non-dispatched channels in loops.Eric Anholt2018-01-121-1/+5
* broadcom/vc5: Use XOR instead of SUB for execute flags comparisons.Eric Anholt2018-01-121-3/+3
* broadcom/vc5: Also check the update flags for avoiding DCE.Eric Anholt2018-01-121-1/+5
* broadcom/vc5: Fix up channel swizzling for textures on 4.x.Eric Anholt2018-01-121-2/+5
* broadcom/vc5: Port the draw-time state emission to V3D 4.1.Eric Anholt2018-01-127-27/+76
* broadcom/vc5: Rename V3D 3.x Flat Shade Action to match v4.x naming.Eric Anholt2018-01-122-8/+8
* broadcom/vc5: Update pixel center setup for V3D 4.x.Eric Anholt2018-01-121-2/+12
* broadcom/vc5: Print the buffer name in simulator overflow checks.Eric Anholt2018-01-121-2/+4
* broadcom/vc5: Add support for loading varyings in V3D 4.1.Eric Anholt2018-01-126-17/+13
* broadcom/vc5: Update state setup for V3D 4.1.Eric Anholt2018-01-127-14/+206
* broadcom/vc5: Add compiler support for V3D 4.x texturing.Eric Anholt2018-01-127-6/+283
* broadcom/vc5: Add the new TMU write addresses for V3D 4.x (and r5rep).Eric Anholt2018-01-122-10/+37
* broadcom/vc5: Move V3D 3.3 texturing to a separate file.Eric Anholt2018-01-125-229/+267
* broadcom/vc5: Move V3D 3.3 VPM write setup to a separate file.Eric Anholt2018-01-125-34/+82
* broadcom/vc5: Set up depth formats for V3D 4.x.Eric Anholt2018-01-121-1/+12
* broadcom/vc5: Always use the RGBA8 formats for RGBX8.Eric Anholt2018-01-121-3/+7
* broadcom/vc5: Move the formats table to per-V3D-version compile.Eric Anholt2018-01-1212-337/+451
* broadcom/vc5: Add support for V3D 4.1 CLIF dumping.Eric Anholt2018-01-125-17/+57
* broadcom/vc5: Move the body of CLIF dumping to a per-version file.Eric Anholt2018-01-126-155/+255
* broadcom/vc5: Use THRSW to enable multi-threaded shaders.Eric Anholt2018-01-129-81/+311
* broadcom/vc5: Properly schedule the thread-end THRSW.Eric Anholt2018-01-122-39/+137
* broadcom/vc5: Implement GFXH-1684 workaround.Eric Anholt2018-01-124-0/+20
* broadcom/vc5: Port drawing commands to V3D 4.x.Eric Anholt2018-01-129-20/+93
* broadcom/vc5: Add a test for .ifb in ADD ops.Eric Anholt2018-01-121-0/+1
* broadcom/vc5: Add the new tesselation opcodes in V3D 4.1.Eric Anholt2018-01-122-1/+5
* broadcom/vc5: Use a physical-reg-only register class for LDVPM.Eric Anholt2018-01-122-8/+21
* broadcom/vc5: Use the new LDVPM/STVPM opcodes on V3D 4.1.Eric Anholt2018-01-129-51/+197
* broadcom/vc5: Drop dead VC5_QPU_* defines from qpu_instr.c.Eric Anholt2018-01-121-80/+0
* broadcom/vc5: Add support for QPU pack/unpack/disasm of small immediates.Eric Anholt2018-01-124-1/+94
* broadcom/vc5: Enable the driver on V3D 4.1Eric Anholt2018-01-121-1/+1
* broadcom/vc5: Port the simulator to support V3D 4.1Eric Anholt2018-01-129-125/+216
* broadcom/vc5: Drop signal bit #defines.Eric Anholt2018-01-122-8/+0
* broadcom/vc5: Add support for V3Dv4 signal bits.Eric Anholt2018-01-1212-45/+322
* broadcom/vc5: Fix pack/unpack of vfmul input unpack flags.Eric Anholt2018-01-122-0/+40
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