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* svga: add guest statistic gathering interfaceCharmaine Lee2016-08-2631-85/+468
| | | | | | | | | | | | With this patch, guest statistic gathering interface is added to svga winsys interface that can be used to gather svga driver statistic. The winsys module can then share the statistic info with the VMX host via the mksstats interface. The statistic enums used in the svga driver are defined in svga_stats_count and svga_stats_time in svga_winsys.h Reviewed-by: Brian Paul <[email protected]>
* svga: fix indirect non-indexable temp accessCharmaine Lee2016-08-261-2/+25
| | | | | | | | | | | If the shader has indirect access to non-indexable temporaries, convert these non-indexable temporaries to indexable temporary array. This works around a bug in the GLSL->TGSI translator. Fixes glsl-1.20/execution/fs-const-array-of-struct-of-array.shader_test on DX11Renderer. Reviewed-by: Brian Paul <[email protected]>
* gallium/hud: move signo declaration inside PIPE_OS_UNIX blockBrian Paul2016-08-261-1/+1
| | | | | | To silence unused var warning with MSVC, MinGW. Reviewed-by: Marek Olšák <[email protected]>
* i965: Embrace "unlimited" GTT mmap supportChris Wilson2016-08-264-16/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | From about kernel 4.9, GTT mmaps are virtually unlimited. A new parameter, I915_PARAM_MMAP_GTT_VERSION, is added to advertise the feature so query it and use it to avoid limiting tiled allocations to only fit within the mappable aperture. A couple of caveats: - fence support is still limited by stride to 262144 and the stride needs to be a multiple of tile_width (as before, and same limitation as the current 3D pipeline in hardware) - the max_gtt_map_object_size forcing untiled may be hiding a few bugs in handling of large objects, though none were spotted in piglits. See kernel commit 4cc6907501ed ("drm/i915: Add I915_PARAM_MMAP_GTT_VERSION to advertise unlimited mmaps"). v2: Include some commentary on mmap virtual space vs CPU addressable space. Signed-off-by: Chris Wilson <[email protected]> Cc: Kenneth Graunke <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Daniel Vetter <[email protected]>
* mesa/main: Fix missing return in non void functionTobias Klausmann2016-08-261-1/+1
| | | | | | | | | | | This was found by obs: I: Program returns random data in a function E: Mesa no-return-in-nonvoid-function main/program_resource.c:109 v2: Remove the ! on the string (Ian Romanick) Signed-off-by: Tobias Klausmann <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Implement GL_KHR_blend_equation_advanced_coherent on Gen9+.Kenneth Graunke2016-08-251-0/+1
| | | | | | | We always use a coherent read, and ignore the "opt out" enable flag. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: Implement GL_KHR_blend_equation_advanced_coherent.Kenneth Graunke2016-08-256-0/+23
| | | | | | | | | This adds the extension enable (so drivers can advertise it) and the extra boolean state flag, GL_BLEND_ADVANCED_COHERENT_KHR, which can be set to request coherent blending. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Enable GL_KHR_blend_equation_advanced on G45 and later.Kenneth Graunke2016-08-252-1/+5
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Disable hardware blending if advanced blending is in use.Kenneth Graunke2016-08-254-5/+7
| | | | | | | | We'll do blending in the shader in this case, so just disable the hardware blending. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* glsl: Add a lowering pass to handle advanced blending modes.Kenneth Graunke2016-08-253-0/+564
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many GPUs cannot handle GL_KHR_blend_equation_advanced natively, and need to emulate it in the pixel shader. This lowering pass implements all the necessary math for advanced blending. It fetches the existing framebuffer value using the MESA_shader_framebuffer_fetch built-in variables, and the previous commit's state var uniform to select which equation to use. This is done at the GLSL IR level to make it easy for all drivers to implement the GL_KHR_blend_equation_advanced extension and share code. Drivers need to hook up MESA_shader_framebuffer_fetch functionality: 1. Hook up the fb_fetch_output variable 2. Implement BlendBarrier() Then to get KHR_blend_equation_advanced, they simply need to: 3. Disable hardware blending based on ctx->Color._AdvancedBlendEnabled 4. Call this lowering pass. Very little driver specific code should be required. v2: Handle multiple output variables per render target (which may exist due to ARB_enhanced_layouts), and array variables (even with one render target, we might have out vec4 color[1]), and non-vec4 variables (it's easier than finding spec text to justify not handling it). Thanks to Francisco Jerez for the feedback. v3: Lower main returns so that we have a single exit point where we can add our blending epilogue (caught by Francisco Jerez). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* compiler: Add a new STATE_VAR_ADVANCED_BLENDING_MODE built-in uniform.Kenneth Graunke2016-08-252-0/+15
| | | | | | | | | | | This will be used for emulating GL_KHR_advanced_blend_equation features in shader code. We'll pass in the blending mode that's in use, and use that in (effectively) a switch statement in the shader. v2: Use the new _AdvancedBlendMode field. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: Add draw time validation for advanced blending modes.Kenneth Graunke2016-08-251-0/+52
| | | | | | | v2: Add null checks (requested by Curro). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: Restyle _mesa_check_blend_func_error().Kenneth Graunke2016-08-251-15/+15
| | | | | | | | | | | | I'm about to add more error conditions to this function, so I wanted to move the current spec citation above the code that checks it. Indenting it required reformatting, so I tried to move it to our newer style. While there, I also decided to drop some GL type usage, and drop the unnecessary "_mesa_" prefix on a static function. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: Track the current advanced blending mode.Kenneth Graunke2016-08-252-13/+50
| | | | | | | | | | | This will be useful for a number of things: - Checking the current advanced blending mode against the shader's blend_support_* qualifiers. - Disabling hardware blending when emulating advanced blending. - Uploading the current advanced blending mode as a state var. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: Allow advanced blending enums in glBlendEquation[i].Kenneth Graunke2016-08-251-10/+54
| | | | | | | | Don't allow them in glBlendEquationSeparate[i], though, as required by the spec. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* glsl: Merge blend_support qualifiers when linking.Kenneth Graunke2016-08-251-0/+2
| | | | | | | | Since each qualifier represents a blending mode the shader can be used with, we take the union of all possible modes when linking. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* glsl: process blend_support_* qualifiersIlia Mirkin2016-08-257-0/+87
| | | | | | | | | | v2 (Ken): Add a BLEND_NONE enum value (no qualifiers in use). v3 (Ken): Rename gl_blend_support_qualifier to gl_advanced_blend_mode. v4 (Ken): Mark map[] as static const (Ilia). Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* glsl: add basic KHR_blend_equation_advanced infrastructureIlia Mirkin2016-08-252-0/+3
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: add KHR_blend_equation_advanced enable and extension stringIlia Mirkin2016-08-252-0/+2
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* glapi: add KHR_blend_equation_advanced dispatchIlia Mirkin2016-08-252-0/+30
| | | | | | | | | | v2 (Ken): Fix enum values, drop _mesa_BlendBarrierKHR stub as Curro has already implemented it. v3 (Ken): Rework for _mesa_BlendBarrierKHR -> _mesa_BlendBarrier rename. Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: Rename _mesa_BlendBarrierMESA to _mesa_BlendBarrier.Kenneth Graunke2016-08-252-2/+2
| | | | | | | | | | | Note that _mesa_BlendBarrierMESA is not currently hooked up in the glapi XML, so we can just rename it. We'll hook it up for the KHR_blend_equation_advanced extension shortly. We may as well use the ES 3.2 core name with no suffixes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Safely iterate the predecessors of the end block.Kenneth Graunke2016-08-251-9/+14
| | | | | | | | | | | | | | We want to insert code in each of the predecessors of the end block. This code includes a nir_if, which would split the block, altering the set. To avoid that, I emitted a dead constant at the end of each block before splitting it, so that the set of predecessors remained unchanged. This was admittedly ugly. Connor suggested instead saving a copy of the set, so we can iterate it safely. This is also a little ugly, but a much better plan. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir: Use nir_shader_get_entrypoint in TCS quad workaround code.Kenneth Graunke2016-08-251-12/+9
| | | | | | | | | | | | | | We want to insert the code at the end of the program. Looping over all the functions (of which there was only one) was the old way of doing this, but now we have nir_shader_get_entrypoint(), so let's use it. Suggested by Connor Abbott. v2: Update for nir_shader_get_entrypoint API change. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir: Change nir_shader_get_entrypoint to return an impl.Kenneth Graunke2016-08-257-18/+14
| | | | | | | | | | | | | | | | | Jason suggested adding an assert(function->impl) here. All callers of this function actually want ->impl, so I decided just to change the API. We also change the nir_lower_io_to_temporaries API here. All but one caller passed nir_shader_get_entrypoint(), and with the previous commit, it now uses a nir_function_impl internally. Folding this change in avoids the need to change it and change it back. v2: Fix one call I missed in ir3_compiler (caught by Eric). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir: Make nir_lower_io_to_temporaries store an impl internally.Kenneth Graunke2016-08-251-4/+4
| | | | | | | | | | | | This changes the pass internals to work with a nir_function_impl directly rather than a nir_function. The next patch will change the API. v2: Rebase after framebuffer fetch landed. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* i965: Expose shader framebuffer fetch extensions on Gen9+.Francisco Jerez2016-08-251-1/+2
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Hook up coherent framebuffer reads to the NIR front-end.Francisco Jerez2016-08-251-2/+20
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Remove special casing of framebuffer writes in scheduler code.Francisco Jerez2016-08-251-2/+1
| | | | | | | | | | | | The reason why it was safe for the scheduler to ignore the side effects of framebuffer write instructions was that its side effects couldn't have had any influence on any other instruction in the program, because we weren't doing framebuffer reads, and framebuffer writes were always non-overlapping. We need actual memory dependency analysis in order to determine whether a side-effectful instruction can be reordered with respect to other instructions in the program. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Don't CSE render target messages with different target index.Francisco Jerez2016-08-251-0/+1
| | | | | | | | | We weren't checking the fs_inst::target field when comparing whether two instructions are equal. For FB writes it doesn't matter because they aren't CSE-able anyway, but this would have become a problem with FB reads which are expression-like instructions. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Define logical framebuffer read opcode and lower it to physical reads.Francisco Jerez2016-08-254-0/+28
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Define framebuffer read virtual opcode.Francisco Jerez2016-08-255-0/+29
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/disasm: Fix RC message type strings on Gen7+.Francisco Jerez2016-08-251-3/+25
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/eu: Add codegen support for the Gen9+ render target read message.Francisco Jerez2016-08-253-0/+40
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/eu: Take into account the target cache argument in brw_set_dp_read_message.Francisco Jerez2016-08-252-4/+18
| | | | | | | | | | | brw_set_dp_read_message() was setting the data cache as send message SFID on Gen7+ hardware, ignoring the target cache specified by the caller. Some of the callers were passing a bogus target cache value as argument relying on brw_set_dp_read_message not to take it into account. Fix them too. Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Flip the non-coherent framebuffer fetch extension bit on G45-Gen8 ↵Francisco Jerez2016-08-251-0/+3
| | | | | | | | | | | | | | | | | | | | | hardware. This is not enabled on the original Gen4 part because it lacks surface state tile offsets so it may not be possible to sample from arbitrary non-zero layers of the framebuffer depending on the miptree layout (it should be possible to work around this by allocating a scratch surface and doing the same hack currently used for render targets, but meh...). On Gen9+ even though it should mostly work (feel free to force-enable it in order to compare the coherent and non-coherent paths in terms of performance), there are some corner cases like 1D array layered framebuffers that cannot be handled easily by the non-coherent path because of the incompatible layout in memory of 1D and 2D miptrees (it should be possible to work around this too by doing state-dependent recompiles, but it's hard to care enough since Gen9 has native support for coherent render target reads...) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Implement glBlendBarrier.Francisco Jerez2016-08-251-0/+20
| | | | | | | | | This is a no-op if the platform supports coherent framebuffer fetch, -- If it doesn't we just need to flush the render cache and invalidate the texture cache in order for previous rendering to be visible to framebuffer fetch. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Upload surface state for non-coherent framebuffer fetch.Francisco Jerez2016-08-253-0/+94
| | | | | | | | This iterates over the list of attached render buffers and binds appropriate surface state structures to the binding table block allocated for shader framebuffer read. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Implement support for overriding the texture target in ↵Francisco Jerez2016-08-251-4/+50
| | | | | | | | | | | | | | | | | | | | | brw_emit_surface_state. This allows the caller to bind a miptree using a texture target other than the one it it was created with. The code should work even if the memory layouts of the specified and original targets don't match, as long as the caller only intends to access a single slice of the miptree structure. This will be exploited by the next commit in order to support non-coherent framebuffer fetch of a single layer of a 3D texture (since some generations lack the minimum array element control for 3D textures bound to the sampler unit), and multiple layers of a 1D array texture (since binding it as an actual 1D array texture would require state-dependent recompiles because the same shader couldn't simultaneously work for 1D and 2D array textures due to the different texel fetch coordinate ordering). Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Massage argument list of brw_emit_surface_state().Francisco Jerez2016-08-251-11/+11
| | | | | | | | | | | | | | | | | | This commit does three different things in a single pass in order to keep the amount of churn low: Remove the for_gather boolean argument which was unused, pass the isl_view argument by value rather than by reference since I'll have to modify it from within the function, and add a target argument to allow callers to bind textures using a target other than the original. The prototype of the function now looks like: void brw_emit_surface_state(struct brw_context *brw, struct intel_mipmap_tree *mt, GLenum target, struct isl_view view, uint32_t mocs, uint32_t *surf_offset, int surf_index, unsigned read_domains, unsigned write_domains); Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add missing has_surface_tile_offset flag to the Gen8+ device info ↵Francisco Jerez2016-08-251-0/+2
| | | | | | | | | structures. This surface state control has been supported by all hardware generations since G45. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Return the correct layout from get_isl_dim_layout for pre-ILK cube ↵Francisco Jerez2016-08-251-2/+5
| | | | | | textures. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Factor out isl_surf_dim/isl_dim_layout calculation into functions.Francisco Jerez2016-08-252-23/+55
| | | | | | | | The logic to calculate the right layout and dimensionality for a given GL texture target is going to be useful elsewhere, factor it out from intel_miptree_get_isl_surf(). Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Resolve color for non-coherent FB fetch at UpdateState time.Francisco Jerez2016-08-251-0/+17
| | | | | | | | | | | | This is required because the sampler unit used to fetch from the framebuffer is unable to interpret non-color-compressed fast-cleared single-sample texture data. Roughly the same limitation applies for surfaces bound to texture or image units, but unlike texture sampling, non-coherent framebuffer fetch is by definition non-coherent with previous rendering, so the brw_render_cache_set_check_flush() call can be omitted except after resolve. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Return whether the miptree was resolved from ↵Francisco Jerez2016-08-252-5/+9
| | | | | | | | | intel_miptree_resolve_color(). This will allow optimizing out the cache flush in some cases when resolving wasn't necessary. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Translate nir_intrinsic_load_output on a fragment output.Francisco Jerez2016-08-251-0/+20
| | | | | | | This gets the non-coherent framebuffer fetch path hooked up to the NIR front-end. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Allocate fragment output temporaries on demand.Francisco Jerez2016-08-251-46/+27
| | | | | | | | | This gets rid of the duplication of logic between nir_setup_outputs() and get_frag_output() by allocating fragment output temporaries lazily whenever get_frag_output() is called. This makes nir_setup_outputs() a no-op for the fragment shader stage. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Rework representation of fragment output locations in NIR.Francisco Jerez2016-08-253-10/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The problem with the current approach is that driver output locations are represented as a linear offset within the nir_outputs array, which makes it rather difficult for the back-end to figure out what color output and index some nir_intrinsic_load/store_output was meant for, because the offset of a given output within the nir_output array is dependent on the type and size of all previously allocated outputs. Instead this defines the driver location of an output to be the pair formed by its GLSL-assigned location and index (I've borrowed the bitfield macros from brw_defines.h in order to represent the pair of integers as a single scalar value that can be assigned to nir_variable_data::driver_location). nir_assign_var_locations is no longer useful for fragment outputs. Because fragment outputs are now allocated independently rather than within the nir_outputs array, the get_frag_output() helper becomes necessary in order to obtain the right temporary register for a given location-index pair. The type_size helper passed to nir_lower_io is now type_size_dvec4 rather than type_size_vec4_times_4 so that output array offsets are provided in terms of whole array elements rather than in terms of scalar components (dvec4 is the largest vector type supported by the GLSL so this will cause all individual fragment outputs to have a size of one regardless of the type). Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix undefined signed overflow in INTEL_MASK for bitfields of 31 bits.Francisco Jerez2016-08-251-1/+1
| | | | | | | Most likely we had only ever used this macro on bitfields of less than 31 bits -- That's going to change shortly. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Special-case nir_intrinsic_store_output for the fragment shader.Francisco Jerez2016-08-251-0/+15
| | | | | | | | | | | I'm about to change how fragment shader output locations are represented, so the generic nir_intrinsic_store_output implementation that assumes that outputs are just contiguous elements in the big nir_outputs array won't work anymore. This somewhat simplified implementation of nir_intrinsic_store_output for fragment shaders should be functionally equivalent to the current fall-back one. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Implement non-coherent framebuffer fetch using the sampler unit.Francisco Jerez2016-08-252-0/+94
| | | | | | v2: Memoize sample ID, misc codestyle changes. (Ken) Reviewed-by: Kenneth Graunke <[email protected]>