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* softpipe: check for SP_NEW_STIPPLE when building quad pipelineBrian Paul2014-10-311-0/+1
* r600g: Fix build with opencl and radeonsi disabledTom Stellard2014-10-311-6/+6
* clover: Fix bug when binary programs are passed to clBuildProgram() v2Tom Stellard2014-10-312-6/+14
* clover: Factor input validation of clCompileProgram into a new function v2Tom Stellard2014-10-311-10/+23
* radeonsi/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2Tom Stellard2014-10-314-59/+127
* r600g/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2Tom Stellard2014-10-318-97/+180
* gallium/radeon: Add query for symbol specific config informationTom Stellard2014-10-313-0/+86
* r300g: remove enabled/disabled hyperz and AA compression messagesMarek Olšák2014-10-301-2/+0
* r600g: Delete unused variable 'max_global_size' in 'r600_get_compute_param'Dieter Nützel2014-10-301-1/+0
* mesa: protect the debug state with a mutexChia-I Wu2014-10-302-47/+126
* glsl: protect glsl_type with a mutexChia-I Wu2014-10-302-10/+62
* glsl: protect anonymous struct id with a mutexChia-I Wu2014-10-301-2/+8
* util: initialize locale_t with a static objectChia-I Wu2014-10-301-10/+8
* configure: check for xlocale.h and strtofChia-I Wu2014-10-301-8/+4
* util: add _mesa_strtod and _mesa_strtofChia-I Wu2014-10-3010-40/+21
* mesa/gallium: Signal _NEW_TRANSFORM from glClipControl.Mathias Fröhlich2014-10-302-13/+6
* Revert "i965/compaction: Disable compaction on SNB temporarily."Matt Turner2014-10-291-6/+0
* i965/vec4: Perform CSE on MAD instructions with final arguments switched.Matt Turner2014-10-291-1/+5
* i965/fs: Perform CSE on MAD instructions with final arguments switched.Matt Turner2014-10-291-1/+5
* glsl: Drop constant 0.0 components from dot products.Matt Turner2014-10-291-0/+27
* glx/dri3: Implement LIBGL_SHOW_FPS=1 for DRI3/Present.Kenneth Graunke2014-10-292-2/+36
* i965: Rename brw_vec4_gs.[ch] to brw_gs.[ch].Kenneth Graunke2014-10-295-5/+4
* i965: Rename brw_gs{,_emit}.[ch] to brw_ff_gs{,_emit}.[ch].Kenneth Graunke2014-10-295-5/+5
* i965: Rename intel_bufferobj_* functions to match GL and DD hooks.Kenneth Graunke2014-10-291-65/+64
* radeon/llvm: Dynamically allocate branch/loop stack arraysMichel Dänzer2014-10-292-6/+37
* mesa: Fix order of errors for glDrawTransformFeedbackStreamChris Forbes2014-10-291-5/+5
* vc4: Add support for ARL and indirect register access on TGSI_FILE_CONSTANT.Eric Anholt2014-10-2810-34/+407
* vc4: Fix mixup of return type in reloc_tex().Eric Anholt2014-10-281-2/+2
* vc4: Drop redundant check for is_tmu_write().Eric Anholt2014-10-281-3/+0
* vc4: Don't forget to validate code that's got PROG_END on it.Eric Anholt2014-10-281-5/+6
* vc4: Add .dir-locals.el for kernel style in the kernel code.Eric Anholt2014-10-281-0/+12
* vc4: Fix a couple missing '\n's in error output.Eric Anholt2014-10-282-2/+2
* st/mesa: use PIPE_BIND_DISPLAY_TARGET when checking for sRGB capabilityBrian Paul2014-10-281-1/+2
* Revert "st/mesa: set MaxUnrollIterations = 255"Marek Olšák2014-10-281-2/+1
* r300g/vdpau: enable againDavid Heidelberger2014-10-281-0/+1
* r300g: only set clip_halfz for chips with HW TCLMarek Olšák2014-10-281-1/+1
* radeonsi: fix incorrect index buffer max size for lowered 8-bit indicesMarek Olšák2014-10-281-1/+1
* radeonsi: fix polygon mode for points and lines and point/line fill modesMarek Olšák2014-10-281-3/+3
* r600g: fix polygon mode for points and lines and point/line fill modesMarek Olšák2014-10-282-6/+6
* r600g: Implement sm5 UBO/sampler indexingGlenn Kennard2014-10-287-19/+164
* r600g: Implement sm5 interpolation functionsGlenn Kennard2014-10-282-3/+237
* mesa: Add support for the GL_KHR_context_flush_control extensionNeil Roberts2014-10-286-2/+27
* i965/fs: Don't set dependency hints on instructions with spilled destinationsJason Ekstrand2014-10-271-0/+8
* i965/fs: Make scratch write instructions use the correct execution sizeJason Ekstrand2014-10-271-1/+1
* i965/fs: Use correct spill offsetsJason Ekstrand2014-10-271-6/+5
* i965: Use the spill destination for the message header on GEN >= 7Jason Ekstrand2014-10-271-6/+13
* i965/fs: Don't [un]spill multiple registers at a time in SIMD8 modeJason Ekstrand2014-10-271-2/+4
* i965/fs: Use instruction execution sizes when generating scratch reads/writesJason Ekstrand2014-10-271-4/+4
* egl/drm: do not crash when swapping buffers without any renderingLionel Landwerlin2014-10-271-0/+8
* nv50: handle inverted render conditionsTobias Klausmann2014-10-264-10/+51
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