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* radeon/llvm: Fix encoding of FP immediates on SITom Stellard2012-08-291-1/+6
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* radeon/llvm: Create a register class for the M0 registerTom Stellard2012-08-295-16/+24
| | | | | | | | | | | The Common Subexpression Elimination pass will not operate on instructions with physical register defs, so we end up with several redundant copies to M0 when using interpolation. Adding a register class that only contains the M0 register allows use to use a virtual register to represent M0, and makes it possible for the Common Subexpression Elimination pass to remove the extra copies.
* radeon/llvm: Set the neverHasSideEffects bit on more instructionsTom Stellard2012-08-291-0/+2
| | | | | This flag makes these instructions candidates for the dead code elimination and common subexpression elimination.
* radeon/llvm: Declare the interpolation intrinsics as ReadOnlyTom Stellard2012-08-293-3/+4
| | | | | This signals to the Dead Code Elimination pass that it is safe to remove these instructions when they are dead.
* radeon/llvm: Mark M0 as a def when lowering interpolation instructionsTom Stellard2012-08-291-4/+2
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* meta: Add GLSL variant of _mesa_meta_GenerateMipmap() functionAnuj Phogat2012-08-291-58/+220
| | | | | | | | | | | | | | | | This reduces the overhead of using the fixed function internally in the driver. V2: Use setup_glsl_generate_mipmap() and setup_ff_generate_mipmap() functions to avoid code duplication. Use glsl version when ARB_{vertex, fragmet}_shader are present. Remove redundant code. V3: Remove redundant border related code leaving the assertion. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* glsl: s/class/struct/ for ast_type_qualifierBrian Paul2012-08-291-1/+1
| | | | | | To silence an MSVC compiler warning about class vs. struct. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: convert a few more macros to inline functionsBrian Paul2012-08-291-22/+21
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* mesa: remove COPY_4V_CAST() macroBrian Paul2012-08-292-10/+1
| | | | Only used in one place, and not really needed.
* mesa: convert a bunch of math macros to inline functionsBrian Paul2012-08-291-56/+86
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* tnl: use INTERP_4F() instead of four INTERP_F() callsBrian Paul2012-08-291-4/+1
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* swrast: fix wrong assignments in _swrast_add_spec_terms_line()Brian Paul2012-08-291-2/+2
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* mesa: test for GL_EXT_framebuffer_sRGB in glPopAttrib()Brian Paul2012-08-291-1/+2
| | | | To avoid spurious GL_INVALID_ENUM errors if the extension isn't supported.
* mesa: Define CPU_TO_LE32 to work on OpenBSDMartin Pieuchot2012-08-291-0/+3
| | | | Signed-off-by: Brian Paul <[email protected]>
* i965: Disable the swrast context setup on GL 3.1 core.Eric Anholt2012-08-283-15/+34
| | | | | | | | | | | | | | I've reviewed the code, and the swrast callsites remaining are all in drawpixels/copypixels/bitmap/accum, or _swrast_BlitFramebuffer that shouldn't be hit. A piglit run with the context setup disabled on legacy GL and GLES2 showed regressions only in the copypixels and drawpixels tests. If the context type is forced, this reduces the shader_runner maximum heap size for glsl-algebraic-add-add-1.shader_test from 15,137,496b to 4,165,376b. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Replace general sw fallback support with a manual check for rendermode.Eric Anholt2012-08-285-120/+14
| | | | | | | There were no other cases that set it any more. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* intel: Move RenderMode fallback func to i915 driver.Eric Anholt2012-08-285-18/+20
| | | | | | | | The Fallback field of the context struct doesn't work that way on i965, and it's the only caller of FALLBACK() in the driver. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Drop the old sw fallback for position array being disabled.Eric Anholt2012-08-281-7/+0
| | | | | | | | | This code has been in the driver since the first commit. I think it was trying to stop rendering from happening with a disabled position array. Core mesa has since had changes to deal with disabled position arrays correctly. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Drop support for forcing drawing through sw fallbacks.Eric Anholt2012-08-282-5/+2
| | | | | | | It turns out it hasn't worked since at least 8.0. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move depth resolve for span fallbacks to a simpler place.Eric Anholt2012-08-282-28/+3
| | | | | Reviewed-by: Chad Versace <[email protected]> Acked-by: Ian Romanick <[email protected]>
* i965: Drop manual hiz resolves in span rendering.Eric Anholt2012-08-281-10/+0
| | | | | | | | swrast uses MapRenderbuffer, which leads to intel_miptree_map, which does the depth resolve. Reviewed-by: Chad Versace <[email protected]> Acked-by: Ian Romanick <[email protected]>
* radeon/llvm: Handle TGSI KIL opcode for SI.Michel Dänzer2012-08-283-0/+44
| | | | | | | Fixes piglit fp-kil and glBitmap() with radeonsi. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: Basic support for SI EXEC register.Michel Dänzer2012-08-283-2/+23
| | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: Don't write to the PA_SC_RASTER_CONFIG register.Michel Dänzer2012-08-281-1/+0
| | | | | | | It should be initialized by the kernel as necessary. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* r600g: fix relative addressing on RS780 and RS880Marek Olšák2012-08-281-7/+6
| | | | | | They should be treated like RV670. Tested-by: Michel Dänzer <[email protected]>
* llvmpipe: Bump the maximum texture size (in pixels).José Fonseca2012-08-282-2/+9
| | | | | | | | | | But cap the size in bytes, to avoid depleting the whole system memory, with humongus textures. Tested with max-texture-size piglit test. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* u_vbuf: avoid unnecessary update of the vertex elementsVadim Girlin2012-08-281-1/+3
| | | | | Signed-off-by: Vadim Girlin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* egl: fix invalid flag detection for EGL_KHR_create_contextMatt Turner2012-08-271-1/+1
| | | | | | | | We want to check whether there are bits set outside of the valid flags. Fixes piglit test egl-create-context-invalid-flag-gl Reviewed-by: Ian Romanick <[email protected]>
* i965: Make VS programs obey the shader_precompile driconf option.Kenneth Graunke2012-08-271-1/+1
| | | | | | | | Now that it's on by default, we may as well make it obey the flag, for consistency's sake if nothing else. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Reenable the fragment shader precompile.Kenneth Graunke2012-08-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | Precompiling the shader at link time often allows us to avoid compiling it at the first use. This moves the expensive compilation and optimization process to game or level load time, rather than at draw time, where we really can't avoid any cycles and don't want to risk stalling the GPU. The downside is that we have to guess the non-orthagonal state the program will have set when it draws with the shader. Previously, we guessed wrong for nearly every shader, so it wasn't useful. With the recent SamplerUnits rework and this series, we've either eliminated state or made smarter guesses, and usually get it right now. In the L4D2 time demo, I now have 39 fragment shader recompiles and no vertex shader recompiles. Before this series and the SamplerUnits rework, I had 206 fragment shader recompiles and 192 vertex shader recompiles. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Set swizzle fields in the VS precompile program key.Kenneth Graunke2012-08-271-0/+11
| | | | | | | | | | | | | | | | | This fixes a regression since 76d1301e8e8e50dc962601a9977bc52148798349: I began setting SWIZZLE_XYZW for unused sampler units in the actual program keys, since this matched the FS precompile behavior. However, the VS precompile was expecting zero, so that commit made essentially every vertex shader (even those not using texturing) mismatch and need to be recompiled. Setting them in the VS precompile key solves the issue. It also is an improvement over our old behavior: previously we guessed that vertex shaders didn't use any textures at all. Now we actually look to see if the VS had any sampler uniforms and guess based on that. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/vs: Add VS program key dumping to INTEL_DEBUG=perf.Kenneth Graunke2012-08-273-1/+76
| | | | | | | Eric added support for WM key debugging. This adds it for the VS. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Assume shadow sampler swizzling is <X, X, X, 1>.Kenneth Graunke2012-08-271-2/+8
| | | | | | | | | | | | | | | | Our previous assumption, SWIZZLE_XYZW, was completely bogus for depth textures. There are no Y, Z, or W components. DEPTH_TEXTURE_MODE has three options: - GL_LUMINANCE: <X, X, X, 1> - GL_INTENSITY: <X, X, X, X> - GL_ALPHA: <0, 0, 0, X> The default value is GL_LUMINANCE, and most applications don't seem to alter DEPTH_TEXTURE_MODE. Make that our precompile guess. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Index sampler program key data by linker-assigned index.Kenneth Graunke2012-08-276-30/+30
| | | | | | | | | Now that most things are based on the linker-assigned index, it makes sense to convert the arrays in the VS/WM program key as well. It seems silly to leave them indexed by texture unit. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Only set proj_attrib_mask for fixed function.Kenneth Graunke2012-08-272-2/+12
| | | | | | | | | | | | | | brw_wm_prog_key's proj_attrib_mask field is designed to enable an optimization for fixed-function programs, letting us avoid projecting attributes where the divisor is 1.0. However, for shaders, this is not useful, and is pretty much impossible to guess when building the FS precompile key. Turning it off for shaders should allow the precompile to work and not lose much. Signed-off-by: Kenneth Graunke <[email protected]> Suggested-by: Eric Anholt <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Don't set stats_wm in the WM program key on Gen6+.Kenneth Graunke2012-08-271-1/+3
| | | | | | | It's only needed for Gen4/5 IZ lookup workarounds. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Don't set vp_outputs_written in the WM program key on Gen6+.Kenneth Graunke2012-08-272-5/+10
| | | | | | | It's only used by on pre-Sandybridge hardware. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Double the size of the state cache.Kenneth Graunke2012-08-271-2/+2
| | | | | | | | We probably want to do something more sophisticated here, but this at least makes it through L4D2 without dumping the program cache. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glapi/glx: call __glEmptyImage if USE_XCB, not memcpy directlyJulien Cristau2012-08-271-10/+25
| | | | | | | | | | | We were stomping on the caller's buffer by ignoring their alignment requests and other pixel store modes. This patch makes the USE_XCB path match the older one more closely. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52059 Signed-off-by: Julien Cristau <[email protected]> Signed-off-by: Brian Paul <[email protected]>
* gallium/util: implement tile code for PIPE_FORMAT_Z32_FLOATBrian Paul2012-08-271-0/+36
| | | | Reviewed-by: José Fonseca <[email protected]>
* st/mesa: use fallback path for glCopyTexSubImage(GL_TEXTURE_1D_ARRAY)Brian Paul2012-08-271-0/+10
| | | | | | Fixes many failing cases in piglit copyteximage test. Reviewed-by: José Fonseca <[email protected]>
* i965: Move hiz resolve to after renderbuffer resizing (v2)Chad Versace2012-08-271-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Do all pre-draw hiz resolves *after* the renderbuffers are resized by intel_prepare_render. Otherwise, we may resolve buffers that are immediately discarded afterwards. Fixes the assertion failure below when resizing windows in KDE and under some unknown circumstance in Chrome OS: intel_resolve_map.c:46: intel_resolve_map_set: Assertion `(*tail)->need == need' failed. Also, remove the comment that "resolves must occur [...] before setting up any hardware state". That was true when resolves were implemented with meta-ops, but no longer with blorp. v2: - Keep brw_predraw_resolve_buffers in its current position, which is before any brw_context bits are modified. Instead, move the call to intel_prepare_render. Note: This is a candiate for the 8.0 branch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52252 Reported-by: Lu Hua <[email protected]> Reviewed-by: Paul Berry <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965: Remove redundant null checkChad Versace2012-08-271-2/+1
| | | | | | | | intel_renderbuffer_resolve_hiz checks if rb->mt is null, so there is no need for the caller to do so. Reviewed-by: Paul Berry <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* r300g: implement TRUNC correctlyMarek Olšák2012-08-274-1/+42
| | | | This fixes some integer division tests.
* radeonsi: Use FP16 shader export format when necessary / possible.Michel Dänzer2012-08-276-18/+114
| | | | | | | | | Fixes piglit fbo-blending-formats. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Refactor initialization of shader export intrinsic arguments.Michel Dänzer2012-08-271-36/+48
| | | | | | | | | In preparation for extending this code, which would make it rather unwieldy in its current place. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Maintain cache of pixel shader variants according to contxt state.Michel Dänzer2012-08-276-59/+210
| | | | | | | | | Mostly inspired by r600g commit 4acf71f01ea1edb253cd38cc059d4af1a2a40bf4 ('r600g: cache shader variants instead of rebuilding v3'). Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Drop extraneous semicolons from pm4 state macro definitions.Michel Dänzer2012-08-271-3/+3
| | | | | | | | Could cause build failures if trying to use the macros in certain constructs. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: implement compression for MSAA colorbuffers for evergreenMarek Olšák2012-08-2712-19/+529
| | | | | | | | | | | | | | | | This adds the FMASK and CMASK buffers. They share the same resource with color data. COMPRESSION and FAST_CLEAR are always enabled if both FMASK and CMASK are allocated. We initialize the CMASK to a "compressed" state (not "fast cleared"), so that we can keep FAST_CLEAR enabled all the time. Both FMASK and CMASK must be present at the moment. If either one is missing, the other one is not used. v2: add cayman regs in the list Reviewed-by: Jerome Glisse <[email protected]>
* r600g: cleanup names around depth decompressionMarek Olšák2012-08-275-24/+24
| | | | | | for consistency with the upcoming color decompression naming Reviewed-by: Jerome Glisse <[email protected]>
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