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* freedreno/a2xx: fix comparison out of range warnings[email protected]2016-07-301-4/+4
| | | | | Signed-off-by: Francesco Ansanelli <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: init ir3_shader_key with memset()[email protected]2016-07-301-1/+2
| | | | | | | To silence missing initializers warning Signed-off-by: Francesco Ansanelli <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* gallium/freedreno: move cast to avoid integer overflowEric Engestrom2016-07-301-2/+2
| | | | | | | | | Previously, the bitshift would be performed on a simple int (32 bits on most systems), overflow, and then be cast to 64 bits. CovID: 1362461 Signed-off-by: Eric Engestrom <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a2xx: remove duplicate assignmentEric Engestrom2016-07-301-2/+2
| | | | | | CovID: 1362445, 1362446 Signed-off-by: Eric Engestrom <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno: defer flush_queue allocationRob Clark2016-07-302-2/+4
| | | | | | | Some apps, like warsow, create a bazillion contexts but don't render on most of them. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add some hw query tracesRob Clark2016-07-301-0/+16
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: some lockingRob Clark2016-07-309-23/+157
| | | | Signed-off-by: Rob Clark <[email protected]>
* os: add pipe_mutex_assert_locked()Rob Clark2016-07-301-0/+16
| | | | | | | Would be nice if we could also have lockdep, like in the linux kernel. But this is better than nothing. Signed-off-by: Rob Clark <[email protected]>
* freedreno: drop needs_rb_fbdRob Clark2016-07-306-31/+12
| | | | | | | | | | | We need to emit RB_FRAME_BUFFER_DIMENSION once per batch.. tracking this in fd_context is wrong when the gmem code executes asynchronously from the flush_queue worker. But in fact we don't really need to track it at all. We cannot assume previous value at the beginning of the batch (because of other processes potentially using the GPU), so just drop the tracking and emit it in _tile_init(). Signed-off-by: Rob Clark <[email protected]>
* freedreno: move needs_wfi into batchRob Clark2016-07-3019-94/+93
| | | | | | | This is also used in gmem code, which executes from the "bottom half" (ie. from the flush_queue worker thread), so it cannot be in fd_context. Signed-off-by: Rob Clark <[email protected]>
* freedreno: a bit of micro-optimizationRob Clark2016-07-302-10/+10
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: drop mem2gmem/gmem2mem query stagesRob Clark2016-07-302-17/+1
| | | | | | | | | They weren't really used, and it gets somewhat more complicated to deal with if batches are flushed asynchronously (on another thread). So just drop them, and move _query_set_state(NULL) call into batch (so it is not happening on background thread). Signed-off-by: Rob Clark <[email protected]>
* freedreno: threaded batch flushRob Clark2016-07-309-26/+99
| | | | | | | | | | | | | | | With the state accessed from GMEM+submit factored out of fd_context and into fd_batch, now it is possible to punt this off to a helper thread. And more importantly, since there are cases where one context might force the batch-cache to flush another context's batches (ie. when there are too many in-flight batches), using a per-context helper thread keeps various different flushes for a given context serialized. TODO as with batch-cache, there are a few places where we'll need a mutex to protect critical sections, which is completely missing at the moment. Signed-off-by: Rob Clark <[email protected]>
* freedreno: track batch/blit typesRob Clark2016-07-305-24/+52
| | | | | | | | | | | | Add a bit of extra book-keeping about blits and back-blits (from resource shadowing). If the app uploads all mipmap levels, as opposed to uploading the first level and then glGenerateMipmap(), we can discard the back-blit (as opposed to being naive and shadowing the resource for each mipmap level). Also, after a normal blit, we might as well flush the batch immediately, since there is not likely to be further rendering to the surface. Signed-off-by: Rob Clark <[email protected]>
* freedreno: re-order support for hw queriesRob Clark2016-07-3019-264/+288
| | | | | | | | | | | Push query state down to batch, and use the resource tracking to figure out which batch(es) need to be flushed to get the query result. This means we actually need to allocate the prsc up front, before we know the size. So we have to add a special way to allocate an un- backed resource, and then later allocate the backing storage. Signed-off-by: Rob Clark <[email protected]>
* freedreno: use prsc for hw queriesRob Clark2016-07-303-35/+45
| | | | | | | | | Switch to using a pipe_resource (rather than an fd_bo directly) for hw query result buffers. This is first step towards making queries work properly with reordered batches, since we'll need the additional dependency tracking to know which batches to flush. Signed-off-by: Rob Clark <[email protected]>
* freedreno: support discarding previous rendering in special casesRob Clark2016-07-303-5/+32
| | | | | | | | | | Basically, to "DCE" blits triggered by resource shadowing, in cases where the levels are immediately completely overwritten. For example, mid-frame texture upload to level zero triggers shadowing and back-blits to the remaining levels, which are immediately overwritten by glGenerateMipmap(). Signed-off-by: Rob Clark <[email protected]>
* freedreno: shadow textures if possible to avoid stall/flushRob Clark2016-07-303-11/+211
| | | | | | | | | | | | | | To make batch re-ordering useful, we need to be able to create shadow resources to avoid a flush/stall in transfer_map(). For example, uploading new texture contents or updating a UBO mid-batch. In these cases, we want to clone the buffer, and update the new buffer, leaving the old buffer (whose reference is held by cmdstream) as a shadow. This is done by blitting the remaining other levels (and whatever part of current level that is not discarded) from the old/shadow buffer to the new one. Signed-off-by: Rob Clark <[email protected]>
* freedreno: spiff up some debug tracesRob Clark2016-07-306-6/+18
| | | | | | | Make it easier to track batches, to ensure things happen properly when they are reordered. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add batch-cache and batch reorderingRob Clark2016-07-3015-111/+760
| | | | | | | | | | | | Note that I originally also had a entry-point that would construct a key and do lookup from a pipe_surface. I ended up not needing that (yet?) but it is easy-enough to re-introduce later if we need it for the blit path. For now, not enabled by default, but can be enabled (on a3xx/a4xx) with FD_MESA_DEBUG=reorder. Signed-off-by: Rob Clark <[email protected]>
* freedreno: move more batch related tracking to fd_batchRob Clark2016-07-3023-398/+420
| | | | | | | | | | | | | | | | To flush batches out of order, the gmem code needs to not depend on state from fd_context (since that may apply to a more recent batch). So this all moves into batch. The one exception is the gmem/pipe/tile state itself. But this is only used from gmem code (and batches are flushed serially). The alternative would be having to re-calculate GMEM layout on every batch, even if the dimensions of the render targets are the same. Note: This opens up the possibility of pushing gmem/submit into a helper thread. Signed-off-by: Rob Clark <[email protected]>
* freedreno: dynamically sized/growable cmd buffersRob Clark2016-07-302-23/+33
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: push resource tracking down into batchRob Clark2016-07-307-42/+51
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: introduce fd_batchRob Clark2016-07-3020-177/+252
| | | | | | | | | | | | | | | | | | | Introduce the batch object, to track a batch/submit's worth of ringbuffers and other bookkeeping. In this first step, just move the ringbuffers into batch, since that is mostly uninteresting churn. For now there is just a single batch at a time. Note that one outcome of this change is that rb's are allocated/freed on each use. But the expectation is that the bo pool in libdrm_freedreno will save us the GEM bo alloc/free which was the initial reason to implement a rb pool in gallium. The purpose of the batch is to eventually facilitate out-of-order rendering, with batches associated to framebuffer state, and tracking the dependencies on other batches. Signed-off-by: Rob Clark <[email protected]>
* mesa: remove dd_function_table::UseProgramMarek Olšák2016-07-303-10/+0
| | | | | | finally unused Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: update sampler states when shaders are changedMarek Olšák2016-07-301-6/+12
| | | | | | | This bug seems to have always been there. Applications changing shaders but not textures between draw calls would have gotten undefined behavior. Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: don't dirty sample shading on _NEW_PROGRAMMarek Olšák2016-07-301-2/+1
| | | | | | Already done as part of ST_NEW_FRAGMENT_PROGRAM in st_validate_state. Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: remove excessive shader state dirtyingMarek Olšák2016-07-307-57/+33
| | | | | | | | | This just needs to be done by st_validate_state. v2: add "shaders_may_be_dirty" flags for not skipping st_validate_state on _NEW_PROGRAM to detect real shader changes Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: unreference optional shaders when unbindingMarek Olšák2016-07-301-0/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: skip updates of states that have no effectMarek Olšák2016-07-302-9/+28
| | | | | | v2: - also don't check edge flags for GLES Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: completely rewrite state atomsMarek Olšák2016-07-3033-516/+381
| | | | | | | | | | | | | | | | | | | | The goal is to do this in st_validate_state: while (dirty) atoms[u_bit_scan(&dirty)]->update(st); That implies that atoms can't specify which flags they consume. There is exactly one ST_NEW_* flag for each atom. (58 flags in total) There are macros that combine multiple flags into one for easier use. All _NEW_* flags are translated into ST_NEW_* flags in st_invalidate_state. st/mesa doesn't keep the _NEW_* flags after that. torcs is 2% faster between the previous patch and the end of this series. v2: - add st_atom_list.h to Makefile.sources Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: remove st_tracked_state::nameMarek Olšák2016-07-3020-58/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: remove atom debugging codeMarek Olšák2016-07-301-67/+3
| | | | | | This won't be needed after the rewrite. Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Fix move_interpolation_to_top() pass.Kenneth Graunke2016-07-291-21/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | The pass I introduced in commit a2dc11a7818c04d8dc0324e8fcba98d60bae was entirely broken. A missing "break" made the load_interpolated_input case always fall through to "default" and hit a "continue", making it not actually move any load_interpolated_input intrinsics at all. It would only move the simple load_barycentric_* intrinsics, which don't emit any code anyway, making it basically useless. The initial version I sent of the pass worked, but I apparently failed to verify that the simplified version in v2 actually worked. With the obvious fix applied (so we actually tried to move load_interpolated_input intrinsics), I discovered a second bug: we weren't moving the offset SSA def to the top, breaking SSA validation. The new version of the pass actually moves load_interpolated_input intrinsics and all their dependencies, as intended. Papers over GPU hangs on Ivybridge and Baytrail caused by the recent NIR FS input rework by restoring the old behavior. (I'm not honestly sure why they hang with PLN not at the top.) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97083 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* freedreno: limit non-user constant buffers to a4xxRob Clark2016-07-291-1/+1
| | | | | | | Seems to mostly work on a3xx. Except when it doesn't and kills gpu quite badly. Signed-off-by: Rob Clark <[email protected]>
* glsl: fix uninitialized instance variableJan Ziak2016-07-291-0/+1
| | | | | | | | Valgrind detected that variable ir_copy_propagation_visitor::killed_all is uninitialized. Signed-off-by: Jan Ziak (http://atom-symbol.net) <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* virgl: add exported dmabuf to BO hash tableRob Herring2016-07-291-0/+3
| | | | | | | | | Exported dmabufs can get imported by the same process, but the handle was not getting added to the hash table on export. Add the handle to the hash table on export. Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* anv: Enable per sample shading on gen8+Anuj Phogat2016-07-282-4/+1
| | | | | | | | | | | | | Vulkan CTS test results on gen9: ./deqp-vk --deqp-case=dEQP-VK.pipeline.multisample.min_sample_shading* Test run totals: Passed: 60/90 (66.7%) Failed: 0/90 (0.0%) Not supported: 30/90 (33.3%) Warnings: 0/90 (0.0%) Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline: Fix setting per sample shading in pixel shaderAnuj Phogat2016-07-281-4/+1
| | | | | | | | | | | | We should use the persample_dispatch variable in prog_data. Fixes all (~60) the DEQP sample shading tests. Many tests exited with VK_ERROR_OUT_OF_DEVICE_MEMORY without this patch. V2: Use the shader key bits set in brw_compile_fs (Jason) Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* egl/dri2: Add reference count for dri2_egl_displayNicolas Boichat2016-07-282-20/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | android.opengl.cts.WrapperTest#testGetIntegerv1 CTS test calls eglTerminate, followed by eglReleaseThread. A similar case is observed in this bug: https://bugs.freedesktop.org/show_bug.cgi?id=69622, where the test calls eglTerminate, then eglMakeCurrent(dpy, NULL, NULL, NULL). With the current code, dri2_dpy structure is freed on eglTerminate call, so the display is not initialized when eglReleaseThread calls MakeCurrent with NULL parameters, to unbind the context, which causes a a segfault in drv->API.MakeCurrent (dri2_make_current), either in glFlush or in a latter call. eglTerminate specifies that "If contexts or surfaces associated with display is current to any thread, they are not released until they are no longer current as a result of eglMakeCurrent." However, to properly free the current context/surface (i.e., call glFlush, unbindContext, driDestroyContext), we still need the display vtbl (and possibly an active dri dpy connection). Therefore, we add some reference counter to dri2_egl_display, to make sure the structure is kept allocated as long as it is required. One drawback of this is that eglInitialize may not completely reinitialize the display (if eglTerminate was called with a current context), however, this seems to meet the EGL spec quite well, and does not permanently leak any context/display even for incorrectly written apps. Cc: "12.0" <[email protected]> Signed-off-by: Nicolas Boichat <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* vc4: automake: remove vc4_drm.h from the sources listsEmil Velikov2016-07-281-1/+0
| | | | | | | | | The file was removed with earlier commit breaking 'make dist'. Drop it from Makefile.sources since it's no longer around. Fixes: 16985eb308e ("vc4: Switch to using the libdrm-provided vc4_drm.h.") Signed-off-by: Emil Velikov <[email protected]>
* ddebug: use pclose to close a popen()'d FILENicolai Hähnle2016-07-281-1/+1
| | | | | | Found by Coverity. Reviewed-by: Marek Olšák <[email protected]>
* glsl: fix optimization of discard nested multiple levelsNicolai Hähnle2016-07-281-1/+8
| | | | | | | | | | | | The order of optimizations can lead to the conditional discard optimization being applied twice to the same discard statement. In this case, we must ensure that both conditions are applied. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96762 Cc: [email protected] Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* st_glsl_to_tgsi: only skip over slots of an input array that are presentNicolai Hähnle2016-07-281-1/+5
| | | | | | | | | | When an application declares varying arrays but does not actually do any indirect indexing, some array indices may end up unused in the consuming shader, so the number of input slots that correspond to the array ends up less than the array_size. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* clover: make GCC 4.8 happyDieter Nützel2016-07-271-1/+1
| | | | | | | | | | | | | | | Without this GCC 4.8.x throws below error: error: invalid initialization of non-const reference of type 'clover::llvm::compat::raw_ostream_to_emit_file {aka llvm::raw_svector_ostream&}' from an rvalue of type '<brace-enclosed initializer list>' v2: change commit title and add error message like Eric Engestrom requested Signed-off-by: Dieter Nützel <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97019 [ Francisco Jerez: Trivial formatting fix. ] Reviewed-by: Francisco Jerez <[email protected]>
* i965: remove unnecessary null checkTimothy Arceri2016-07-281-4/+1
| | | | | | | | We would have hit a segfault already if this could be null. Fixes Coverity warning spotted by Matt. Reviewed-by: Matt Turner <[email protected]>
* glsl: free hash tables earlierTimothy Arceri2016-07-281-7/+3
| | | | | | | These are only used by get_matching_input() which has been call at this point so free the hash tables. Reviewed-by: Iago Toral Quiroga <[email protected]>
* nvc0: enable ARB_tessellation_shader on GM107+Samuel Pitoiset2016-07-271-3/+0
| | | | | | | This exposes OpenGL 4.1 on Maxwell (tested on GM107 and GM206). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gm107/ir: add a legalize SSA pass for PFETCHSamuel Pitoiset2016-07-274-2/+43
| | | | | | | PFETCH, actually ISBERD on GM107+ ISA only accepts a GPR for src0. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: fix up TCP header on GM107+Samuel Pitoiset2016-07-271-0/+9
| | | | | | | | | | The number of outputs patch (limited to 255) has moved in the TCP header, but blob seems to also set the old position. Also, the high 8-bits are now located inbetween the min/max parallel output read address at position 20. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
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