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* radv: cleanup radv_device_finish_meta_XXX() helpersSamuel Pitoiset2017-10-028-219/+136
* radv: select the pipeline outside of emit_fast_clear_flush()Samuel Pitoiset2017-10-021-12/+11
* radv: drop useless param in emit_depth_decomp()Samuel Pitoiset2017-10-021-5/+4
* radv: drop useless check in depth_view_can_fast_clear()Samuel Pitoiset2017-10-021-2/+1
* radv: add radv_subpass_clear_attachment() helperSamuel Pitoiset2017-10-021-20/+32
* radv: add radv_attachment_needs_clear() helperSamuel Pitoiset2017-10-021-39/+31
* radv: remove unused param in radv_handle_{cmask,dcc}_image_transition()Samuel Pitoiset2017-10-021-8/+4
* radv: add radv_vi_dcc_enabled() helperSamuel Pitoiset2017-10-023-2/+7
* radv: do not need to double zero-init the meta state structuresSamuel Pitoiset2017-10-0212-28/+0
* radv: inline destroy_render_pass()Samuel Pitoiset2017-10-021-9/+6
* radv: use pipeline handles instead of objects for meta clear operationsSamuel Pitoiset2017-10-022-44/+36
* radv: inline blit2d_unbind_dst()Samuel Pitoiset2017-10-021-9/+3
* radv: rework DCC/CMASK/FMASK/HTILE allocationsSamuel Pitoiset2017-10-021-27/+56
* i965: skip reading unused slots at the begining of the URB for the FSIago Toral Quiroga2017-10-023-14/+38
* i965: Normalize types for FBL, FBH, etcMatt Turner2017-09-302-15/+11
* radeonsi: don't use the template keywordMarek Olšák2017-09-301-7/+7
* glx: don't use the template keywordMarek Olšák2017-09-301-3/+3
* gallium/vl: don't use the template keywordMarek Olšák2017-09-301-14/+14
* egl/dri2: don't use the template keywordMarek Olšák2017-09-301-3/+3
* radeonsi/uvd: clean up si_video_buffer_createBenedikt Schemmer2017-09-301-30/+17
* radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bbMarek Olšák2017-09-301-3/+8
* gallium: add new LOD opcodeRoland Scheidegger2017-09-305-5/+74
* drirc: whitelist glthread for OutlastKamil Páral2017-09-291-0/+3
* st/va: add dst rect to avoid scale on deintLeo Liu2017-09-291-6/+6
* radeonsi: emit DLDEXP and DFRACEXP TGSI opcodesNicolai Hähnle2017-09-292-1/+26
* radeonsi: emit LDEXP opcodeNicolai Hähnle2017-09-292-1/+3
* st/glsl_to_tgsi: use LDEXP when availableNicolai Hähnle2017-09-291-3/+7
* gallium: add LDEXP TGSI instruction and corresponding capNicolai Hähnle2017-09-2920-3/+50
* tgsi: infer that dst[1] of DFRACEXP is an integerNicolai Hähnle2017-09-295-6/+9
* gallivm: add support for TGSI instructions with two outputsNicolai Hähnle2017-09-293-1/+31
* gallivm: add dst register index to lp_build_tgsi_context::emit_storeNicolai Hähnle2017-09-296-20/+27
* tgsi: clarify the semantics of DFRACEXPNicolai Hähnle2017-09-294-22/+20
* tgsi: fix the documentation of DLDEXPNicolai Hähnle2017-09-291-1/+1
* tgsi: infer that DLDEXP's second source has an integer typeNicolai Hähnle2017-09-294-7/+11
* glsl/lower_instruction: handle denorms and overflow in ldexp correctlyNicolai Hähnle2017-09-291-64/+107
* util/queue: fix a race condition in the fence codeNicolai Hähnle2017-09-291-0/+13
* r600: cleanup set_occlusion_query_stateNicolai Hähnle2017-09-293-14/+3
* r300: add missing case PIPE_SHADER_CAP_INT64_ATOMICSNicolai Hähnle2017-09-291-0/+1
* radeonsi: fix border color translation for integer texturesNicolai Hähnle2017-09-293-29/+60
* radeonsi: clamp border colors for upgraded depth texturesNicolai Hähnle2017-09-291-59/+60
* radeonsi: clamp depth comparison value only for fixed point formatsNicolai Hähnle2017-09-297-14/+55
* radeonsi/gfx9: fix geometry shaders without output verticesNicolai Hähnle2017-09-291-3/+5
* amd/common: save an instruction in the build_cube_select sequenceNicolai Hähnle2017-09-291-5/+6
* amd/common: fix build_cube_selectNicolai Hähnle2017-09-291-3/+3
* st/glsl_to_tgsi: fix conditional assignments to packed shader outputsNicolai Hähnle2017-09-291-1/+9
* st/glsl_to_tgsi: fix a use-after-free in merge_two_dstsNicolai Hähnle2017-09-291-1/+2
* radeonsi: move descriptor logs to after corresponding draw/compute packetNicolai Hähnle2017-09-292-8/+6
* amd/common: remove ac_shader_abi::chip_classNicolai Hähnle2017-09-293-15/+10
* gallium/radeon: fix a commentNicolai Hähnle2017-09-291-1/+1
* i965/fs: force pull model for 64-bit GS inputsIago Toral Quiroga2017-09-292-7/+15
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