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* winsys/radeon: clamp vram_vis_size to 256MBMarek Olšák2017-01-301-1/+1
* radeonsi: handle count_from_stream_output in a few IA_MULTI_VGT_PARAM casesMarek Olšák2017-01-301-2/+4
* radeonsi: don't invoke DCC decompression in update_all_texture_descriptorsMarek Olšák2017-01-301-5/+6
* radeonsi: fold info->indirect conditionals into the last one in draw_vboMarek Olšák2017-01-301-12/+13
* radeonsi: atomize the scratch buffer stateMarek Olšák2017-01-306-29/+32
* r600: Fix stack overflowBartosz Tomczyk2017-01-301-1/+1
* gallium/radeon: add new HUD queries for monitoring the CPSamuel Pitoiset2017-01-304-3/+80
* gallium/radeon: add new GPU-sdma-busy HUD querySamuel Pitoiset2017-01-304-1/+21
* gallium/radeon: rename grbm to mmio in the gpu load pathSamuel Pitoiset2017-01-302-32/+33
* winsys/amdgpu: add a fast exit path into amdgpu_cs_add_bufferMarek Olšák2017-01-302-0/+21
* winsys/amdgpu: do not iterate twice when adding fence dependenciesSamuel Pitoiset2017-01-301-31/+32
* winsys/amdgpu: add one likely() call in amdgpu_cs_flush()Samuel Pitoiset2017-01-301-2/+2
* hud: fix compilation warnings in hud_nic_graph_install()Samuel Pitoiset2017-01-301-2/+2
* st/mesa: make st_texture_get_sampler_view() staticSamuel Pitoiset2017-01-302-5/+1
* gallium/radeon: remove r600_common_context::max_dbMarek Olšák2017-01-303-20/+17
* winsys/amdgpu: fix ADDR_REGISTER_VALUE::backendDisablesMarek Olšák2017-01-301-1/+1
* gallium/radeon: clean up r600_query_init_backend_maskMarek Olšák2017-01-306-22/+21
* radeonsi: precompute IA_MULTI_VGT_PARAM values into a tableMarek Olšák2017-01-306-72/+163
* radeonsi: move VGT_VERTEX_REUSE_BLOCK_CNTL into shader states for PolarisMarek Olšák2017-01-304-21/+43
* radeonsi: state atom IDs don't have to be off by oneMarek Olšák2017-01-302-4/+4
* radeonsi: use a bitmask for looping over dirty PM4 statesMarek Olšák2017-01-305-18/+20
* radeonsi: atomize L2 prefetchesMarek Olšák2017-01-307-36/+50
* radeonsi: unbind disabled shader stages to prevent useless L2 prefetchesMarek Olšák2017-01-301-0/+6
* radeonsi: also prefetch compute shadersMarek Olšák2017-01-301-0/+12
* radeonsi: update dirty_level_mask only after the first draw after FB changeMarek Olšák2017-01-303-24/+31
* gallium/radeon: allow VRAM-only placements again on APUs & recent amdgpuMarek Olšák2017-01-301-0/+4
* radeonsi: don't set +fp64-denormalsMarek Olšák2017-01-301-1/+1
* radeonsi: remove si_shader_context::param_tess_offchipMarek Olšák2017-01-302-8/+3
* etnaviv: force vertex buffers through the MMULucas Stach2017-01-301-1/+4
* radv: Expose VK_KHR_maintenance1Andres Rodriguez2017-01-301-0/+4
* radv: Fix vkCmdCopyImage for 2d slices into 3d ImagesAndres Rodriguez2017-01-301-1/+4
* radv: Expose transfer format features.Bas Nieuwenhuizen2017-01-301-0/+11
* radv: Don't allow any operations on non-supported depth/stencil formats.Bas Nieuwenhuizen2017-01-301-4/+5
* radv: use new error codes for AllocateDescriptorSetsAndres Rodriguez2017-01-301-1/+1
* radv: vkAllocateCommandBuffers should NULL all output handlesAndres Rodriguez2017-01-301-0/+3
* radv: add trim command pool stubAndres Rodriguez2017-01-301-0/+7
* i965: Support the force_glsl_version driconf option.Kenneth Graunke2017-01-292-0/+4
* i965: Fix check for negative pitch in can_do_fast_copy_blit().Kenneth Graunke2017-01-291-6/+4
* radv: Handle command buffers that need scratch memory.Bas Nieuwenhuizen2017-01-303-6/+199
* radv: Track scratch usage across pipelines & command buffers.Bas Nieuwenhuizen2017-01-304-8/+119
* radv/ac: Add compiler support for spilling.Bas Nieuwenhuizen2017-01-307-23/+42
* radv/amdgpu: Support a preamble CS.Bas Nieuwenhuizen2017-01-304-15/+56
* i965: add assert to while_jumps_before_offset()Timothy Arceri2017-01-301-0/+1
* i965: fix up asserts in brw_inst_set_jip()Timothy Arceri2017-01-301-2/+2
* llvmpipe: Use LLVMDumpModule, not DumpModule.Bas Nieuwenhuizen2017-01-291-1/+1
* various: Fix missing DumpModule with recent LLVM.Bas Nieuwenhuizen2017-01-295-5/+22
* r600g: use ieee variants of multiplication instructionsIlia Mirkin2017-01-292-18/+19
* r600g: add support for optionally using non-IEEE mul opsIlia Mirkin2017-01-282-4/+18
* vc4: Coalesce into TLB writes as well as VPM/tex.Eric Anholt2017-01-281-1/+5
* vc4: Avoid an extra temporary and mov in ffloor/ffract/fceil.Eric Anholt2017-01-281-13/+18