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* gles1: fail symbol check if lib is missingEric Engestrom2017-10-311-1/+9
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gbm: fail symbol check if lib is missingEric Engestrom2017-10-311-1/+10
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* wayland-egl: fail symbol check if lib is missingEric Engestrom2017-10-311-1/+9
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl: fail symbol check if lib is missingEric Engestrom2017-10-311-1/+9
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* meson: set visibility flags on gbmDylan Baker2017-10-311-1/+1
| | | | | | | | | This is done in autotools, and is an oversight in the meson build. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Tested-by: Eric Engestrom <[email protected]>
* meson: Don't link gbm with threadsDylan Baker2017-10-311-1/+1
| | | | | | | | | | It's supposed to be linked with pthread-stubs (if the platform needs pthread-stubs). Pthread stubs support isn't (yet) implemented in the meson build, so add a TODO. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx.Andrey Grodzovsky2017-10-316-0/+15
| | | | | Signed-off-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radv: bail out when binding the same vertex buffersSamuel Pitoiset2017-10-311-2/+16
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: bail out when binding the same index bufferSamuel Pitoiset2017-10-312-0/+14
| | | | | | | DOW3 appears to hit this path. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* meson: use dep_m in libgalliumErik Faye-Lund2017-10-311-1/+1
| | | | | | | | The u_format_other.c users sqrtf, which on some systems require a math-library. So let's make sure we link with it. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* radv: use correct alloc function when loading from diskTimothy Arceri2017-10-311-1/+14
| | | | | | | | | Fixes regression in: dEQP-VK.api.object_management.alloc_callback_fail.graphics_pipeline Fixes: 1e84e53712ae "radv: add cache items to in memory cache when reading from disk" Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* i965: Fix ARB_indirect_parameters logic.Plamena Manolova2017-10-301-31/+16
| | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the ARB_indirect_parameters logic in brw_draw_prims, so that our implementation isn't affected if another application attempts to use predicates. Previously we were using a predicate with a DELTAS_EQUAL comparison operation and relying on the MI_PREDICATE_DATA register being 0. Our code to initialize MI_PREDICATE_DATA to 0 was incorrect, so we were accidentally using whatever value was written there. Because the kernel does not initialize the MI_PREDICATE_DATA register on hardware context creation, we might inherit the value from whatever context was last running on the GPU (likely another process). The Haswell command parser also does not currently allow us to write the MI_PREDICATE_DATA register. Rather than fixing this and requiring an updated kernel, we switch to a different approach which uses a SRCS_EQUAL predicate that makes no assumptions about the states of any of the predicate registers. Fixes Piglit's spec/arb_indirect_parameters/tf-count-arrays test. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103085 Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Don't flag BRW_NEW_SURFACES unless some push constants are dirty.Kenneth Graunke2017-10-301-2/+1
| | | | | | | | | | | | | | | | | Due to a gaffe on my part, we were re-emitting all binding table entries on every single draw call. The push_constant_packets atom listens to BRW_NEW_DRAW_CALL, but skips emitting 3DSTATE_CONSTANT_XS for each stage unless stage_state->push_constants_dirty is true. However, it flagged BRW_NEW_SURFACES unconditionally at the end, by mistake. Instead, it should only flag it if we actually emit 3DSTATE_CONSTANT_XS for a stage. We can move it a few lines up, inside the loop - the early continues will skip over it if push constants aren't dirty for a stage. With INTEL_NO_HW=1 set, improves performance of GFXBench5 gl_driver_2 on Apollolake at 1280x720 by 1.01122% +/- 0.470723% (n=35). Reviewed-by: Rafael Antognolli <[email protected]>
* intel/genxml: Fix decoding of groups with fields smaller than a DWord.Kenneth Graunke2017-10-302-10/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Groups containing fields smaller than a DWord were not being decoded correctly. For example: <group count="32" start="32" size="4"> <field name="Vertex Element Enables" start="0" end="3" type="uint"/> </group> gen_field_iterator_next would properly walk over each element of the array, incrementing group_iter, and calling iter_group_offset_bits() to advance to the proper DWord. However, the code to print the actual values only considered iter->field->start/end, which are 0 and 3 in the above example. So it would always fetch bits 3:0 of the current DWord when printing values, instead of advancing to each element of the array, printing bits 0-3, 4-7, 8-11, and so on. To fix this, we add new iter->start/end tracking, which properly advances for each instance of a group's field. Caught by Matt Turner while working on 3DSTATE_VF_COMPONENT_PACKING, with a patch to convert it to use an array of bitfields (the example above). This also fixes the decoding of 3DSTATE_SBE's "Attribute Active Component Format" fields. Reviewed-by: Jordan Justen <[email protected]>
* glsl: Fix bad formatting in a commentIan Romanick2017-10-301-1/+1
| | | | | | Trivial Signed-off-by: Ian Romanick <[email protected]>
* broadcom/vc5: Force blending to treat alpha as 1 for formats without alpha.Eric Anholt2017-10-303-7/+27
| | | | | | | Fixes fbo-blending-formats on RGB8 and 565. We will still need to demote blending to shader code in the MRT case to fix it in general, but that can be added when we start doing 32F blending (which also needs to be done in the shader).
* broadcom/vc5: Do BGRA vs RGBA swapping for the BLEND_CONSTANT_COLOR.Eric Anholt2017-10-304-11/+30
| | | | Fixes many of the fbo-blending-formats tests.
* broadcom/vc5: Pack clear colors according to the TLB internal format/type.Eric Anholt2017-10-302-10/+49
| | | | | | | | | | The previous packing I did got us all the R*16F and R*32F formats, where the pipe format basically matched the TLB's format, but since the clear color will just be memcpyed to the TLB, we should be looking at its format for deciding how to pack. Fixes RGB565, RGB5_A1 and RGBA10 fbo-clear-formats tests and improves 4444.
* broadcom/vc5: Don't do r/b channel swapping on 565.Eric Anholt2017-10-301-1/+7
| | | | The HW's format actually matches the gallium format.
* broadcom/vc5: Use the proper gallium format for our RGB10_A2.Eric Anholt2017-10-301-1/+1
| | | | This keeps us from needing our own reswizzling of the B vs R fields.
* broadcom/vc5: Add some comments about the texture/output format ordering.Eric Anholt2017-10-301-7/+15
| | | | | | | | The output formats are consistent with their channels appearing from low to high in their name. Textures are interpreted the same way, but their names may have the channels swapped around. I'm retaining the texture names so that we are consistent with the documentation, but I want to leave a warning for others.
* broadcom/vc5: Drop duplicated setup of clip_window_height_in_pixels.Eric Anholt2017-10-301-1/+0
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* broadcom/vc5: Don't forget to actually turn on stencil testing.Eric Anholt2017-10-301-0/+3
| | | | | I had the rest of stencil state set up, but forgot to actually enable it in the higher level configuration bits packet.
* broadcom/vc5: Stop lowering negates to subs.Eric Anholt2017-10-301-1/+8
| | | | | | | | In the case of fneg(0.0), we were getting back 0.0 instead of -0.0. We were also needing an immediate 0 value for ineg, when there's an opcode to do the job properly. Fixes fs-floatBitsToInt-neg.shader_test.
* broadcom/vc5: Set up MSAA texture type according to the internal format.Eric Anholt2017-10-302-2/+39
| | | | | It gets most of EXT_framebuffer_multisample-formats passing, but doesn't really work for texture views.
* broadcom/vc5: Use the sampler view's format, not the resource's.Eric Anholt2017-10-303-8/+1
| | | | | This should help with texture views, though I just noticed this while reading the code.
* broadcom/vc5: Emit raw loads for MSAA buffers.Eric Anholt2017-10-301-0/+58
| | | | | Similar to stores, but we also need to emit dummy stores in between each load, to flush out the previous queued load.
* broadcom/vc5: Use raw stores for MSAA buffers.Eric Anholt2017-10-301-15/+97
| | | | | | | | | | | We were storing the resolved pixels in all cases, but nr_samples > 0 means we should be keeping the per-sample values. We will probably want to change the job structure at some point, as we'll want to recognize full-buffer resolves and do the resolved store in the same job as the original rendering, meaning we'll need to track both the MSAA and single-sample resources in the job. However, this will be enough to build the rest of the MSAA support.
* broadcom/vc5: Add lowering for txf_ms to a txf on a 2x2-scaled texture.Eric Anholt2017-10-306-4/+96
| | | | | | | | | The HW has no native sampler support for multisample textures, but since we only need to support txf_ms and the layout is UIF, we just need to scale up the texcoords and then add in the sample. This drops the old TEXTURE_MSAA_ADDR special uniform, since we're treating MSAA textures as textures, rather than basically texbos like VC4 had to.
* broadcom/vc5: Lay out MSAA textures/renderbuffers as UIF scaled by 4.Eric Anholt2017-10-302-14/+37
| | | | | | We just need to multiply width/height by 2 each, and always set them up as UIF tiling, since that's how the TLB will store them in raw (per-sample) mode.
* broadcom/vc5: Keep output height pad out of the store TLB general address.Eric Anholt2017-10-301-1/+1
| | | | The equivalent load already had the pad separated out.
* broadcom/vc5: Drop padding bits from the texture shader state's address.Eric Anholt2017-10-301-1/+1
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* broadcom/vc5: Drop alignment bits from texture P1's address.Eric Anholt2017-10-301-1/+1
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* broadcom/vc5: Drop alignment bits from Z/S rendering mode config address.Eric Anholt2017-10-301-1/+1
| | | | Improves CLIF dumping output.
* broadcom/xml: Fix address packing for address with >= 8 alignment bits.Eric Anholt2017-10-301-2/+5
| | | | | | | We were handing the intra-byte padding fine, but with a 24-bit address (bottom 8 bits implied 0) we would end up off by 8 bytes in our shift, impacting vc5's load/store general packets (all other packets we have had <8 bits of padding).
* broadcom/clif: Print out the contents of the generic tile list.Eric Anholt2017-10-301-0/+19
| | | | This is the real meat of the RCL, so let's get it printed again.
* broadcom/clif: Move the CL printing part of CL dumps to a helper.Eric Anholt2017-10-301-28/+32
| | | | This will let me reuse the printing for processing branches to other CLs.
* broadcom/vc5: Lower unpack_*_4x8 to normal math.Eric Anholt2017-10-301-0/+3
| | | | | | We only have 2x16 unpacking in our ALUs. To enable this, we also need lower_fdiv for its new instructions, which had been handled at a higher level previously.
* broadcom/vc5: Add PIPE_TEX_WRAP_CLAMP support for linear-filtered textures.Eric Anholt2017-10-303-4/+16
| | | | | | I already had the texture's wrapping set up to use different behavior for nearest or linear, so we just needed to saturate the coordinates in linear mode to get the "proper" blend between the edge and border values.
* broadcom/vc5: Disable GL_ARB_transform_feedback3.Eric Anholt2017-10-301-1/+1
| | | | We don't seem to have a way to generally handle gl_SkipComponents.
* broadcom/vc5: Fix gl_FragCoord pixel center setup.Eric Anholt2017-10-301-3/+4
| | | | Fixes glsl-arb-fragment-coord-conventions.
* broadcom/vc5: Always set up 1D textures as raster order.Eric Anholt2017-10-301-0/+5
| | | | | | 1D is the exception to "all V3D textures are tiled", since tiling 1D textures would just waste memory and cache space. This ended up being a problem once we started actually marking 1D textures as 1D instead of 2D.
* broadcom/xml: Throw an #error in XML-based codegen for a >1bit boolEric Anholt2017-10-301-0/+3
| | | | | I've debugged two nasty errors now due to copy-and-pasting a bool type when writing a uint field. Make sure I don't do that again.
* broadcom/vc4: Fix bool marking on Rasterizer Oversample Mode.Eric Anholt2017-10-301-1/+1
| | | | | We don't set this field using the XML codegen, but this would help us decode the right value in case of 16x (VG) oversampling.
* broadcom/vc5: Mark lookup type as uint, not bool.Eric Anholt2017-10-301-1/+1
| | | | Fixes non-2D texturing.
* broadcom/vc5: Fix GPU hang with no vertex elements used by the VS.Eric Anholt2017-10-301-4/+24
| | | | | | Like VC4, we need to at least have one element set up, but unlike VC4 it seems we don't need to read it to keep the HW happy. Fixes GPU hangs with glsl-no-vertex-attribs.shader_test.
* intel: common: silence compiler warningLionel Landwerlin2017-10-301-1/+1
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* glsl/linker: Check that re-declared, inter-shader built-in blocks matchEduardo Lima Mitev2017-10-301-0/+29
| | | | | | | | | | | | | | | | | | | | | | | >From GLSL 4.5 spec, section "7.1 Built-In Language Variables", page 130 of the PDF states: "If multiple shaders using members of a built-in block belonging to the same interface are linked together in the same program, they must all redeclare the built-in block in the same way, as described in section 4.3.9 “Interface Blocks” for interface-block matching, or a link-time error will result." Fixes: * GL45-CTS.CommonBugs.CommonBug_PerVertexValidation v2 (Neil Roberts): Explicitly look for gl_PerVertex in the symbol tables instead of waiting to find a variable in the interface. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102677 Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Eduardo Lima Mitev <[email protected]> Signed-off-by: Neil Roberts <[email protected]>
* glsl: Use the utility function to copy symbols between symbol tablesEduardo Lima Mitev2017-10-302-31/+10
| | | | | | | | | | This effectively factorizes a couple of similar routines. v2 (Neil Roberts): Non-trivial rebase on master Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Eduardo Lima Mitev <[email protected]> Signed-off-by: Neil Roberts <[email protected]>
* glsl_parser_extra: Add utility to copy symbols between symbol tablesEduardo Lima Mitev2017-10-302-0/+48
| | | | | | | | | | | | | | | | | | | | | | | Some symbols gathered in the symbols table during parsing are needed later for the compile and link stages, so they are moved along the process. Currently, only functions and non-temporary variables are copied between symbol tables. However, the built-in gl_PerVertex interface blocks are also needed during the linking stage (the last step), to match re-declared blocks of inter-stage shaders. This patch adds a new utility function that will factorize current code that copies functions and variables between two symbol tables, and in addition will copy explicitly declared gl_PerVertex blocks too. The function will be used in a subsequent patch. v2 (Neil Roberts): Allow the src symbol table to be NULL and explicitly copy the gl_PerVertex symbols in case they are not referenced in the exec_list. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Eduardo Lima Mitev <[email protected]> Signed-off-by: Neil Roberts <[email protected]>
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