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* broadcom/vc5: Introduce v3dx_macros.h and v3dx_pack.h headers.Eric Anholt2018-01-123-1/+88
| | | | | This will be used by vc5 for prefixing functions and including the pack header in v3d-version-dependent code, following the model of anv.
* broadcom/cle: Fix error path of missing a "type" in the XML.Eric Anholt2018-01-121-1/+2
| | | | | | We try to emit a #error and continue so that you can debug the missing type at C compile time, but were missing a couple of definitions in that path (sigh, python).
* broadcom/vc5: Add XML for V3D v4.1 (BCM7278)Eric Anholt2018-01-123-1/+1054
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* ac: add 'const' qualifiers to the shader info passSamuel Pitoiset2018-01-122-8/+11
| | | | | | | For clarification purposes. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: remove unused ac_nir_compiler_options from gather_info_input_decl()Samuel Pitoiset2018-01-121-4/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: add a 'const' qualifier to nir_ssa_def_components_read()Samuel Pitoiset2018-01-122-2/+2
| | | | | | | | To avoid compilation warnings and because this helper shouldn't update anything. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* loader/dri3: Avoid freeing renderbuffers in useThomas Hellstrom2018-01-121-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Upon reception of an event that lowered the number of active back buffers, the code would immediately try to free all back buffers with an id equal to or higher than the new number of active back buffers. However, that could lead to an active or to-be-active back buffer being freed, since the old number of back buffers was used when obtaining an idle back buffer for use. This lead to crashes when lowering the number of active back buffers by transitioning from page-flipping to non-page-flipping presents. Fix this by computing the number of active back buffers only when trying to obtain a new back buffer. Fixes: 15e208c4cc ("loader/dri3: Don't accidently free buffer holding new back content") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104214 Cc: "17.3" <[email protected]> Tested-by: Andriy.Khulap <[email protected]> Tested-by: Vadym Shovkoplias <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]>
* anv: VkDescriptorSetLayoutBinding can have descriptorCount == 0Samuel Iglesias Gonsálvez2018-01-121-1/+3
| | | | | | | | | | | | | | | | | From Vulkan spec: "descriptorCount is the number of descriptors contained in the binding, accessed in a shader as an array. If descriptorCount is zero this binding entry is reserved and the resource must not be accessed from any stage via this binding within any pipeline using the set layout." Fixes: dEQP-VK.binding_model.descriptor_update.empty_descriptor.uniform_buffer Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected]
* mesa: require at least 14 UBOs for GL 4.3Roland Scheidegger2018-01-121-0/+1
| | | | | | | | | | | | ARB_ubo requires 12 UBOs (per stage) at least, but this limit has been raised by GL 4.3 to 14, so don't advertize GL 4.3 without it (only checking the vertex stage since all drivers probably have the same limit anyway for other stages). (piglit has minmax tests for that kind of thing, but they go only up to 3.3, so this won't really be noticed.) I think this currently should not affect any driver - r600 until very recently only supported 12 but now advertizes 14 too. Reviewed-by: Brian Paul <[email protected]>
* util: fix NORETURN for msvc, add HAVE_FUNC_ATTRIBUTE_NORETURN to c99_compat.hRoland Scheidegger2018-01-121-4/+8
| | | | | | | | | | We've seen some problems internally due to macro redefinition. Fix this by adding HAVE_FUNC_ATTRIBUTE_NORETURN to c99_compat.h, and defining it for msvc. And avoid redefinition just in case. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* radv: don't emit unneeded vertex state.Dave Airlie2018-01-122-8/+49
| | | | | | | | | | | | | | | | | | If the number of instances hasn't changed and we've already emitted it, don't emit it again. If the vertex shader is the same and the first_instance, vertex_offset haven't changed don't emit them again. This increases the fps in GL_vs_VK -t 1 -m -api vk from around 40 to around 60 here, it may not impact anything else. Dieter also reported smoketest going from 1060->1200 fps. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Dieter Nützel <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: trim buffer load result (fixes dota2)Dave Airlie2018-01-121-1/+1
| | | | | | | | | | | Running dota2 since the below commit crashes with an llvm assert. Trim the vector like the other user. This possible could also be avoided by not padding inside the load vec3->vec4. Fixes: 41c36c4549 (amd/common: use ac_build_buffer_load() for emitting UBO loads) Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* meson: add variable for including include/GL/internalDylan Baker2018-01-112-10/+4
| | | | | Signed-off-by: <[email protected]> Acked-by: Eric Engestrom <[email protected]>
* meson: define inc_gbm as empty if not otherwise assignedDylan Baker2018-01-111-0/+2
| | | | | | | Otherwise this could be undefined in the egl directory. Signed-off-by: Dylan Baker <[email protected]> Acked-by: Eric Engestrom <[email protected]>
* meson: move libsensors dependency to libgalliumDylan Baker2018-01-118-13/+7
| | | | | | | | | This simplifies the build by removing the need to link targets against libsensors. Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Dylan Baker <[email protected]> Acked-by: Eric Engestrom <[email protected]>
* meson: Use dependencies for nirDylan Baker2018-01-1118-50/+72
| | | | | | | | | | | | | | | | | This creates two new internal dependencies, idep_nir_headers and idep_nir. The former encapsulates the generation of nir_opcodes.h and nir_builder_opcodes.h and adding src/compiler/nir as an include path. This ensures that any target that needs nir headers will have the includes and that the generated headers will be generated before the target is build. The second, idep_nir, includes the first and additionally links to libnir. This is intended to make it easier to avoid race conditions in the build when using nir, since the number of consumers for libnir and it's headers are quite high. Acked-by: Eric Engestrom <[email protected]> Signed-off-by: Dylan Baker <[email protected]>
* meson: don't use intermediate variables that are immediately discardedDylan Baker2018-01-115-14/+7
| | | | | | | | | | | | | | | | For things like: loop x = func() list += x end just do: loop list += func() end Acked-by: Eric Engestrom <[email protected]> Signed-off-by: Dylan Baker <[email protected]>
* meson: Use consistent style for testsDylan Baker2018-01-1120-151/+199
| | | | | | | Don't use intermediate variables, use consistent whitespace. Acked-by: Eric Engestrom <[email protected]> Signed-off-by: Dylan Baker <[email protected]>
* meson: Use include variablesDylan Baker2018-01-111-1/+1
| | | | | | | | These were added after adderlib was mesonified, but it still good to use them instead of open coding them. Acked-by: Eric Engestrom <[email protected]> Signed-off-by: Dylan Baker <[email protected]>
* meson: Use consistent styleDylan Baker2018-01-1117-85/+148
| | | | | | | | | | | | | | | | | | | | Currently the meosn build has a mix of two styles: arg : [foo, ... bar], and arg : [ foo, ..., bar, ] For consistency let's pick one. I've picked the later style, which I think is more readable, and is more common in the mesa code base. v2: - fix commit message Acked-by: Eric Engestrom <[email protected]> Signed-off-by: Dylan Baker <[email protected]>
* i965: Use UD types for gl_SampleID setupJason Ekstrand2018-01-111-3/+3
| | | | | | | | We already had to switch all of the W types to UW to prevent issues with vector immediates on gen10. We may as well use unsigned types everywhere. Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Use UW types when using V immediatesJason Ekstrand2018-01-112-5/+5
| | | | | | | | | | | | | | | | | | | | | | Gen 10 has a strange hardware bug involving V immediates with W types. It appears that a mov(8) g2<1>W 0x76543210V will actually result in g2 getting the value {3, 2, 1, 0, 3, 2, 1, 0}. In particular, the bottom four nibbles are repeated instead of the top four being taken. (A mov of 0x00003210V yields the same result.) This bug does not appear in any hardware documentation as far as we can tell and the simulator does not implement the bug either. Commit 6132992cdb858268af0e985727d80e4140be389c was mostly a no-op except that it changed the type of the subgroup invocation from UW to W and caused us to tickle this bug with basically every compute shader that uses any sort of invocation ID (which is most of them). This is also potentially an issue for geometry shader input pulls and SampleID setup. The easy solution is just to change the few places where we use a vector integer immediate with a W type to use a UW type. Reviewed-by: Matt Turner <[email protected]> Cc: [email protected] Fixes: 6132992cdb858268af0e985727d80e4140be389c
* ac/nir: fix translation of nir_op_fsign for doublesTimothy Arceri2018-01-121-7/+19
| | | | | | | | Without this we end up with the llvm error message: "Both operands to a binary operator are not of the same type!" Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: add f64_0 to the llvm build contextTimothy Arceri2018-01-122-0/+2
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: fix translation of nir_op_frcp for doublesTimothy Arceri2018-01-121-1/+2
| | | | | | | | Without this we end up with the llvm error message: "Both operands to a binary operator are not of the same type!" Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: fix translation of nir_op_frsq for doublesTimothy Arceri2018-01-121-1/+2
| | | | | | | | Without this we end up with the llvm error message: "Both operands to a binary operator are not of the same type!" Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: add f64_1 to the llvm build contextTimothy Arceri2018-01-122-0/+2
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: reset semaphores & fences on sync_file export.Bas Nieuwenhuizen2018-01-111-0/+16
| | | | | | | | | | | | | | | | | | Per spec: "Additionally, exporting a fence payload to a handle with copy transference has the same side effects on the source fence’s payload as executing a fence reset operation. If the fence was using a temporarily imported payload, the fence’s prior permanent payload will be restored." And similar for semaphores: "Additionally, exporting a semaphore payload to a handle with copy transference has the same side effects on the source semaphore’s payload as executing a semaphore wait operation. If the semaphore was using a temporarily imported payload, the semaphore’s prior permanent payload will be restored." Fixes: 42bc25a79c "radv: Advertise sync fd import and export." Reviewed-by: Dave Airlie <[email protected]>
* Revert "Revert "i965/fs: Use align1 mode on ternary instructions on Gen10+""Matt Turner2018-01-111-4/+8
| | | | | | This reverts commit 2d0457203871c843ebfc90fb895b65a9b14cd9bb. Acked-by: Scott D Phillips <[email protected]>
* i965/fs: Add/use functions to convert to 3src_align1 vstride/hstrideMatt Turner2018-01-111-28/+41
| | | | | | | | | | Some cases weren't handled, such as stride 4 which is needed for 64-bit operations. Presumably fixes the assertion failure mentioned in commit 2d0457203871 (Revert "i965/fs: Use align1 mode on ternary instructions on Gen10+") but who can really say since the commit neglected to list any of them! Reviewed-by: Scott D Phillips <[email protected]>
* anv: Make sure state on primary is correct after CmdExecuteCommandsAlex Smith2018-01-111-0/+9
| | | | | | | | | | | | | | | | | After executing a secondary command buffer, we need to update certain state on the primary command buffer to reflect changes by the secondary. Otherwise subsequent commands may not have the correct state set. This fixes various issues (rendering errors, GPU hangs) seen after executing secondary command buffers in some cases. v2 (Jason Ekstrand): - Reset to invalid values instead of pulling from the secondary - Change the comment to be more descriptive Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: [email protected]
* svga: simplify failure code in emit_rss_vgpu9()Brian Paul2018-01-111-17/+12
| | | | | | | No need for a goto. Reviewed-by: Neha Bhende <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* svga: remove unused fail parameter to EMIT_RS(), EMIT_RS_FLOAT()Brian Paul2018-01-111-57/+57
| | | | | Reviewed-by: Neha Bhende <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* svga: add assertion in svga_queue_rs()Brian Paul2018-01-111-0/+1
| | | | | Reviewed-by: Neha Bhende <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* svga: whitespace/formatting fixes in svga_state_rss.cBrian Paul2018-01-111-79/+75
| | | | | Reviewed-by: Neha Bhende <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* anv: Import mako templates only during execution of anv_extensionsAndres Gomez2018-01-111-5/+5
| | | | | | | | | | | | | | | | | | anv_extensions usage from anv_icd was bringing the unwanted dependency of mako templates for the latter. We don't want that since it will force the dependency even for distributable tarballs which was not needed until now. Jason suggested this approach. v2: Patch simplification (Jason). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104551 Fixes: 0ab04ba979b ("anv: Use python to generate ICD json files") Cc: Jason Ekstrand <[email protected]> Cc: Emil Velikov <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: cleanup shader_cache header guardTapani Pälli2018-01-111-3/+3
| | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* anv: fix maxDescriptorSet* limitsSamuel Iglesias Gonsálvez2018-01-111-5/+5
| | | | | | | | | | | | | | | "The maxDescriptorSet* limit is n times the corresponding maxPerStageDescriptor* limit, where n is the number of shader stages supported by the VkPhysicalDevice. If all shader stages are supported, n = 6 (vertex, tessellation control, tessellation evaluation, geometry, fragment, compute)." Fixes: dEQP-VK.api.info.device.properties Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* ac: add load_patch_vertices_in() to the abiTimothy Arceri2018-01-113-7/+26
| | | | | | | | | | | | | Fixes the follow test for radeonsi nir: tests/spec/arb_tessellation_shader/execution/quads.shader_test Also stops 8 other tests from crashing, they now just fail e.g. tcs-output-array-float-index-rd-after-barrier.shader_test Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: Sanitize location_frac for local variables.Bas Nieuwenhuizen2018-01-111-0/+1
| | | | | | | | If they were promoted from inputs/outputs, they could have a non-zero value left over, which messed with our store handling. Fixes: 06f05040eb "radv: Link shaders." Reviewed-by: Timothy Arceri <[email protected]>
* tgsi: include struct definitions for tgsi_build declarationsRob Herring2018-01-101-5/+1
| | | | | | | | | | | | | | Many of the functions declared in tgsi_build.h return structs (not struct pointers). Therefore the full struct definitions are needed to avoid warnings or errors: In file included from src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp:23: external/mesa3d/src/gallium/auxiliary/tgsi/tgsi_build.h:47:1: error: 'tgsi_build_header' has C-linkage specified, but returns incomplete type 'struct tgsi_header' which could be incompatible with C [-Werror,-Wreturn-type-c-linkage] This error shows up on Android builds using clang and -Werror. Cc: Ilia Mirkin <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* swr: Handle indirect indices in GSGeorge Kyriazis2018-01-101-8/+39
| | | | | | | | | | | | | | | BuilderSWR::swr_gs_llvm_fetch_input() (and consequently swr_gs_llvm_fetch_input()), did not handle the case where is_vindex_indirect or is_aindex_direct is set. Implement it, using the code in draw_llvm.c as a guideline. Fixes the following piglit tests: dynamic_input_array_index (crash) gs-input-array-vec4-index-rd vs-output-array-vec4-index-wr-before-gs Reviewed-by: Bruce Cherniak <[email protected]>
* amd/common: use ac_build_buffer_load() for emitting UBO loadsSamuel Pitoiset2018-01-101-14/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: import get_{load,store}_intr_attribs() from RadeonSISamuel Pitoiset2018-01-103-31/+25
| | | | | | | v2: move those helpers to the header and use static inline Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (v1)
* dri_util: remove ALLOW_RGB10_CONFIGS option (v2)Marek Olšák2018-01-102-5/+2
| | | | | | | | This is unused because it's for libGL/libEGL, not drivers. v2: i965 was wrong, because it used dri_util instead of its own config. Reviewed-by: Tapani Pälli <[email protected]>
* swr/rast: switch win32 jit format to COFFTim Rowley2018-01-101-2/+2
| | | | | | Allows for call-stack and exception handling for jitted functions. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: don't use 32-bit gathers for elements < 32-bits in sizeTim Rowley2018-01-101-1/+60
| | | | | | | | Using a gather for elements less than 32-bits in size can cause pagefaults when loading the last elements in a page-aligned-sized buffer. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: autogenerate named structs instead of literal structsTim Rowley2018-01-101-8/+15
| | | | | | Results in far smaller and useful IR output. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: SIMD16 fetch shader jitter cleanupTim Rowley2018-01-101-720/+368
| | | | | | | | Bake in USE_SIMD16_BUILDER code paths (for USE_SIMD16_SHADER defined), remove USE_SIMD16_BUILDER define, remove deprecated psuedo-SIMD16 code paths. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: shuffle header files for msvc pre-compiled header usageTim Rowley2018-01-1010-88/+143
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
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