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* gallium: add PIPE_CAP_SHAREABLE_SHADERSMarek Olšák2015-10-2015-0/+16
* radeonsi: add support for ARB_texture_viewMarek Olšák2015-10-202-7/+22
* vc4: Use nir_foreach_variableBoyan Ding2015-10-203-7/+7
* glsl: fix stream qualifier for blocks with an instance nameTimothy Arceri2015-10-203-22/+16
* glsl: fix regression when building interface field name for SSBOsTimothy Arceri2015-10-201-0/+2
* st/omx/dec/h264: fix field picture type 0 poc disorderLeo Liu2015-10-191-4/+8
* i965/gen9: Handle the GL_TEXTURE_{1D, 1D_ARRAY} targets inside switchAnuj Phogat2015-10-191-4/+4
* i965/fs: Localize variables' scopes.Matt Turner2015-10-191-8/+5
* i965/fs: Consider type mismatches in saturate propagation.Matt Turner2015-10-191-3/+12
* i965: Extract can_change_source_types() functions.Matt Turner2015-10-196-27/+30
* i965/vs: Move URB entry_size and read_length calculations to compile_vsJason Ekstrand2015-10-192-34/+34
* i965: Move the entire compiler API into a single fileJason Ekstrand2015-10-1910-619/+665
* i965: Rename brw_foo_emit to brw_compile_fooJason Ekstrand2015-10-1911-66/+67
* i965/fs: Move some of the prog_data setup into brw_wm_emitJason Ekstrand2015-10-192-98/+100
* i965/cs: Rework cs_emit to take a nir_shader and a brw_compilerJason Ekstrand2015-10-193-29/+42
* i965/gs: Rework gs_emit to take a nir_shader and a brw_compilerJason Ekstrand2015-10-193-40/+29
* i965/vs: Rework vs_emit to take a nir_shader and a brw_compilerJason Ekstrand2015-10-193-49/+49
* i965/fs: Rework wm_fs_emit to take a nir_shader and a brw_compilerJason Ekstrand2015-10-193-39/+47
* i965: Use a const nir_shader in backend_shaderJason Ekstrand2015-10-1911-12/+12
* i965/vec4: Remove gl_program and gl_shader_program from the generatorJason Ekstrand2015-10-194-29/+20
* i965/fs: Remove the gl_program from the generatorJason Ekstrand2015-10-195-9/+5
* nir/info: Add a few bits of info for fragment shadersJason Ekstrand2015-10-193-0/+29
* nir/info: Add compute shader local size to nir_shader_infoJason Ekstrand2015-10-192-0/+12
* nir/info: Move the GS info into a stage-specific info unionJason Ekstrand2015-10-192-8/+18
* mesa: Move gl_frag_depth_layout from mtypes.h to shader_enums.hJason Ekstrand2015-10-192-18/+17
* nir: Add a label to nir_shader_infoJason Ekstrand2015-10-193-0/+7
* i965/asm: Explicitly use a nir_instr for IR annotationsJason Ekstrand2015-10-194-19/+5
* scons: Build nir/glsl_types.cpp once.Jose Fonseca2015-10-198-29/+8
* svga: fix incorrect round-down arithmeticBrian Paul2015-10-191-1/+1
* glsl: fix segfault when indirect indexing a buffer variable which is an arraySamuel Iglesias Gonsalvez2015-10-191-1/+2
* st/va: Added support for NV12 to IYUV conversion in vlVaGetImageIndrajit Das2015-10-191-3/+5
* st/va: Used correct parameter to derive the value of the "h" variable in vlVa...Indrajit Das2015-10-191-1/+1
* glsl_to_tgsi: Use {Num}UniformBlocks instead of {Num}BufferInterfaceBlocksIago Toral Quiroga2015-10-191-2/+2
* st/mesa: Use {Num}UniformBlocks instead of {Num}BufferInterfaceBlocksIago Toral Quiroga2015-10-191-2/+2
* i965: Do not use NumBufferInterfaceBlocksIago Toral Quiroga2015-10-191-1/+1
* main: GL_ACTIVE_UNIFORM_BLOCK_MAX_NAME_LENGTH is about UBOS, not SSBOsIago Toral Quiroga2015-10-191-2/+2
* main: Use NumUniformBlocks to count UBOsIago Toral Quiroga2015-10-191-5/+1
* ilo: set VME for 3DSTATE_PSChia-I Wu2015-10-181-1/+6
* ilo: ignore prefer_linear_threshold when zeroChia-I Wu2015-10-182-3/+3
* ilo: remove some unused kernel paramsChia-I Wu2015-10-182-22/+0
* ilo: remove unused ilo_shader_get_type()Chia-I Wu2015-10-182-12/+0
* ilo: remove u_debug.h inclusion from ilo_core.hChia-I Wu2015-10-182-1/+2
* ilo: remove u_memory.h inclusion from ilo_core.hChia-I Wu2015-10-183-1/+3
* nvc0: do not bind input params at compute state init on FermiSamuel Pitoiset2015-10-181-8/+0
* i965/vs: Drop hack that created NIR for fixed function vertex programs.Kenneth Graunke2015-10-171-12/+0
* i965/nir: Switch on shader stage in nir_lower_outputs().Kenneth Graunke2015-10-171-5/+21
* radeonsi: don't use the AMDGPU intrinsic for CMPMarek Olšák2015-10-171-9/+22
* radeonsi: use LRP from gallivmMarek Olšák2015-10-171-2/+0
* radeonsi: don't emit AMDGPU intrinsics for integer abs, min, maxMarek Olšák2015-10-171-10/+50
* radeonsi: don't emit AMDGPU intrinsics for EX2, ROUND, TRUNCMarek Olšák2015-10-171-3/+3
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