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* swr: [rasterizer core] backend refactorTim Rowley2016-04-275-238/+633
| | | | | | | Lump all template args into a bundle of traits, and add some functionality to the MSAA traits. Reviewed-by: Bruce Cherniak <[email protected]>
* svga: use the SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS queryBrian Paul2016-04-271-0/+3
| | | | | | | | | | | Instead of a hard-coded 512. The query typically returns 65536 now. Fall back to 512 if the query fails as we do for vertex shaders (which should never happen). Note that we don't actually enforce this limit in our shaders but it gets reported via the glGetProgramivARB(GL_MAX_PROGRAM_INSTRUCTIONS_ARB) query. Reviewed-by: Charmaine Lee <[email protected]>
* nouveau: codegen: LOAD: Take src swizzle into accountHans de Goede2016-04-272-2/+9
| | | | | | | | | | | | | | | | | | | | | | The llvm TGSI backend uses pointers in registers and does things like: LOAD TEMP[0].y, MEMORY[0], TEMP[0] Expecting the data at address TEMP[0].x to get loaded to TEMP[0].y. But this will cause the data at TEMP[0].x + 4 to be loaded instead. This commit adds support for a swizzle suffix for the 1st source operand, which allows using: LOAD TEMP[0].y, MEMORY[0].xxxx, TEMP[0] And actually getting the desired behavior Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nouveau: codegen: LOAD: Do not call fetchSrc(1) if the address is immediateHans de Goede2016-04-271-2/+3
| | | | | | | | | | "off" later gets set to NULL when the address is immediate, so move the fetchSrc(1) call to the non-immediate branch of the if-else. This brings handleLOAD's offset handling inline with how it is done in handleSTORE. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nouveau: codegen: LOAD: Always use component 0 when getting the addressHans de Goede2016-04-271-1/+3
| | | | | | | | | | LOAD loads upto 4 components from the specified resource starting at the passed in x value of the 2nd source operand, the y, z and w components of the address should not be used. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* dri3: Check for dummyContext to see if the glx_context is validStefan Dirsch2016-04-271-6/+2
| | | | | | | | | | | | According to the comments in src/glx/glxcurrent.c __glXGetCurrentContext() always returns a valid pointer. If no context is made current, it will contain dummyContext. Thus a test for NULL will always fail. https://lists.freedesktop.org/archives/mesa-dev/2016-April/113962.html Signed-off-by: Stefan Dirsch <[email protected]> Reviewed-by: Egbert Eich <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* dri2: Check for dummyContext to see if the glx_context is validEgbert Eich2016-04-271-1/+1
| | | | | | | | | | | | According to the comments in src/glx/glxcurrent.c __glXGetCurrentContext() always returns a valid pointer. If no context is made current, it will contain dummyContext. Thus a test for NULL will always fail. https://bugzilla.opensuse.org/show_bug.cgi?id=962609 Tested-by: Olaf Hering <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* glsl: move uniform block validation to link_uniform_blocks.cppTimothy Arceri2016-04-272-53/+53
| | | | Reviewed-by: Eduardo Lima Mitev <[email protected]>
* i965: Enable ARB_texture_stencil8 and OES_texture_stencil8 on Gen8+.Kenneth Graunke2016-04-263-7/+2
| | | | | | | | | | | | | | | | | | | | | Stencil texturing is required by ES 3.1. Apparently we never actually turned it on. Do that now. Also turn on the desktop extension. Fixes nine dEQP-GLES31.functional tests: stencil_texturing.format.stencil_index8_2d texture.border_clamp.formats.stencil_index8.nearest_size_pot texture.border_clamp.formats.stencil_index8.nearest_size_npot texture.border_clamp.formats.stencil_index8.gather_size_pot texture.border_clamp.formats.stencil_index8.gather_size_npot texture.border_clamp.unused_channels.stencil_index8 state_query.internal_format.renderbuffer.stencil_index8_samples state_query.internal_format.texture_2d_multisample.stencil_index8_samples state_query.internal_format.texture_2d_multisample_array.stencil_index8_samples Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* mesa: Try to fix CopyTex[Sub]Image of stencil textures.Kenneth Graunke2016-04-261-2/+3
| | | | | | | | | | | | | ES prohibits this, but GL appears to allow it. We at least need this much, or else we'll crash as there's no source to read from. This fixed crashes in the ES tests before I realized I needed to prohibit stencil instead. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* mesa: Disallow CopyTexSubImage on stencil formats in ES.Kenneth Graunke2016-04-261-0/+9
| | | | | | | | | | | Fixes - ES31-CTS.gtf.GL31Tests.texture_stencil8.texture_stencil8 - ES31-CTS.gtf.GL31Tests.texture_stencil8.texture_stencil8_multisample Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Fix MapTextureImage for multi-slice/level stencil buffers.Kenneth Graunke2016-04-261-2/+2
| | | | | | | | | | | We called intel_miptree_get_image_offset() to get the image offsets for the current level/slice, but then proceeded to ignore the results and clobber level/slice 0 every time. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94713 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Move TCS output indirect_offset.file check out a level.Kenneth Graunke2016-04-261-42/+46
| | | | | | | | I want to add another condition. Moving the indirect_offset.file check out a level should make this a little easier. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Reduce the response length of sampler messages on Skylake.Kenneth Graunke2016-04-264-5/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Often, we don't need a full 4 channels worth of data from the sampler. For example, depth comparisons and red textures only return one value. To handle this, the sampler message header contains a mask which can be used to disable channels, and reduce the message length (in SIMD16 mode on all hardware, and SIMD8 mode on Broadwell and later). We've never used it before, since it required setting up a message header. This meant trading a smaller response length for a larger message length and additional MOVs to set it up. However, Skylake introduces a terrific new feature: for headerless messages, you can simply reduce the response length, and it makes the implicit header contain an appropriate mask. So to read only RG, you would simply set the message length to 2 or 4 (SIMD8/16). This means we can finally take advantage of this at no cost. total instructions in shared programs: 9091831 -> 9073067 (-0.21%) instructions in affected programs: 191370 -> 172606 (-9.81%) helped: 2609 HURT: 0 total cycles in shared programs: 70868114 -> 68454752 (-3.41%) cycles in affected programs: 35841154 -> 33427792 (-6.73%) helped: 16357 HURT: 8188 total spills in shared programs: 3492 -> 1707 (-51.12%) spills in affected programs: 2749 -> 964 (-64.93%) helped: 74 HURT: 0 total fills in shared programs: 4266 -> 2647 (-37.95%) fills in affected programs: 3029 -> 1410 (-53.45%) helped: 74 HURT: 0 LOST: 1 GAINED: 143 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add a helper for figuring out what channels of an SSA def are readJason Ekstrand2016-04-262-0/+27
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Use inst->regs_written for rlen for texture instructionsJason Ekstrand2016-04-262-9/+3
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Properly report regs_written from SAMPLEINFOJason Ekstrand2016-04-262-2/+9
| | | | | | | | | The previous behavior would only allocate one register and then write four thus potentially stomping three innocent bystanders. Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Set regs_written on texturing instructionsJason Ekstrand2016-04-261-0/+1
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Don't force a header for texture offsets of 0.Kenneth Graunke2016-04-261-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Calling textureOffset() with an offset of <0, 0, 0> is equivalent to calliing texture(). We don't actually need to set up an offset, which causes a message header to be created. A fairly common pattern is to sample at a point with a bunch of offsets, and average them. It's natural to write all the lookups as textureOffset, but use <0, 0> for the center sample. shader-db results on Skylake: total instructions in shared programs: 9092095 -> 9092087 (-0.00%) instructions in affected programs: 2826 -> 2818 (-0.28%) helped: 12 HURT: 2 total cycles in shared programs: 70870166 -> 70870144 (-0.00%) cycles in affected programs: 15924 -> 15902 (-0.14%) helped: 2 HURT: 0 This also helps prevent code quality regressions in a future patch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by Jason Ekstrand <[email protected]>
* r600g: fix and optimize tgsi_cmp when using ABS and NEG modifierPatrick Rudolph2016-04-271-1/+10
| | | | | | | | | | | | | | Some apps set NEG and ABS on the source param to test for zero. Use ALU_OP3_CNDE insted of ALU_OP3_CNDGE and unset both modifiers. It also removes the need for a MOV instruction, as ABS isn't supported on op3. Tested on AMD CAYMAN and AMD RV770. Signed-off-by: Patrick Rudolph <[email protected]> Cc: [email protected] Signed-off-by: Dave Airlie <[email protected]>
* softpipe: add support for compute shaders. (v2)Dave Airlie2016-04-278-3/+369
| | | | | | | | | | | | | | | | | This enables ARB_compute_shader on softpipe. I've only tested this with piglit so far, and I hopefully plan on integrating it with my vulkan work. I'll get to testing it with deqp more later. The basic premise is to create up to 1024 restartable TGSI machines, and execute workgroups of those machines. v1.1: free machines. v2: deqp fixes - add samplers support, finish atomic operations, fix load/store writemasks. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: initialise SysSemanticToIndex array to -1Dave Airlie2016-04-271-0/+3
| | | | | | | | We want to use the SysSemanticToIndex to tell if we've seen the semantics at all. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: implement restartable machine.Dave Airlie2016-04-272-17/+35
| | | | | | | | | | | | | | This lets us restart the machine at a PC value, and exits the machine when we hit a barrier. Compute shaders will then execute all the threads up to the barrier, then restart the machines after the barrier once all are done. v2: comment the code a bit, change return types. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: make inputs/outputs optional for compute shaders.Dave Airlie2016-04-271-19/+24
| | | | | | | | compute shaders don't need input/outputs so don't bother allocating memory for these. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: implement load/store/atomic on MEMORY.Dave Airlie2016-04-272-3/+150
| | | | | | | | This implements basic load/store/atomic ops on MEMORY types for compute shaders. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: split out setting up masks to separate functionDave Airlie2016-04-271-9/+14
| | | | | | | | This is just a cleanup that will make later changes easier to make. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi: accept a starting PC value for exec machine.Dave Airlie2016-04-275-5/+5
| | | | | | | | This will be used later to restart barriered execution threads in compute, for now we just want to change the API. Acked-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi: move to using vector for system values.Dave Airlie2016-04-274-7/+7
| | | | | | | | | | For compute support some of the system values are .xyz types, so move to using a vector instead of a single channel. [airlied: squash swizzle fix from compute series]. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/exec: fix system value handling.Dave Airlie2016-04-271-3/+5
| | | | | | | | | | | a) SysSemanticToIndex needs to be indexed with the semantic name not the decl->Declaration.Semantic. b) doing this in run is too late, as the mappings are all setup prior to run in the execs. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965/blorp: Convert state setup to CJason Ekstrand2016-04-264-4/+3
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Make state setup C-safeJason Ekstrand2016-04-263-4/+4
| | | | | | | | Previously they (very rarely) used C++isms that prevented them from being compiled as C. As of this commit, they can be compiled as either C or C++. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Convert brw_blorp.cpp to a C fileJason Ekstrand2016-04-262-5/+2
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Make all of brw_blorp.h accessible to CJason Ekstrand2016-04-261-9/+8
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Turn brw_blorp_params into a C-style structJason Ekstrand2016-04-267-80/+71
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Turn coord_transform into a C-style structJason Ekstrand2016-04-262-17/+16
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Turn blorp_surface_info into a C-style structJason Ekstrand2016-04-267-69/+69
| | | | | | | | | | This commit is mostly mechanical except that it changes where we set the swizzle. Previously, the blorp_surface_info constructor defaulted the swizzle to SWIZZLE_XYZW. Now, we memset to zero and fill out the swizzle when we setup the rest of the struct. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Roll mip_info into surface_infoJason Ekstrand2016-04-262-37/+17
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Get rid of the blorp_blit_params classJason Ekstrand2016-04-262-167/+131
| | | | | | | It was really just a wrapper around the function that constructed it. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Remove the hiz params classJason Ekstrand2016-04-262-37/+42
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Remove the clear params classesJason Ekstrand2016-04-261-132/+83
| | | | | | | | | They didn't really add anything other than a key and extra layers of function calls. This commit just inlines the extra functions and gets rid of the extra classes. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Remove the arguments to brw_blorp_params()Jason Ekstrand2016-04-262-9/+5
| | | | | | | No one was using anything other than the defaults. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/blorp: Refactor to get rid of the get_wm_prog virtual functionJason Ekstrand2016-04-267-97/+58
| | | | | | | | | | | | Instead of having a virtual member function for getting the WM/PS kernel, we simply add fields for prog_data and the kernel to brw_blorp_parms and always make sure those get set as part of the different constructors. v2: Use use prog_data != NULL to check for a valid program instead of a magic kernel offset value Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* swr: autogenerate swr_context_llvm.hTim Rowley2016-04-266-128/+16
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* anv: honor DESTDIR when installing icd fileLaurent Carlier2016-04-261-1/+1
| | | | | | https://bugs.freedesktop.org/show_bug.cgi?id=94969 Reviewed-by: Chad Versace <[email protected]>
* i965/meta: initialize values to avoid random behaviour on error pathJuha-Pekka Heikkila2016-04-261-1/+1
| | | | | | | | | if brw_meta_stencil_blit() errored at wrong place 'target' would be uninitialized and cause random behaviour on leaving the funtion. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Eduardo Lima Mitev <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* meta: Avoid random memory access on errorJuha-Pekka Heikkila2016-04-261-1/+1
| | | | | | | | | | Initialize drawFb to NULL in _mesa_meta_CopyImageSubData_uncompressed() if getting readFb fails uninitialized drawFb will cause randomness on cleanup. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Eduardo Lima Mitev <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* mesa: Remove every double semi-colonJakob Sinclair2016-04-262-2/+2
| | | | | | Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* glx: Remove every double semi-colonJakob Sinclair2016-04-261-1/+1
| | | | | | Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* gallium: Remove every double semi-colonJakob Sinclair2016-04-2610-15/+15
| | | | | | Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* egl: Remove every double semi-colonJakob Sinclair2016-04-262-2/+2
| | | | | | | | Removes all accidental semi-colons in egl. Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
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