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* radeonsi: set DB_EQAA the same as VulkanMarek Olšák2018-05-101-8/+8
| | | | | | These never change, but they only affect EQAA, which isn't implemented. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove CM_ prefixesMarek Olšák2018-05-101-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't update clear color registers if they don't changeMarek Olšák2018-05-101-11/+21
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove r600_fmask_infoMarek Olšák2018-05-106-87/+46
| | | | | | radeon_surf contains almost everything. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: unify common legacy and gfx9 fmask fieldsMarek Olšák2018-05-105-34/+30
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface/gfx6: compute FMASK together with the color surfaceMarek Olšák2018-05-105-100/+149
| | | | | | instead of invoking FMASK computation separately. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface/gfx9: fix a typo in CMASK RB/pipe alignmentMarek Olšák2018-05-101-1/+1
| | | | | | No change in behavior because it's always aligned. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: set correct LLVM processor names for Raven & Vega12Marek Olšák2018-05-101-2/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: sort raster configsMarek Olšák2018-05-101-39/+27
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: remove 1 RB raster config for IcelandMarek Olšák2018-05-101-5/+1
| | | | | | Iceland always reports 2 RBs. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: move the Fiji kernel workaround for raster config out of the switchMarek Olšák2018-05-101-8/+11
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: enable both RBs on KaveriMarek Olšák2018-05-101-2/+13
| | | | | | | | | This can result in 2x increase in performance on non-harvested Kaveris. v2: don't do it on radeon Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: work around a GPU hang due to broken indirect indexing in LLVMMarek Olšák2018-05-101-0/+9
| | | | | | Fixes: 6d19120da85 "radeonsi/gfx9: workaround for INTERP with indirect indexing" Cc: 18.1 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* intel/isl/storage: Don't lower most UNORM formats on gen11+Jason Ekstrand2018-05-101-6/+10
| | | | | Reviewed-by: Anuj Phogat <[email protected]> Tested-by: Anuj Phogat <[email protected]>
* intel/isl: Several UNORM formats support typed writes on gen11+Jason Ekstrand2018-05-101-13/+13
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Tested-by: Anuj Phogat <[email protected]>
* mesa: revert GL_[SECONDARY_]COLOR_ARRAY_SIZE glGet type to TYPE_INTBrian Paul2018-05-101-2/+2
| | | | | | | | | | | Since size can be 3, 4 or GL_BGRA we need to keep these glGet types as TYPE_INT, not TYPE_UBYTE. Fixes: d07466fe18522 ("mesa: fix glGetInteger/Float/etc queries for vertex arrays attribs") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106462 cc: [email protected] Reviewed-by: Mathias Fröhlich <[email protected]>
* radv: disable DCC for shareable images on GFX9+Andres Rodriguez2018-05-101-0/+7
| | | | | | | This seems to be broken at the moment for opengl interop. Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* mesa: fix glGetInteger/Float/etc queries for vertex arrays attribsBrian Paul2018-05-102-13/+84
| | | | | | | | | | | | | | | | | The vertex array Size and Stride attributes are now ubyte and short, respectively. The glGet code needed to be updated to handle those types, but wasn't. Fixes the new piglit test gl-1.5-get-array-attribs test. v2: fix inadvertant whitespace change, change COLOR_ARRAY_SIZE to UBYTE, misc fixes suggested by Justin Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106450 Fixes: d5f42f96e16 ("mesa: shrink size of gl_array_attributes (v2)") Cc: [email protected] Reviewed-by: Mathias Fröhlich <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* winsys/radeon: Destroy fd_hash table when the last winsys is removed.Jan Vesely2018-05-101-1/+6
| | | | | | | | | Fixes memory leak on module unload. v2: Use util_hash_table helper function CC: <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Jan Vesely <[email protected]>
* gallium/auxiliary: Add helper function to count the number of entries in ↵Jan Vesely2018-05-102-0/+22
| | | | | | | | hash table CC: <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Jan Vesely <[email protected]>
* radv: move handling nosisched option in a better placeSamuel Pitoiset2018-05-101-12/+6
| | | | | | | | It's a per-application optimization, so it makes more sense to do that in radv_handle_per_app_options(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: assorted typo fixesGrazvydas Ignotas2018-05-106-11/+11
| | | | | | Trivial. Reviewed-by: Samuel Pitoiset <[email protected]>
* mesa/vbo/tnl: Move gl_vertex_array related stuff to tnl.Mathias Fröhlich2018-05-1016-203/+199
| | | | | | | | | The only remaining users of gl_vertex_array are tnl based drivers. So move everything related to that into tnl and rename it accordingly. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Remove Array._DrawArrays.Mathias Fröhlich2018-05-107-31/+8
| | | | | | | | Only tnl based drivers still use this array. So remove it from core mesa and use Array._DrawVAO instead. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* i965: Remove the now unused gl_vertex_array.Mathias Fröhlich2018-05-102-11/+0
| | | | | | | Was meant to be temporary in i965. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* i965: Remove the gl_vertex_array indirection.Mathias Fröhlich2018-05-104-40/+31
| | | | | | | | | | For now store binding and attrib in brw_vertex_element. The i965 driver still provides lots of opportunity to make use of the unique binding information in the VAO which is currently not taken from the VAO. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* i965: Implement all_varyings_in_vbos in terms of Array._DrawVAO.Mathias Fröhlich2018-05-101-15/+2
| | | | | Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* st/mesa: Remove the now unused gl_vertex_array.Mathias Fröhlich2018-05-104-44/+2
| | | | | | | Was meant to be temporary in gallium. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* st/mesa: Make feedback draw and rasterpos use _DrawVAO.Mathias Fröhlich2018-05-102-65/+24
| | | | | | | | | | | Instead of playing with Array._DrawArrays, make the feedback draw path use Array._DrawVAO. Also st_RasterPos needs to use the VAO then. v2: Use helper methods to get the offset values for array and binding. Update comments. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* st/mesa: Use Array._DrawVAO in st_atom_array.c.Mathias Fröhlich2018-05-101-325/+108
| | | | | | | | | | Finally make use of the binding information in the VAO when setting up arrays for draw. v2: Emit less relocations also for interleaved userspace arrays. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* st/mesa: Make the input_to_index array available.Mathias Fröhlich2018-05-103-5/+21
| | | | | | | | | | | The input_to_index array is already available internally when preparing vertex programs. Store the map in struct st_vertex_program. Also store the bitmask of mesa vertex processing inputs in struct st_vp_variant. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* st/mesa: Use _DrawVAO for edgeflag enabled check.Mathias Fröhlich2018-05-101-7/+4
| | | | | Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Compute effective buffer bindings in the vao.Mathias Fröhlich2018-05-108-7/+682
| | | | | | | | | | | | | | | | Compute VAO buffer binding information past the position/generic0 mapping. Scan for duplicate buffer bindings and collapse them into derived effective buffer binding index and effective attribute mask variables. Provide a set of helper functions to access the distilled information in the VAO. All of them prefixed with _mesa_draw_... to indicate that they are meant to query draw information. v2: Also group user space arrays containing interleaved arrays. Add _Eff*Offset to be copied on attribute and binding copy. Update comments. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* virgl: Add support for passing GL_ANY_SAMPLES_PASSED_CONSERVATIVEGert Wollny2018-05-101-1/+2
| | | | | | | | This is needed for fixing CTS: dEQP-GLES3.functional.occlusion_query.conservative* Reviewed-by: Dave Airlie <[email protected]> Signed-off-by: Gert Wollny <[email protected]>
* r600: fix constant buffer bounds.Dave Airlie2018-05-102-2/+2
| | | | | | | | | | | | | | | | | | | | If you have an indirect access to a constant buffer on r600/eg use a vertex fetch in the shader. However apps have expected behaviour on those out of bounds accessess (even if illegal). If the constants were being uploaded as part of a larger upload buffer, we'd set the range of allowed access to a lot larger than required so apps would get values back from other parts of the upload buffer instead of the expected out of bounds access. This fixes rendering bugs in Trine and Witcher 1, thanks to iive for nagging me effectively until I figured it out :-) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91808 Cc: <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* i965,anv: Set the CS stall bit on the ISP disable PIPE_CONTROLJason Ekstrand2018-05-092-1/+3
| | | | | | | | | | | | | | | | From the bspec docs for "Indirect State Pointers Disable": "At the completion of the post-sync operation associated with this pipe control packet, the indirect state pointers in the hardware are considered invalid" So the ISP disable is a post-sync type of operation which means that it should be combined with a CS stall. Without this, the simulator throws an error. Fixes: 766d801ca "anv: emit pixel scoreboard stall before ISP disable" Fixes: f536097f6 "i965: require pixel scoreboard stall prior to ISP disable" Reviewed-by: Lionel Landwerlin <[email protected]>
* radv: handle arrays in the fmask descriptor.Dave Airlie2018-05-101-1/+1
| | | | | | This fixes the fmask descriptor generation to handle 2d ms arrays. Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium/tests: Fix assignment of EXTRA_DISTMatt Turner2018-05-091-3/+1
| | | | Fixes: 6754c2e83d79 ("autotools: Include new meson files")
* main: fail texture_storage() call if the size is not okayXiong, James2018-05-101-0/+1
| | | | | Signed-off-by: Xiong, James <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* main: return 0 length when the queried program object's not linkedXiong, James2018-05-101-1/+1
| | | | | Signed-off-by: Xiong, James <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* i965: Shut up unused variable warnings.Kenneth Graunke2018-05-091-6/+7
| | | | These are only used in assertions.
* src/intel/Makefile.vulkan.am: add missing MKDIR_GENRoss Burton2018-05-091-0/+2
| | | | | | | | | | | | | | | Out of tree builds can try to write into a directory that doesn't exist yet: | Traceback (most recent call last): | File "../../../mesa-18.0.2/src/intel/vulkan/anv_icd.py", line 46, in <module> | with open(args.out, 'w') as f: | IOError: [Errno 2] No such file or directory: 'vulkan/intel_icd.x86_64.json' | Makefile:4882: recipe for target 'vulkan/intel_icd.x86_64.json' failed Add missing MKDIR_GEN calls to solve this. Cc: <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: fix error handling in get_framebuffer_parameterivRhys Perry2018-05-091-31/+41
| | | | | | | CC: <[email protected]> Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* anv: emit pixel scoreboard stall before ISP disableLionel Landwerlin2018-05-091-1/+8
| | | | | | | | | We want to make sure that all indirect state data has been loaded into the EUs before disable the pointers. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Fixes: 78c125af3904c ("anv/gen10: Ignore push constant packets during context restore.")
* i965: require pixel scoreboard stall prior to ISP disableLionel Landwerlin2018-05-091-1/+8
| | | | | | | | | | | | | | | | | Invalidating the indirect state pointers might affect a previously scheduled & still running 3DPRIMITIVE (causing page fault). So stall on pixel scoreboard before that. v2: Fix compile issue :( v3: Stall on pixel scoreboard v4: Drop the post sync operation (Lionel) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Fixes: ca19ee33d7d39 ("i965/gen10: Ignore push constant packets during context restore.") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106243
* intel/isl: Allow CCS_E on 1010102 formatsJason Ekstrand2018-05-091-11/+0
| | | | | | | | On CNL and above, CCS_E supports 1010102 formats and R11G11B10F. We had shut them off during early enabling because blorp_copy couldn't handle them. Now it can handle 1010102 formats so we can turn them back on. Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Allow CCS copies of 1010102 formatsJason Ekstrand2018-05-091-0/+6
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Add support for more format bitcastingJason Ekstrand2018-05-092-23/+95
| | | | | | | | | | | | nir_format_bitcast_uint_vec_unmasked can only be used to cast between formats with uniform channel sizes. In particular, it cannot handle 10_10_10_2 formats. By making use of the NIR helper for uint vector casts, we should now be able to bitcast between any two uint formats so long as their channels are in RGBA order (possibly with channels missing). In order to do this we need to rework the key a bit to pass the actual formats instead of just the number of bits in each. Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Use nir_format_bitcast_uint_vec_unmaskedJason Ekstrand2018-05-091-41/+16
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* nir/format_convert: Add code for bitcasting vectorsJason Ekstrand2018-05-091-0/+53
| | | | | | | This is a fairly direct port from blorp. The only real change is that the nir_format_convert version doesn't assume that everything is a vec4. Reviewed-by: Topi Pohjolainen <[email protected]>
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