| Commit message (Collapse) | Author | Age | Files | Lines |
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This should fix a regression with Rocket League grass rendering
on the NIR backend.
Reviewed-by: Marek Olšák <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104717
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Reviewed-by: Marek Olšák <[email protected]>
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Fixes: 68a6a3b51acc "spirv: handle AMD_gcn_shader extended instructions"
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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These helpers insert the basic block in the same order as they
appear in NIR making it easier to follow LLVM IR dumps. The helpers
also insert more useful labels onto the blocks.
TGSI use the line number of the corresponding opcode in the TGSI
dump as the label id, here we use the corresponding block index
from NIR.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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These have been ported over from radeonsi.
Reviewed-by: Marek Olšák <[email protected]>
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Signed-off-by: Daniel Schürmann <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Co-authored-by: Dave Airlie <[email protected]>
Signed-off-by: Daniel Schürmann <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Co-authored-by: Dave Airlie <[email protected]>
Signed-off-by: Daniel Schürmann <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Daniel Schürmann <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Daniel Schürmann <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Jon Turney <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Tested-by: Julien Isorce <[email protected]>
Tested-by: Karol Herbst <[email protected]>
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Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Jon Turney <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Tested-by: Julien Isorce <[email protected]>
Tested-by: Karol Herbst <[email protected]>
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This re-adds the auto option for omx, without it we default to tizonia
and the build fails almost immediately, this is especially obnoxious
those building a driver that doesn't support the OMX state tracker to
begin with.
v2: - Only define OMX_FOO for auto cases if the dependencies are found.
This fixes building tizonia with auto (Julien, Eric)
CC: Gurkirpal Singh <[email protected]>
Fixes: bb5e27fab6087a5c1528a5faf507acce700e883c
("st/omx/bellagio: Rename st and target directories")
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Jon Turney <[email protected]> (v1)
Reviewed-by: Eric Engestrom <[email protected]>
Tested-by: Julien Isorce <[email protected]>
Tested-by: Karol Herbst <[email protected]> (v1)
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It needs to have src/egl in it's includes as well.
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Jon Turney <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Tested-by: Julien Isorce <[email protected]>
Tested-by: Karol Herbst <[email protected]>
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This is needed later since tizonia requires dri
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Jon Turney <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Tested-by: Julien Isorce <[email protected]>
Tested-by: Karol Herbst <[email protected]>
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Bugzilla: https://bugreports.qt.io/browse/QTBUG-66420
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105065
Cc: "18.0" <[email protected]>
Tested-by: Kai Wasserbäch <[email protected]>
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In contrast to non-aa, where stippling is based on either dx or dy
(depending on if it's a x or y major line), stippling is based on
actual distance with smooth lines, so adjust for this.
(It looks like there's some minor artifacts with mesa demos
line-sample and stippling, it looks like the line endpoints
aren't quite right with aa + stippling - maybe due to the
integer math in the stipple stage, but I can't quite pinpoint it.)
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Jose Fonseca <[email protected]>
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The motivation actually was to get rid of the additional tex
instruction, since that requires the draw fallback code to intercept
all sampler / view calls (even if the fallback is never hit).
Basically, the idea is to use coverage of the pixel to calculate
the alpha value, and coverage is simply based on the distance
to the center of the line (in both line direction, which is useful
for wide lines, as well as perpendicular to the line).
This is much closer to what hw supporting this natively actually does.
It also fixes an issue with line width not quite being correct, as
well as endpoints getting stretched too far (in line direction) with
wide lines, which is apparent with mesa demo line-sample.
(For llvmpipe, it would probably make sense to do something like this
directly when drawing lines, since rendering two tris is twice as
expensive as a line, but it would need some changes with state
management.)
Since we're no longer relying on mipmapping to get the alpha value,
we also don't need to draw 3 rects (6 tris), one is sufficient.
There's still issues (as before):
- quite sure it's not correct without half_pixel_center, but can't test
this with GL.
- aaline + line stipple is incorrect (evident with line-sample demo).
Looking at the spec the stipple pattern should actually be based on
distance (not just dx or dy for x/y major lines as without aa).
- outputs (other than pos + the one used for line aa) should be
reinterpolated since we actually increase line length by half a pixel
(but there's no tests which would care).
v2: simplify the math (should be equivalent), don't need immediate
v3: use float versions of atan2,cos,sin, minor cleanups
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Jose Fonseca <[email protected]>
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We are conformant:
https://www.khronos.org/conformance/adopters/conformant-products#submission_308
v2: Actually not emit it on gfx9.
Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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Deliberately not implementing workgroup scopes as that is not needed
for core vulkan.
Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Dave Airlie <[email protected]>
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v2: Don't bump supported version.
v3: Update json files.
Reviewed-by: Dave Airlie <[email protected]>
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The old vote_eq implementation supported only booleans, but now
we have to support arbitrary values, so use the read_first_invocation
intrinsic + ballot.
I took this as an opportunity to figure out how easy it was to do this
in nir instead of in the nir_to_llvm pass, and it actually turned out
pretty okay IMO. Only creating the pass is some extra code.
Reviewed-by: Dave Airlie <[email protected]>
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While always sketchy to do, this is useful for debugging.
Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
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Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
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Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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This requires us to bump the subgroup size to 32 for all shader stages
because Vulkan requires that to be a physical device query.
Reviewed-by: Iago Toral Quiroga <[email protected]>
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NIR has code to lower these away for us but we can do significantly
better in many cases with register regioning and SIMD4x2.
Acked-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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Acked-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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This commit adds a helper to the builder for emitting "scan" operations.
Given a binary operation #, a scan takes the vector [a0, a1, ..., aN]
and returns the vector [a0, a0 # a1, ..., a0 # a1 # ... # aN] where each
channel contains the combination of all previous channels. The sequence
of instructions to perform the scan is fairly optimal; a 16-wide scan on
a 32-bit type is only 6 instructions. The subgroup scan and reduction
operations will be implemented in terms of this.
Acked-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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Acked-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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Reviewed-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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Reviewed-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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Reviewed-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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Reviewed-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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Reviewed-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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Reviewed-by: Iago Toral Quiroga <[email protected]>
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Reviewed-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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Reviewed-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
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