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* trace: Fix parsing of recent traces.Jose Fonseca2018-06-041-5/+26
* trace: Fix trace_context_transfer_unmap methods.Jose Fonseca2018-06-041-18/+42
* amd/common: use the dimension-aware image intrinsics on LLVM 7+Nicolai Hähnle2018-06-041-24/+165
* i965: Fix batch-last mode to properly swap BOs.Kenneth Graunke2018-06-041-0/+5
* radv: fix a GPU hang when MRTs are sparseSamuel Pitoiset2018-06-041-0/+10
* radv: Don't pass a TESS_EVAL shader when tesselation is not enabled.Bas Nieuwenhuizen2018-06-041-0/+2
* nir: implement the GLSL equivalent of if simplication in nir_opt_ifSamuel Pitoiset2018-06-041-5/+92
* nir: make is_comparison() a non-static helper functionSamuel Pitoiset2018-06-042-25/+25
* nir: use num_components wrappers in print/validate.Dave Airlie2018-06-042-15/+5
* anv: Don't even bother processing relocs if we have softpinJason Ekstrand2018-06-011-3/+15
* anv: Refactor reloc handling in execbuf_add_boJason Ekstrand2018-06-011-36/+42
* anv: Assert that the kernel leaves pinned BO addresses aloneJason Ekstrand2018-06-011-1/+4
* anv: Soft-pin everything elseScott D Phillips2018-06-013-1/+21
* anv: Soft-pin batch buffersScott D Phillips2018-06-014-11/+30
* anv/batch_chain: Simplify secondary batch return chainingJason Ekstrand2018-06-011-40/+36
* anv/batch_chain: Call batch_bo_finish at the end of end_batch_bufferJason Ekstrand2018-06-011-6/+6
* anv: Soft-pin client-allocated memoryJason Ekstrand2018-06-011-0/+3
* anv/allocator: Support softpin in the BO cacheJason Ekstrand2018-06-011-1/+50
* anv/allocator: Set the BO flags in bo_cache_alloc/importJason Ekstrand2018-06-015-28/+60
* anv: For pinned BOs, skip relocations, but track bo usageScott D Phillips2018-06-012-0/+66
* anv: Use a separate pool for binding tables when soft pinningScott D Phillips2018-06-013-11/+53
* anv: Soft-pin state poolsScott D Phillips2018-06-017-10/+34
* nir: Lower !f2b(x) to x == 0.0Ian Romanick2018-06-011-0/+1
* nir: Add some missing "optimization undo" patternsIan Romanick2018-06-011-1/+19
* glsl: Add ir_binop_vector_extract in NIRJuan A. Suarez Romero2018-06-011-0/+9
* i965: Add ARB_fragment_shader_interlock support.Plamena Manolova2018-06-018-6/+35
* mesa: Add GL/GLSL plumbing for ARB_fragment_shader_interlock.Plamena Manolova2018-06-0114-1/+197
* compiler/spirv: reject invalid shader code properlyMartin Pelikán2018-06-012-5/+38
* virgl: Always assume that ORIGIN_UPPER_LEFT and PIXEL_CENTER* are supportedGert Wollny2018-06-011-1/+2
* radeonsi: Fix crash on shaders using MSAA image load/storeAlex Smith2018-06-011-1/+7
* radv: Handle GFX9 merged shaders in radv_flush_constants()Alex Smith2018-06-011-1/+8
* radv: Consolidate GFX9 merged shader lookup logicAlex Smith2018-06-013-35/+26
* radv: Set active_stages the same whether or not shaders were cachedAlex Smith2018-06-011-5/+2
* st/mesa: relax requirements for ARB_ES3_compatibilityMarek Olšák2018-06-011-4/+7
* anv/blorp: Write relocated values into surface statesScott D Phillips2018-05-313-16/+22
* anv: Use an address for each anv_image planeJason Ekstrand2018-05-315-35/+32
* anv/cmd_buffer: Rework surface relocation helpersJason Ekstrand2018-05-311-25/+19
* anv: Use an anv_address in anv_bufferJason Ekstrand2018-05-319-61/+34
* anv/cmd_buffer: Use anv_address for handling indirect parametersJason Ekstrand2018-05-311-44/+51
* anv: Use an anv_address in anv_buffer_viewJason Ekstrand2018-05-315-27/+36
* anv: Use full anv_addresses in anv_surface_stateJason Ekstrand2018-05-313-51/+55
* anv: Add some anv_address helpersJason Ekstrand2018-05-311-0/+24
* anv: Add vma_heap allocators in anv_deviceScott D Phillips2018-05-312-0/+144
* intel/common: Add an address de-canonicalization helperJason Ekstrand2018-05-311-0/+12
* util: Add a randomized test for the virtual memory allocatorScott D Phillips2018-05-315-1/+315
* util: Add a virtual memory allocatorJason Ekstrand2018-05-314-1/+292
* radv: Add startup debug option.Bas Nieuwenhuizen2018-05-314-2/+50
* radv: Add option to print errors even in optimized builds.Bas Nieuwenhuizen2018-05-3114-96/+108
* radv: Make the sem_info allocate/free functions static.Bas Nieuwenhuizen2018-05-312-15/+9
* nir: optimize iand(ieq(a, 0), ieq(b, 0)) to ieq(ior(a, b), 0)Samuel Pitoiset2018-05-311-0/+2
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