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* radeon/uvd: remove get mjpeg slice headerBoyuan Zhang2018-10-231-157/+0
* st/va: get mjpeg slice headerBoyuan Zhang2018-10-233-2/+164
* radeon/vcn: add jpeg decode implementationBoyuan Zhang2018-10-235-7/+119
* radeon/vcn: separate send cmd call from end frameBoyuan Zhang2018-10-232-8/+28
* radeon/vcn: create cs based on ring typeBoyuan Zhang2018-10-231-2/+6
* radeon/winsys: add vcn jpeg ring typeBoyuan Zhang2018-10-231-0/+1
* radeon/vcn: add vcn jpeg decode interfaceBoyuan Zhang2018-10-231-0/+90
* radeon/vcn: move radeon decoder define to header fileBoyuan Zhang2018-10-232-31/+32
* radv: fix btoi for R32G32B32 when the dest offset is not 0Samuel Pitoiset2018-10-231-2/+2
* i965/miptree: Use cpu tiling/detiling when mappingScott D Phillips2018-10-231-4/+106
* i965/tiled_memcpy: inline movntdqa loads in tiled_to_linearScott D Phillips2018-10-239-90/+426
* i965: expose type of memcpy instead of memcpy function itselfTapani Pälli2018-10-234-30/+63
* util: use *unsigned* ints for bit operationsEric Engestrom2018-10-231-1/+1
* radv: s/abs/fabsf/ for floatsEric Engestrom2018-10-231-4/+4
* st/mesa: Record shader access qualifiers for imagesJason Ekstrand2018-10-235-9/+30
* nir/algebraic: Provide descriptive asserts for bit size checksJason Ekstrand2018-10-221-9/+42
* nir/algebraic: Loosen a restriction on variablesJason Ekstrand2018-10-221-2/+6
* nir/algebraic: A bit of validation refactoring'Jason Ekstrand2018-10-221-15/+15
* nir/algebraic: Make internal classes str-ableJason Ekstrand2018-10-221-4/+12
* nir/algebraic: Generalize an optimizationJason Ekstrand2018-10-221-1/+1
* nir/algebraic: Use bool internally instead of bool32Jason Ekstrand2018-10-222-8/+5
* intel: Fix decoding for partial STATE_BASE_ADDRESS updates.Kenneth Graunke2018-10-222-6/+42
* nir: Use nir_src_is_const and nir_src_as_* in core codeJason Ekstrand2018-10-2217-76/+56
* nir/search_helpers: Use nir_src_is_const and friendsJason Ekstrand2018-10-221-27/+22
* nir/search: Use nir_src_is_const and friendsJason Ekstrand2018-10-221-57/+13
* nir: Add some new helpers for working with const sourcesJason Ekstrand2018-10-222-0/+108
* mesa/st: Only call nir_lower_io_to_scalar_early on scalar ISAsAlyssa Rosenzweig2018-10-221-1/+4
* anv,radv: Trivially expose two new VK_GOOGLE extensionsJason Ekstrand2018-10-222-0/+4
* spirv: Add no-op support for VK_GOOGLE_hlsl_functionality1Jason Ekstrand2018-10-222-0/+12
* spirv: Add support for SPV_GOOGLE_decorate_stringJason Ekstrand2018-10-221-0/+8
* android: Build kms_swrast for the Android platformRob Herring2018-10-225-3/+38
* ac: Fix loading a dvec3 from an SSBOConnor Abbott2018-10-221-2/+2
* ac: Introduce ac_build_expand()Connor Abbott2018-10-222-14/+29
* ir3/nir: Set up image_dims consts for image_deref_size intrinsic tooEduardo Lima Mitev2018-10-211-0/+1
* nv50/ir: fix ConstantFolding::createMul for 64 bit mulsKarol Herbst2018-10-201-1/+1
* radeonsi: Disable clear_state with radeon kernel driverSonny Jiang2018-10-192-4/+7
* anv: Define trampolines as the weak functionsJason Ekstrand2018-10-192-49/+21
* scons: Remove gles option.Jose Fonseca2018-10-199-44/+6
* radv: Fix WSI & PCI bus info initialization order.Bas Nieuwenhuizen2018-10-191-4/+9
* radeonsi: fix a typo in a comment in emit_guardbandMarek Olšák2018-10-181-1/+1
* radeonsi: fix gnome-shell crashMarek Olšák2018-10-181-2/+2
* Revert "anv: Stop generating weak references for instance entrypoints"Jason Ekstrand2018-10-181-0/+13
* radeonsi: clamp point size to the limitMarek Olšák2018-10-183-3/+5
* radeonsi: fix a VGT hang with primitive restart on Polaris10 and laterMarek Olšák2018-10-181-2/+8
* radeonsi: fix a deadlock due to partially-initialized context on CIMarek Olšák2018-10-181-6/+8
* radeonsi: Bump number of allowed global buffers to 32Jan Vesely2018-10-181-1/+1
* radv: fix check for perftest options sizeAndres Rodriguez2018-10-181-1/+1
* radeonsi: fix incorrect hw screen offset and guardband computationMarek Olšák2018-10-181-2/+2
* vulkan/wsi: Use VK_EXT_pci_bus_info for DRM fd matchingJason Ekstrand2018-10-1811-70/+61
* loader/dri3: Also wait for front buffer fence if we triggered itMichel Dänzer2018-10-181-2/+5
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