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* st/dri: cleanup image_from_fd/dma_buf pathsStanimir Varbanov2016-05-301-37/+44
* st/dri: add handling of R8 and GR88 DRI fourcc formatsStanimir Varbanov2016-05-301-0/+20
* radeonsi: Don't offset OFFCHIP_BUFFERING on pre-VI cards.Bas Nieuwenhuizen2016-05-301-2/+6
* i965: Expose GL 4.3 on Gen8+.Francisco Jerez2016-05-292-2/+2
* i965/fs: Skip gen4 pre/post-send dependency workaronds for the first/last block.Francisco Jerez2016-05-291-2/+2
* i965/fs: Skip SIMD lowering source unzipping for regular scalar regions.Francisco Jerez2016-05-291-2/+21
* i965/fs: Factor out region zipping and unzipping from the SIMD lowering pass.Francisco Jerez2016-05-291-60/+84
* i965/fs: Generalize regions_overlap() from copy propagation to handle non-VGR...Francisco Jerez2016-05-292-12/+42
* i965/fs: Refactor offset() into a separate function taking the width as argum...Francisco Jerez2016-05-292-16/+21
* i965/fs: Implement opt_sampler_eot() in terms of logical sends.Francisco Jerez2016-05-292-55/+40
* i965/fs: Fix UB list sentinel dereference in opt_sampler_eot().Francisco Jerez2016-05-291-6/+9
* i965/fs: Take opt_redundant_discard_jumps out of the optimization loop.Francisco Jerez2016-05-291-2/+1
* i965/fs: Run SIMD and logical send lowering after the optimization loop.Francisco Jerez2016-05-291-4/+25
* i965/fs: Add FS_OPCODE_FB_WRITE_LOGICAL to has_side_effects().Francisco Jerez2016-05-291-0/+1
* i965/fs: Allow constant propagation into logical send sources.Francisco Jerez2016-05-291-0/+34
* i965/fs: Let CSE handle logical sampler sends as expressions.Francisco Jerez2016-05-291-0/+13
* i965/fs: Pass a BAD_FILE register to the logical FB write when oMask is unused.Francisco Jerez2016-05-292-2/+3
* glsl: fix xfb_offset unsized array validationTimothy Arceri2016-05-304-31/+41
* glsl: dont crash when attempting to assign a value to a builtin defineTimothy Arceri2016-05-301-1/+1
* egl/dri3: don't crash on no context.Dave Airlie2016-05-301-2/+4
* mesa/program_interface_query: fix transform feedback varyings.Dave Airlie2016-05-302-35/+48
* glsl/ast: subroutineTypes can't be returned from functions.Dave Airlie2016-05-301-0/+9
* glsl: use has_double() helperTimothy Arceri2016-05-301-2/+1
* glsl: fix explicit uniform block alignmentTimothy Arceri2016-05-301-3/+1
* i965: Shrink stage_prog_data param array lengthJordan Justen2016-05-296-14/+6
* nv50,nvc0: fix the max_vertices=0 caseIlia Mirkin2016-05-293-2/+4
* st/mesa: fix setting of point_size_per_vertex in ES contextsIlia Mirkin2016-05-291-2/+18
* mesa: skip level checking for FramebufferTexture*D if texture is zeroMarek Olšák2016-05-291-3/+3
* st/mesa: expose OES_shader_io_blocks when we have enough for ES 3.1Ilia Mirkin2016-05-281-0/+6
* swr: [rasterizer] Do not define _mm256_storeu2_m128i with icc.Vinson Lee2016-05-281-1/+1
* i965: add missing return in if statementThomas Hindoe Paaboel Andersen2016-05-281-0/+1
* gk110/ir: fix unspilling of predicates from registersIlia Mirkin2016-05-281-0/+28
* nvc0: remove outdated surfaces validation code for GK104Samuel Pitoiset2016-05-281-70/+0
* nvc0: do not always invalidate 3D CBs when using computeSamuel Pitoiset2016-05-281-8/+17
* i965: Update compute workgroup size limit calculation for SIMD32.Francisco Jerez2016-05-271-11/+3
* i965: Add do32 debug option.Francisco Jerez2016-05-273-1/+3
* i965/fs: Build 32-wide compute shader when needed.Francisco Jerez2016-05-271-0/+26
* i965/fs: Extend back-end interface for limiting the shader dispatch width.Francisco Jerez2016-05-273-23/+22
* i965/fs: Implement SIMD32 register allocation support.Francisco Jerez2016-05-273-8/+9
* i965/fs: Remove pre-Gen7 register allocation class micro-optimization.Francisco Jerez2016-05-271-18/+3
* i965/fs: Don't mutate multi-component arguments in sampler payload set-up.Francisco Jerez2016-05-271-58/+32
* i965/fs: Fix multiple ACP interference during copy propagation.Francisco Jerez2016-05-271-6/+2
* i965/fs: Fix cmod propagation not to propagate non-identity cmod into CMP(N).Francisco Jerez2016-05-271-0/+12
* i965/fs: Estimate number of registers written correctly in opt_register_renam...Francisco Jerez2016-05-271-2/+2
* i965/fs: Add (sub)reg_offset asserts to brw_reg_from_fs_reg.Francisco Jerez2016-05-271-0/+2
* i965/fs: Reset reg_offset of the original destination to zero in compute_to_m...Francisco Jerez2016-05-271-0/+1
* i965/fs: Skip remove_duplicate_mrf_writes() during SIMD32 runs.Francisco Jerez2016-05-271-1/+1
* i965/fs: Use SIMD8 SSBO GET_BUFFER_SIZE message regardless of the dispatch wi...Francisco Jerez2016-05-271-22/+18
* i965/fs: Don't emit duplicated SSBO GET_BUFFER_SIZE instruction unnecessarily.Francisco Jerez2016-05-271-1/+0
* i965/fs: Emit fixed width memory fence opcode regardless of the dispatch width.Francisco Jerez2016-05-271-2/+3
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