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* mesa/fbo: do not assign a value that is never read later onMartin Peres2015-04-011-6/+3
| | | | | | | | | | | | | The issue has been detected by coverty. v2: - move the declaration of obj to the else clause (Brian Paul) v3: Review by Brian Paul - get rid of the obj declaration in favor of a direct reference Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Martin Peres <[email protected]>
* egl: add initial EGL_MESA_image_dma_buf_export v2.4Dave Airlie2015-04-017-4/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | At the moment to get an EGL image to a dma-buf file descriptor, you have to use EGL_MESA_drm_image, and then use libdrm to convert this to a file descriptor. This extension just provides an API modelled on EGL_MESA_drm_image, to return a dma-buf file descriptor. v2: update spec for new API proposal add internal queries to get the fourcc back from intel driver. v2.1: add gallium pieces. v2.2: add offsets to spec and API, rename fd->fds, stride->strides in API. rewrite spec a bit more, add some q/a v2.3: add modifiers to query interface and 64-bit type for that (Daniel Stone) specifiy what happens to num fds vs num planes differences. (Chad Versace) v2.4: fix grammar (Daniel Stone) Signed-off-by: Dave Airlie <[email protected]>
* i965/state: Remove brw->state.dirtyJordan Justen2015-03-312-7/+0
| | | | | | | | | We now use brw->NewGLState and brw->ctx.NewDriverState instead. Suggested-by: Kenneth Graunke <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Don't use brw->state.dirty.mesaJordan Justen2015-03-315-12/+11
| | | | | | | | | | | | | | | Now, we only use brw->NewGLState. I used this bash & sed command in the i965 directory: for file in *.[ch] *.[ch]pp; do sed -i -e 's/brw->state\.dirty\.mesa/brw->NewGLState/g' $file done Followed by manual changes to brw_state_upload.c. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Don't use brw->state.dirty.brwJordan Justen2015-03-3133-83/+82
| | | | | | | | | | | | | | | Now, we only use ctx->NewDriverState. I used this bash & sed command in the i965 directory: for file in *.[ch] *.[ch]pp; do sed -i -e 's/state\.dirty\.brw/ctx.NewDriverState/g' $file done Followed by manual changes to brw_state_upload.c. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Add compute pipeline with empty atom listsJordan Justen2015-03-313-1/+37
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Only upload render programs for render state uploadsJordan Justen2015-03-311-20/+25
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Create separate dirty state bits for each pipelineJordan Justen2015-03-312-27/+75
| | | | | | | | | | | | | | | | | | When clearing the state for a pipeline, we will save changed state for the other pipelines. v3: * Adjust brw_upload_pipeline_state * Don't pull pipeline state bits into common state bits * Don't clear pipeline state bits * Adjust 'clear' phase * brw_clear_dirty_bits is now brw_render_state_finished * Move cross-pipeline state flagging to brw_pipeline_state_finished * Move pipeline clears to brw_pipeline_state_finished Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Support multiple pipelines in brw->num_atomsJordan Justen2015-03-312-39/+65
| | | | | | | | | | | | | | | | | brw->num_atoms is converted to an array, but currently just an array of length 1. Adds brw_copy_pipeline_atoms which copies the atoms for a pipeline, and sets brw->num_atoms[p] for pipeline p. v2: * Rename brw->atoms[] to render_atoms * Rename brw_add_pipeline_atoms to brw_copy_pipeline_atoms * Rename brw_pipeline_first_atom to brw_get_pipeline_atoms Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Rename brw_clear_dirty_bits to brw_render_state_finishedJordan Justen2015-03-313-3/+3
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Rename brw_upload_state to brw_upload_render_stateJordan Justen2015-03-313-10/+11
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* gallivm: do some hack heuristic to disable texture functionsRoland Scheidegger2015-04-011-0/+40
| | | | | | | | | | | | | | We've seen some cases where performance can hurt quite a bit. Technically, the more simple the function the more overhead there is for using a function for this (and the less benefits this provides). Hence don't do this if we expect the generated code to be simple. There's an even more important reason why this hurts performance, which is shaders reusing the same unit with some of the same inputs, as llvm cannot figure out the calculations are the same if they are performned in the function (even just reusing the same unit without any input being the same provides such optimization opportunities though not very much). This is something which would need to be handled by IPO passes however.
* i965/fs: Allow CSE to handle MULs with negated arguments.Matt Turner2015-03-311-5/+37
| | | | | | | | | | | | | | | | | | | | | mul x, -y is equivalent to mul -x, y; and mul x, y is the negation of mul x, -y. With NIR: total instructions in shared programs: 6167779 -> 6161193 (-0.11%) instructions in affected programs: 983511 -> 976925 (-0.67%) helped: 4106 HURT: 16 GAINED: 18 LOST: 7 Without NIR: total instructions in shared programs: 6192323 -> 6185299 (-0.11%) instructions in affected programs: 987875 -> 980851 (-0.71%) helped: 4146 HURT: 16 GAINED: 16 LOST: 0
* i965: Mark brw_inst_bits' brw_inst* parameter const.Matt Turner2015-03-311-12/+12
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Remove bogus Makefile dependency.Matt Turner2015-03-311-2/+0
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* glsl: Reassociate multiplication of mat*mat*vec.Matt Turner2015-03-311-0/+14
| | | | | | | | | | | | | | | | | | | The typical case of mat4*mat4*vec4 is 80 scalar multiplications, but mat4*(mat4*vec4) is only 32. On HSW (with vec4 vertex shaders): instructions in affected programs: 4420 -> 3194 (-27.74%) On BDW (with scalar vertex shaders): instructions in affected programs: 12756 -> 6726 (-47.27%) Implementing a general matrix chain ordering is harder (or at least tedious) because of having to walk the GLSL IR to create a list of multiplicands. I'm guessing that this patch handles 90+% of cases, but of course to tell definitively you'd have to implement the general thing. Reviewed-by: Chris Forbes <[email protected]>
* glsl: Implement type inferencing of matrix types.Matt Turner2015-03-311-4/+6
| | | | Reviewed-by: Chris Forbes <[email protected]>
* glsl: Factor out a get_mul_type() function.Matt Turner2015-03-313-57/+78
| | | | Reviewed-by: Chris Forbes <[email protected]>
* nouveau: synchronize "scratch runout" destruction with the command streamMarcin Ślusarz2015-03-312-19/+37
| | | | | | | | | | | | | | | | | | | | | When nvc0_push_vbo calls nouveau_scratch_done it does not mean scratch buffers can be freed immediately. It means "when hardware advances to this place in the command stream the scratch buffers can be freed". To fix it, just postpone scratch runout destruction after current fence is signalled. The bug existed for a very long time. Nobody noticed, because "scratch runout" code path is rarely executed. Fixes hang at the very beginning of first mission in "Serious Sam 3" on nve7/gk107. It manifested as: nouveau E[ PFIFO][0000:01:00.0] read fault at 0x000a9e0000 [PTE] from GR/GPC0/PE_2 on channel 0x007f853000 [Sam3[17056]] Cc: "10.4 10.5" <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* i965/skl: Avoid using the 1D stencil layout for stencil-only imagesNeil Roberts2015-03-311-1/+2
| | | | | | | | | | | | | Commit cf67ca9ffa9 made the layouting code pick a special layout for 1D images on Skylake. This should not be used for depth and stencil buffers because these need to be treated as 2D tiled images. However the patch was missing a check for images with a base format of GL_STENCIL_INDEX. In practice I don't think it's currently possible to hit this because Mesa doesn't support GL_ARB_texture_stencil8 and it's not possible to create a 1D renderbuffer, but it'll be good to be ready for when the extension is supported. Reviewed-by: Anuj Phogat <[email protected]>
* clover: Return CL_BUILD_ERROR for CL_PROGRAM_BUILD_STATUS when compilation ↵Tom Stellard2015-03-311-0/+2
| | | | | | | | | | | fails v2 v2: - Don't use _errs map Cc: 10.5 10.4 <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* radeonsi/compute: Default to the same PIPE_SHADER_CAP values as other shader ↵Tom Stellard2015-03-311-1/+5
| | | | | | | | | types v2 v2: - Fix typo Reviewed-by: Marek Olšák <[email protected]>
* radeon/vce: implement video usability information supportLeo Liu2015-03-313-0/+59
| | | | | | | | | This will help encoding VUI into the bitstream v2: make backward compatible Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* st/omx/enc: export framerate to vce driverLeo Liu2015-03-311-4/+4
| | | | | | | The framerate will be used for video usability info support by VCE driver Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* llvmpipe: enable ARB_texture_gatherRoland Scheidegger2015-03-311-2/+3
| | | | | | | | | | | | Just announce support for 4 components. While here also increase the max/min texel offsets (the limit is completely artificial, was chosen because that's what other hardware did, however there's other drivers using larger limits). Over a thousand little piglits skip->pass. v2: update docs/GL3.txt Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: implement TG4 for ARB_texture_gatherRoland Scheidegger2015-03-312-40/+133
| | | | | | | | | | | | | | | | This is quite trivial, essentially just follow all the same code you'd use with linear min/mag (and no mip) filter, then just skip the filtering after looking up the texels in favor of direct assignment of the right channel to the result. (This is though not true for the multi-offset version if we'd want to support it - for this would probably need to do something along the lines of 4x nearest sampling due to the necessity of doing coord wrapping individually per texel.) Supports multi-channel formats. From the SM5 gather cap bit, should support non-constant offsets, plus shadow comparisons (the former untested), but not component selection (should be easy to implement but all this stuff is not really exposable anyway for now). Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: add gather support to sampler interfaceRoland Scheidegger2015-03-313-21/+34
| | | | | | Luckily thanks to the revamped interface this is a lot less work now... Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: simplify sampler interfaceRoland Scheidegger2015-03-316-271/+218
| | | | | | | | | | | | | | | | | | This has got a bit out of control with more and more parameters added. Worse, whenever something in there changes all callees have to be updated for that, even though they don't really do much with any parameter in there except pass it on to the actual sampling function. Hence simply put almost everything into a struct. Also instead of relying on some arguments being NULL, be explicit and set this in a key (which is just reused for function generation for simplicity). (The code still relies on them being NULL in the end for now.) Technically there is a minimal functional change here for shadow sampling: if shadow sampling is done is now determined explicitly by the texture function (either sample_c or the gl-style tex func inherit this from target) instead of the static texture state. These two should always match, however. Otherwise, it should generate all the same code. Reviewed-by: Jose Fonseca <[email protected]>
* util/debug: Update MgwHelp link, drop BfdHelp link.Jose Fonseca2015-03-311-10/+2
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* gallivm: Fix build against LLVM 3.7 SVN r233648Michel Dänzer2015-03-311-0/+5
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* vc4: Drop integer multiplies with 0 to moves of 0.Eric Anholt2015-03-301-0/+8
| | | | | | | | This cleans up more instructions generated by uniform array indexing multiplies. total instructions in shared programs: 39989 -> 39961 (-0.07%) instructions in affected programs: 896 -> 868 (-3.12%)
* vc4: Add a constant folding pass.Eric Anholt2015-03-304-0/+113
| | | | | | | | | | | | This cleans up some pointless operations generated by the in-driver mul24 lowering (commonly generated by making a vec4 index for a matrix in a uniform array). I could fill in other operations, but pretty much anything else ought to be getting handled at the NIR level, I think. total uniforms in shared programs: 13423 -> 13421 (-0.01%) uniforms in affected programs: 346 -> 344 (-0.58%)
* glsl: allow ForceGLSLVersion to override #version directivesBrian Paul2015-03-303-6/+10
| | | | | | | | | | | | Previously, the ctx->Const.ForceGLSLVersion setting only worked if the shader lacked a #version directive. Now, the ForceGLSLVersion setting will override the #version directive too. This change should be safe since it should be rare to have an app that has a mix of shader versions and we only wanted to override the #version for shaders which lacked the #version directive. Reviewed-by: Ilia Mirkin <[email protected]>
* vc4: Don't bother masking out the low 24 bits for integer multipliesEric Anholt2015-03-301-12/+8
| | | | | | | | | | The hardware just uses the low 24 lines, saving us an AND to drop the high bits. total uniforms in shared programs: 13433 -> 13423 (-0.07%) uniforms in affected programs: 356 -> 346 (-2.81%) total instructions in shared programs: 40003 -> 39989 (-0.03%) instructions in affected programs: 910 -> 896 (-1.54%)
* vc4: Make integer multiply use 24 bits for the low parts.Eric Anholt2015-03-301-5/+5
| | | | | The hardware uses the low 24 bits in integer multiplies, so we can have fewer high bits (and so probably drop them more frequently).
* glsl: fail when a shader's input var has not an equivalent out var in previousSamuel Iglesias Gonsalvez2015-03-301-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GLSL ES 3.00 spec, 4.3.10 (Linking of Vertex Outputs and Fragment Inputs), page 45 says the following: "The type of vertex outputs and fragment input with the same name must match, otherwise the link command will fail. The precision does not need to match. Only those fragment inputs statically used (i.e. read) in the fragment shader must be declared as outputs in the vertex shader; declaring superfluous vertex shader outputs is permissible." [...] "The term static use means that after preprocessing the shader includes at least one statement that accesses the input or output, even if that statement is never actually executed." And it includes a table with all the possibilities. Similar table or content is present in other GLSL specs: GLSL 4.40, GLSL 1.50, etc but for more stages (vertex and geometry shaders, etc). This patch detects that case and returns a link error. It fixes the following dEQP test: dEQP-GLES3.functional.shaders.linkage.varying.rules.illegal_usage_1 However, it adds a new regression in piglit because the test hasn't a vertex shader and it checks the link status. bin/glslparsertest \ tests/spec/glsl-1.50/compiler/gs-also-uses-smooth-flat-noperspective.geom pass \ 1.50 --check-link This piglit test is wrong according to the spec wording above, so if this patch is merged it should be updated. Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* radeonsi: Cache LLVMTargetMachineRef in context instead of in screenMichel Dänzer2015-03-306-30/+41
| | | | | | | | | | Fixes a crash in genymotion with several threads compiling shaders concurrently. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89746 Cc: 10.5 <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* glsl: fix unreachable(!"") to unreachable("")Tapani Pälli2015-03-301-1/+1
| | | | | | | | Correct error with commit 151fb1e where assert was renamed to unreachable without removing ! from string argument. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* freedreno/a3xx: add support for point sprite coordinate replacementIlia Mirkin2015-03-284-30/+28
| | | | | | | This does not (yet) support different coordinate origins, so the tests still fail due to fbo flipping. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a3xx: make vs-set point size workIlia Mirkin2015-03-283-2/+10
| | | | | | | | | | This appears to need the A2XX version of the point list, so select it at draw time if necessary. Experimentally, always using the A2XX version causes hangs when PSIZE isn't actually emitted. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a3xx: point size should not be divided by 2Ilia Mirkin2015-03-282-5/+5
| | | | | | | | | | | The division is probably a holdover from the days when the fixed point inline functions generated by headergen were broken. Also reduce the maximum point size to 4092 (vs 4096), which is what the blob does. Cc: "10.4 10.5" <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a3xx: fix 3d texture layoutIlia Mirkin2015-03-282-7/+16
| | | | | | | | | | | | | The SZ2 field contains the layer size of a lower miplevel. It only contains 4 bits, which limits the maximum layer size it can describe. In situations where the next miplevel would be too big, the hardware appears to keep minifying the size until it hits one of that size. Unfortunately the hardware's ideas about sizes can differ from freedreno's which can still lead to issues. Minimize those by stopping to minify as soon as possible. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.4 10.5" <[email protected]>
* freedreno/a3xx: LAYERSZ2 appears to have no effect on arraysIlia Mirkin2015-03-281-2/+1
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nir: Fix copy and pasted error message in nir_validate.Kenneth Graunke2015-03-281-2/+1
| | | | | | | | | | These are nir_cf_nodes, not ALU instructions. Also, use unreachable() to preempt said review feedback. v2: Do it right (thanks Ilia). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir: Use NIR for ARB_vertex_program support on Gen8+.Kenneth Graunke2015-03-271-4/+10
| | | | | | | | | | | Everything is already in place; we simply have to take the scalar code generation path. This gives us SIMD8 VS programs, instead of SIMD4x2. v2: Rebase on the patch that drops brw->gen >= 8. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* i965: Move env_var_as_boolean to intel_debug.c.Kenneth Graunke2015-03-273-22/+29
| | | | | | | I need to use this in brw_vec4.cpp, so it can't be static anymore. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Add ARB_fragment_program support to the NIR backend.Kenneth Graunke2015-03-272-26/+51
| | | | | | | | | | | | | | | | | | | | | Use prog_to_nir where we would normally call glsl_to_nir, handle program parameter lists, and skip a few things that don't exist. Using NIR generates much better shader code than Mesa IR, since we get real optimizations, as opposed to prog_optimize: total instructions in shared programs: 314007 -> 279892 (-10.86%) instructions in affected programs: 285173 -> 251058 (-11.96%) helped: 2001 HURT: 67 GAINED: 4 LOST: 7 v2: Change early return in nir_setup_uniforms to if/else (Jordan). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir: Lower subtraction to add with negation when !lower_negate.Kenneth Graunke2015-03-271-0/+2
| | | | | | | | | | | prog->nir will generate fsub opcodes, but i965 doesn't implement them. We may as well lower them at the NIR level, since it's trivial to do. Suggested by Connor Abbott. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nir: Implement a Mesa IR -> NIR translator.Kenneth Graunke2015-03-275-0/+1143
| | | | | | | | | | | | | | | | | | | Shamelessly ripped off from Eric Anholt's tgsi_to_nir pass. This is not built on SCons, like the rest of NIR. v2: - Delete redundant c->s, c->impl, and c->cf_node_list pointers (Ken) - Use nir_builder directly instead of ptn_compile in more places (Ken) - Drop 'struct' keyword in front of nir_builder (ken) - Add a file level Doxygen comment (Ken) - Use scalar constants instead of splatting (Eric) - Use nir_builder helpers for constants, moves, and swizzles (Connor) v3: Minor indentation improvements. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nir: Add builder helpers for MOVs with ALU sources and swizzling MOVs.Kenneth Graunke2015-03-271-0/+44
| | | | | | | | | | These will be useful for prog->nir and tgsi->nir. v2: Don't forget to mark nir_swizzle as inline (Eric). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
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