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* glsl: add support for unsized arrays in shader storage blocksSamuel Iglesias Gonsalvez2015-09-255-49/+150
| | | | | | | | | | | | | | | | | | | They only can be defined in the last position of the shader storage blocks. When an unsized array is used in different shaders, it might be converted in different sized arrays, avoid get a linker error in that case. v2: - Rework error condition and error messages (Timothy Arceri) v3: - Move OpenGL ES check to its own patch. Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* glsl: return error if unsized arrays are found in OpenGL ESSamuel Iglesias Gonsalvez2015-09-251-0/+16
| | | | | | Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/fs: Do not split buffer variablesIago Toral Quiroga2015-09-251-0/+1
| | | | | | | | Buffer variables are the same as uniforms, only that read/write, so we want the same treatment. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: handle visiting of ir_var_shader_storage variablesIago Toral Quiroga2015-09-251-2/+3
| | | | | Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Upload Shader Storage Buffer Object surfacesIago Toral Quiroga2015-09-252-13/+57
| | | | | | | | | | | Since these are a special kind of UBOs we emit them together reusing the same infrastructure, however, we use a RAW surface so we can reuse existing untyped read/write/atomic messages which include a pixel mask header that we need to set to obtain correct behavior with helper invocations of the fragment shader. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Set MaxShaderStorageBuffers for compute shadersIago Toral Quiroga2015-09-251-0/+3
| | | | | | | | v2: - Set it after the driver's MaxShaderStorageBuffers value assignment. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: set ARB_shader_storage_buffer_object related constant valuesSamuel Iglesias Gonsalvez2015-09-251-0/+12
| | | | | | | | | | | | v2: - Add tessellation shader constants assignment v3: - Set MaxShaderStorageBufferBindings to 36. Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Implement DriverFlags.NewShaderStorageBufferIago Toral Quiroga2015-09-252-0/+3
| | | | | | | | We use the same dirty state for SSBOs and UBOs because they share the same infrastructure. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Use 64-byte offset alignment for shader storage buffersIago Toral Quiroga2015-09-251-0/+9
| | | | | | | | | | | | | | | | | This should be a cacheline (64 bytes) so that we can safely have the CPU and GPU writing the same SSBO on non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never writes, so there's no problem. For an SSBO, the GPU and the CPU can be updating disjoint regions of the buffer simultaneously and that will break if the regions overlap the same cacheline. v2: - Use cacheline size (64 bytes) instead of 16 bytes (Kristian). - Update commit log and add a comment in the code explaining why we use cacheline size (Ben). Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* mesa: set MAX_SHADER_STORAGE_BUFFERS to 16.Samuel Iglesias Gonsalvez2015-09-251-1/+1
| | | | | | | | | v2: - Set the value to 16 and drop the comment. (Kristian) Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* glsl: add packed varyings to program resource listTapani Pälli2015-09-251-4/+76
| | | | | | | | | | | | | | This makes sure that user is still able to query properties about variables that have gotten packed by lower_packed_varyings pass. Fixes following OpenGL ES 3.1 test: ES31-CTS.program_interface_query.separate-programs-vertex v2: fix 'name included in packed list' check (Ilia Mirkin) v3: iterate over instances of name using strtok_r (Ilia Mirkin) Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Marta Lofstedt <[email protected]>
* mesa: add packed_varyings list to gl_shaderTapani Pälli2015-09-252-4/+13
| | | | | | | | | This is required to store information about packed varyings, currently these variables get lost and cannot be retrieved later in sensible way for program interface queries. List will be utilized by next patch. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Marta Lofstedt <[email protected]>
* i965/cs: Implement DispatchComputeIndirect supportJordan Justen2015-09-243-4/+60
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* mesa/cs: Implement glDispatchComputeIndirectJordan Justen2015-09-244-6/+73
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* mesa/cs: Support GL_DISPATCH_INDIRECT_BUFFERJordan Justen2015-09-244-0/+21
| | | | | | | | v2: * Use _mesa_has_compute_shaders (Ilia) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* mesa/cs: Add _mesa_validate_DispatchComputeJordan Justen2015-09-243-23/+53
| | | | | | | | | Move API validation to _mesa_validate_DispatchCompute in api_validate.c. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* mesa: fix mipmap generation for immutable, compressed texturesRoland Scheidegger2015-09-251-21/+15
| | | | | | | | | | | | | | | | | | | | | If the immutable compressed texture didn't have the full mip pyramid, this didn't work, because it tried to generate mip levels for non-existing levels. _mesa_prepare_mipmap_level() would correctly handle this by returning FALSE if the mip level didn't exist, however we actually created the non-existing mip level right before that because we used _mesa_get_tex_image() before calling _mesa_prepare_mipmap_level(). It would then proceed to crash (we allocated the mip level, which is a bad idea on an immutable texture, but didn't initialize the values, leading to assertion failures or segfaults). Fix this by using _mesa_select_tex_image() instead and call it after _mesa_prepare_mipmap_level(), as that function will allocate missing mip levels for non-immutable textures already. This fixes a (2 year old) crash with astromenace which was hack-fixed in ubuntu packages instead: http://bugs.debian.org/718680 (I guess most apps do full mip chains - I believe this app not doing it is actually unintentional, always one level less than full mip chain...). Cc: "10.6 11.0" <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* glsl: Expose gl_MaxTess{Control,Evaluation}AtomicCounters.Matt Turner2015-09-241-8/+4
| | | | | | | | | | | | | | | | | | | | | ... with only ARB_shader_atomic_counters. I expected to see interactions with ARB_tessellation_shader in the ARB_shader_atomic_counters spec, but they do not exist. It seems that we should unconditionally expose these variables in the presence of ARB_shader_atomic_counters: gl_MaxTessControlAtomicCounters gl_MaxTessEvaluationAtomicCounters This partially reverts commit da7adb99e8. The commit also affected gl_MaxTessControlImageUniforms and gl_MaxTessEvaluationImageUniforms similarly but the ARB_shader_image_load_store spec does list an interaction with ARB_tessellation_shader. Cc: "11.0" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92095 Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: check swizzle before discarding a uniform on a 3src operandAlejandro Piñeiro2015-09-241-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this commit, copy propagation is discarded if it involves a uniform with an instruction that has 3 sources. But 3 sourced instructions can access scalar values. For example, this is what vec4_visitor::fix_3src_operand() is already doing: if (src.file == UNIFORM && brw_is_single_value_swizzle(src.swizzle)) return src; Shader-db results (unfiltered) on NIR: total instructions in shared programs: 6259650 -> 6241985 (-0.28%) instructions in affected programs: 812755 -> 795090 (-2.17%) helped: 7930 HURT: 0 Shader-db results (unfiltered) on IR: total instructions in shared programs: 6445822 -> 6441788 (-0.06%) instructions in affected programs: 296630 -> 292596 (-1.36%) helped: 2533 HURT: 0 v2: - Updated commit message, using Matt Turner suggestions - Move the check after we've created the final value, as Jason Ekstrand suggested - Clean up the condition v3: - Move the check back to the original place, to keep things tidy, as suggested by Jason Ekstrand v4: - Fixed missing is_single_value_swizzle() as pointed by Jason Ekstrand Reviewed-by: Matt Turner <[email protected]>
* android: radeonsi: fix sid_tables.h missing LOCAL_MODULE_CLASSMauro Rossi2015-09-241-0/+1
| | | | Signed-off-by: Marek Olšák <[email protected]>
* gallium/radeon: remove the percentage symbol from HUD temperatureBenjamin Bellec2015-09-241-1/+1
| | | | | | | The HUD adds '%' if max == 100. Signed-off-by: Benjamin Bellec <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/u_blitter: handle allocation failuresMarek Olšák2015-09-241-0/+6
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle dummy constant buffer allocation failureMarek Olšák2015-09-241-0/+2
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't forget to update scratch relocations for LS, HS, ES shadersMarek Olšák2015-09-241-2/+6
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: skip drawing if updating the scratch buffer failsMarek Olšák2015-09-241-14/+49
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: skip drawing if PS fails to compile or uploadMarek Olšák2015-09-241-12/+3
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: skip drawing if VS, TCS, TES, GS fail to compile or uploadMarek Olšák2015-09-241-7/+23
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle fixed-func TCS shader create failureMarek Olšák2015-09-241-2/+5
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle shader precompile failuresMarek Olšák2015-09-241-1/+6
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: skip drawing if GS ring allocations failMarek Olšák2015-09-241-1/+10
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: skip drawing if the tess factor ring allocation failsMarek Olšák2015-09-243-5/+12
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add malloc fail paths to si_create_shader_stateMarek Olšák2015-09-241-0/+8
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: report alloc failure from si_shader_binary_readMarek Olšák2015-09-241-1/+4
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: add a fail path for depth MSAA texture readbackMarek Olšák2015-09-241-0/+5
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: handle buffer alloc failures in r600_draw_rectangleMarek Olšák2015-09-241-0/+3
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: handle buffer_map staging buffer failures betterMarek Olšák2015-09-241-4/+3
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle constant buffer alloc failuresMarek Olšák2015-09-241-1/+7
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle index buffer alloc failuresMarek Olšák2015-09-241-0/+6
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* st/mesa: fix front buffer regression after dropping st_validate_state in BlitMarek Olšák2015-09-241-0/+2
| | | | | | | | Broken by: d082c5324914212f76e45be497229c7a0681f706 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92072 Cc: 10.6 11.0 <[email protected]> Tested-by: Ilia Mirkin <[email protected]>
* wayland: Add copyright notice for wayland-egl.cKristian Høgsberg Kristensen2015-09-241-0/+29
| | | | Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
* i965: Respect stride and subreg_offset for ATTR registersKristian Høgsberg Kristensen2015-09-241-1/+4
| | | | | | | | | | | | When we assign hw regs to attributes, we don't incorporate the stride and subreg_offset from the fs_reg. It's rarely used, but the integer multiplication lowering uses unusual stride and subreg_offset combination breaks when one source is an attribute. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91970 Cc: "10.6 11.0" <[email protected]> Signed-off-by: Kristian Høgsberg Kristensen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: rework Driver.CopyImageSubData() and related codeBrian Paul2015-09-246-171/+363
| | | | | | | | | | | | | | | | | | | | | | | | Previously, core Mesa's _mesa_CopyImageSubData() created temporary textures to wrap renderbuffer sources/destinations. This caused a bit of a mess in the Mesa/gallium state tracker because we had to basically undo that wrapping. Instead, change ctx->Driver.CopyImageSubData() to take both gl_renderbuffer and gl_texture_image src/dst pointers (one being null, the other non-null) so the driver can handle renderbuffer vs. texture as needed. For the i965 driver, we basically moved the code that wrapped textures around renderbuffers from copyimage.c down into the met and driver code. The old code in copyimage.c also made some questionable calls to _mesa_BindTexture(), etc. which weren't undone at the end. v2 (Jason Ekstrand): Rework the intel bits v3 (Brian Paul): Update the temporary st_CopyImageSubData() function. Reviewed-by: Topi Pohjolainen <[email protected]> Tested-by: Kai Wasserbäch <[email protected]> Tested-by: Nick Sarnie <[email protected]>
* st/xa: Fixups for PIPE_FORMAT_R8_UNORM A8 usage v2.Thomas Hellstrom2015-09-242-11/+29
| | | | | | | | | | | | | | | | Check for PIPE_FORMAT_R8_UNORM when setting up the copy shader. Also re-enable the dest alpha blending with A8 destination that actually turned out to be correct. Verified using rendercheck that the composite operators overreverse, in, out, atop, atopreverse and xor seem to work fine with a8 destiation. v2: Fix a copy-paste error. Reported-by: Jose Fonseca <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* st/mesa: keep track of saturated writes when eliminating dead codeIlia Mirkin2015-09-241-2/+1
| | | | | | | | | | It doesn't matter whether a write is saturated or not, in another implementation it might even have been a separate opcode. This code was most likely copied from the copy-propagation pass (where one does have to distinguish saturation). Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* glsl: correctly detect inactive UBO arraysTimothy Arceri2015-09-242-9/+4
| | | | | | | | | Previously the code was trying to get the packing type from the array not the interface. Cc: Ian Romanick <[email protected]> Cc: Antia Puentes <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* i965: add ARB_texture_barrier supportIlia Mirkin2015-09-232-0/+10
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/gs: Fix extra level of indentation left by the previous commit.Kenneth Graunke2015-09-232-115/+111
| | | | | | | | I left a bunch of code indented a level in the previous patch to make the diff easier to read. But now we should fix that. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/gs: Use new NIR intrinsics.Kenneth Graunke2015-09-234-26/+48
| | | | | | | | | | | | | | | | | | | By performing the vertex counting in NIR, we're able to elide a ton of useless safety checks around every EmitVertex() call: total instructions in shared programs: 3952 -> 3720 (-5.87%) instructions in affected programs: 3491 -> 3259 (-6.65%) helped: 11 HURT: 0 Improves performance in Gl32GSCloth by 0.671742% +/- 0.142202% (n=621) on Haswell GT3e at 1024x768. This should also make it easier to implement Broadwell's "Static Vertex Count" feature someday. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add new GS intrinsics that maintain a count of emitted vertices.Kenneth Graunke2015-09-234-0/+242
| | | | | | | | | | | | | | | | | | | | | | | | This patch also introduces a lowering pass to convert the simple GS intrinsics to the new ones. See the comments above that for the rationale behind the new intrinsics. This should be useful for i965; it's a generic enough mechanism that I could see other drivers potentially using it as well, so I don't feel too bad about putting it in the generic code. v2: - Use nir_after_block_before_jump for the cursor (caught by Jason Ekstrand - I'd mistakenly used nir_after_block when rebasing this code onto the new NIR control flow API). - Remove the old emit_vertex intrinsic at the end, rather than in the middle (requested by Jason). - Use state->... directly rather than locals (requested by Jason). - Report progress from nir_lower_gs_intrinsics() (requested by me). - Remove "Authors:" section from file comment (requested by Michael Schellenberger Costa). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add unit tests for control flow graphs.Kenneth Graunke2015-09-232-0/+169
| | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Acked-by: Connor Abbott <[email protected]>
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