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* egl: fix cast to silence compiler warningBrian Paul2015-03-131-1/+1
| | | | | | | | | | | | | | | | eglcurrent.c: In function '_eglSetTSD': eglcurrent.c:57:4: warning: passing argument 2 of 'tss_set' discards 'const' qualifier from pointer target type [enabled by default] tss_set(_egl_TSD, (const void *) t); ^ In file included from ../../../include/c11/threads.h:72:0, from eglcurrent.c:32: ../../../include/c11/threads_posix.h:357:1: note: expected 'void *' but argument is of type 'const void *' tss_set(tss_t key, void *val) ^ Reviewed-by: Emil Velikov <[email protected]>
* gallivm: (trivial) Fix typo in comment introduced by 70dc8aAlexandre Demers2015-03-131-1/+1
| | | | | | | Fix typo in comment introduced by 70dc8a Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Jose Fonseca <[email protected]>
* mesa: improve ARB_copy_image internal format compat checkSeán de Búrca2015-03-121-21/+130
| | | | | | | | | | | | | | | | | | | | | | The memory layout of compatible internal formats may differ in bytes per block, so TexFormat is not a reliable measure of compatibility. For example, GL_RGB8 and GL_RGB8UI are compatible formats, but GL_RGB8 may be laid out in memory as B8G8R8X8. If GL_RGB8UI has a 3 byte-per-block memory layout, the existing compatibility check will fail. Additionally, the current check allows any two compressed textures which share block size to be used, whereas the spec gives an explicit table of compatible formats. v2: Use a switch instead of array iteration for block class and show the correct GL error when internal formats are mismatched. v3: Include spec citations for new compatibility checks, rearrange check order to ensure that compressed, view-compatible formats return the correct result, and make style fixes. Original commit message amended for clarity. v4: Reformatted spec citations. Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Fix non-determinism in nir_lower_vars_to_ssa().Kenneth Graunke2015-03-121-97/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | Previously, we stored derefs in a hash table, using the malloc'd pointer as the key. Then, we walked through the hash table and generated code, based on the order of the hash table's elements. Memory addresses returned by malloc are pretty much random, which meant that the hash was random, and the hash table's elements would be walked in some random order. This led to successive compiles of the same shader using different variable names and slightly different orderings of phi-nodes. Code could not be diff'd, and the final assembly would sometimes change slightly too. It turns out the only point of the hash table was to avoid inserting the same node multiple times for different dereferences. We never actually searched the hash table! This patch uses an intrusive linked list instead. Since exec_list uses head and tail sentinels, checking prev or next against NULL will tell us whether the node is already in the list. Pair programming with Jason Ekstrand. Signed-off-by: Jason Ekstrand <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* util: Fix foreach_list_typed_safe when exec_node is not at offset 0.Jason Ekstrand2015-03-121-2/+2
| | | | | | | | | | | | | | | | | | | | __next and __prev are pointers to the structure containing the exec_node link, not the embedded exec_node. NULL checks would fail unless the embedded exec_node happened to be at offset 0 in the parent struct. v2: Jason Ekstrand <[email protected]>: Use "(__node)->__field.next != NULL" to check for the end of the list instead of the "&__next->__field != NULL". The former is far more obviously correct as it matches what the non-safe versions do. The original code tried to avoid any use of __next as the client code may delete it during its execution. However, since the looping condition is checked after the iteration clause but before the client code is executed, we know that __node is valid during the looping condition. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use NIR for scalar VS when INTEL_USE_NIR is set.Kenneth Graunke2015-03-121-5/+10
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Add VS output support to nir_setup_outputs().Kenneth Graunke2015-03-121-5/+11
| | | | | | | Adapted from fs_visitor::visit(ir_variable *). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Handle VS inputs in the NIR backend.Kenneth Graunke2015-03-121-1/+22
| | | | | | | | | | (Jason noted that this is not a good long term solution, and we should instead improve nir_lower_io so that this extra set of MOVs is unnecessary. I tend to agree, but decided we could do that as a follow-up improvement.) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Refactor fs_visitor::nir_setup_inputs().Kenneth Graunke2015-03-121-10/+19
| | | | | | | | | | | No functional change. In preparation for supporting vertex shaders, this adds a switch statement on shader stage (since vertex attributes and fragment shader varyings will need different handling). It also renames "varying" to "input", to be more general. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Implement NIR intrinsics for loading VS system values.Kenneth Graunke2015-03-121-0/+51
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add intrinsics for SYSTEM_VALUE_BASE_VERTEX and VERTEX_ID_ZERO_BASEKenneth Graunke2015-03-122-0/+8
| | | | | | | | | Ian and I added these around the time Connor was developing NIR. Now that both exist, we should make them work together! Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir: Lower to registers a bit later.Kenneth Graunke2015-03-121-3/+3
| | | | | | | | | | | We can't safely call nir_optimize() with register present, since several passes called in the loop can't handle registers, and will fail asserts. Notably, nir_lower_vec_alus() and nir_opt_algebraic() really don't want registers. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir: Optimize after nir_lower_var_copies().Kenneth Graunke2015-03-121-0/+3
| | | | | | | | Array variable copy splitting generates a bunch of stuff we want to clean up before proceeding. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Store a pointer to brw_sampler_prog_key_data in the visitor.Kenneth Graunke2015-03-123-35/+33
| | | | | | | | | | | | | | | | | | | The NIR backend hardcodes brw_wm_prog_key at the moment, which won't work when we support scalar VS. We could use get_tex(), but it's a static method. I was going to promote it to fs_visitor, but then realized that both parameters (stage and key) are already members. It then occured to me that we could just set up a pointer in the constructor, and skip having a function altogether. This patch also converts all existing users to use key_tex. v2: Make key_tex a "const brw_sampler_prog_key_data *" instead of non-const; word-wrap some lines. (Review comments from Topi.) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* tnl: HAVE_LE32_VERTS is never defined, remove associated codeBrian Paul2015-03-121-7/+0
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa: move LONGSTRING into generated enums.cBrian Paul2015-03-122-9/+6
| | | | | | enums.c is the only place this directive is needed. Reviewed-by: Matt Turner <[email protected]>
* mesa: remove _ASMAPI, ASMAPIPBrian Paul2015-03-128-63/+44
| | | | Reviewed-by: Ian Romanick <[email protected]>
* mesa: remove _XFORMAPIBrian Paul2015-03-124-64/+56
| | | | Reviewed-by: Ian Romanick <[email protected]>
* swrast: remove _BLENDAPIBrian Paul2015-03-122-16/+13
| | | | | | | _BLENDAPI boils down to __cdecl on Windows, but __cdecl is the default calling convention so this serves no purpose. Reviewed-by: Ian Romanick <[email protected]>
* mesa: use ARRAY_SIZE in _mesa_QueryMatrixxOES()Brian Paul2015-03-121-1/+1
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa: remove register keyword, add const in _mesa_QueryMatrixxOES()Brian Paul2015-03-121-3/+2
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa: reindent querymatrix.cBrian Paul2015-03-121-114/+115
| | | | | | Use 3-space indents, not 4. Move some comments after the case statements. Acked-by: Matt Turner <[email protected]>
* mesa: move fpclassify work-arounds into c99_math.hBrian Paul2015-03-121-50/+1
| | | | | | v2: Use #error in the #else clause, per Jose. Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: Prevent double delete on LLVM 3.6Jose Fonseca2015-03-121-0/+1
| | | | | | | | std::unique_ptr takes ownership of MM, and a double delete could ensure in case of an error, as pointed out by Chris Vine in https://bugs.freedesktop.org/show_bug.cgi?id=89387 Reviewed-by: Chris Vine <[email protected]>
* glx: remove support for non-multithreaded platformsEmil Velikov2015-03-113-29/+2
| | | | | | | | | Implicitly required for a while, although commit 9385c592c68 (mapi: remove u_thread.h) was the one that put the final nail on the coffin. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* glx: remove final reference to THREADSEmil Velikov2015-03-111-4/+0
| | | | | | | | Left over from commit 18db13f5865(mapi: THREADS was always defined, remove it) Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* egl/main: convert thread management to use c11 threadsEmil Velikov2015-03-111-42/+6
| | | | | | | | | Convert the code to use the C11 threads implementation, and nuke the Windows non-pthreads code-path. The c11/threads_win32.h abstraction should be better than the current code. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* egl/main: use c11/threads' mutex directlyEmil Velikov2015-03-1111-111/+47
| | | | | | | Remove the inline wrappers/abstraction layer. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* nir/worklist: Don't change the start index when computing the tail indexJason Ekstrand2015-03-112-7/+7
| | | | Reviewed-by: Mark Janes <[email protected]>
* nir: Optimize a + neg(a)Thomas Helland2015-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | Shader-db i965 instructions: total instructions in shared programs: 1711180 -> 1711159 (-0.00%) instructions in affected programs: 825 -> 804 (-2.55%) helped: 9 HURT: 0 GAINED: 3 LOST: 3 Shader-db NIR instructions: total instructions in shared programs: 606187 -> 606179 (-0.00%) instructions in affected programs: 298 -> 290 (-2.68%) helped: 4 HURT: 0 GAINED: 0 LOST: 0 Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Thomas Helland <[email protected]>
* nir: Optimize (a*b)+(a*c) -> a*(b+c)Thomas Helland2015-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | Shader-db i965 instructions: total instructions in shared programs: 1715894 -> 1710802 (-0.30%) instructions in affected programs: 443080 -> 437988 (-1.15%) helped: 1502 HURT: 13 GAINED: 4 LOST: 4 Shader-db NIR instructions: total instructions in shared programs: 607710 -> 606187 (-0.25%) instructions in affected programs: 208285 -> 206762 (-0.73%) helped: 769 HURT: 8 GAINED: 0 LOST: 0 Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Thomas Helland <[email protected]>
* vbo: improve the code style by adjust the preprocessing c code directivesMarius Predut2015-03-112-42/+34
| | | | | | | | | | Brian Paul review suggestion: there's more macro use here than necessary. Removed and redefine some #define preprocessing directives. Removed the directive input parameter 'T' . No functional changes. Signed-off-by: Marius Predut <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: remove CPU_TO_LE32() for AIXBrian Paul2015-03-111-8/+0
| | | | | | | This is the only remnant of AIX-specific code in Mesa. Probably long unused. Reviewed-by: Ian Romanick <[email protected]>
* mesa: remove #define __volatileBrian Paul2015-03-111-3/+0
| | | | | | Not actually used anwhere in Mesa. Reviewed-by: Ian Romanick <[email protected]>
* mesa: use strdup() instead of _mesa_strdup()Brian Paul2015-03-119-30/+9
| | | | | | | | | We were already using strdup() in various places in Mesa. Get rid of the _mesa_strdup() wrapper. All the callers pass a non-NULL argument so the NULL check isn't needed either. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* st/glx: use strdup() instead of _mesa_strdup()Brian Paul2015-03-111-1/+2
| | | | | Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* xlib: use strdup() instead of _mesa_strdup()Brian Paul2015-03-111-1/+2
| | | | | Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i915: add parens to silence operator precedence warningBrian Paul2015-03-111-1/+1
| | | | Signed-off-by: Brian Paul <[email protected]>
* i965: Fix out-of-bounds accesses into pull_constant_loc arrayIago Toral Quiroga2015-03-111-2/+7
| | | | | | | | | | | | | | The piglit test glsl-fs-uniform-array-loop-unroll.shader_test was designed to do an out of bounds access into an uniform array to make sure that we handle that situation gracefully inside the driver, however, as Ken describes in bug 79202, Valgrind reports that this is leading to an out-of-bounds access in fs_visitor::demote_pull_constants(). Before accessing the pull_constant_loc array we should make sure that the uniform we are trying to access is valid. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79202 Reviewed-by: Matt Turner <[email protected]>
* i965/gen6 gs: Convert brw_imm_ud/brw_imm_d to src_regJordan Justen2015-03-101-7/+7
| | | | | | | | | | | | | | Same idea as this patch, only for gen6_gs_visitor: commit 49a938a265f5959c9b558995cc658f80acb6eb18 Author: Jordan Justen <[email protected]> Date: Fri Feb 20 12:12:25 2015 -0800 i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data Suggested-by: Matt Turner <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Use unsigned for CS/VS atomics pixel mask immediate dataJordan Justen2015-03-101-2/+2
| | | | | | | | | | | | | brw_imm_ud(0xffff) should have been converted to fs_reg(0xffffu) to make sure the uint32_t fs_reg constructor was matched. commit 49a938a265f5959c9b558995cc658f80acb6eb18 Author: Jordan Justen <[email protected]> Date: Fri Feb 20 12:12:25 2015 -0800 i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/gen8: Don't allocate hiz miptree structureJordan Justen2015-03-091-0/+105
| | | | | | | | | | | | | | | | | | | We now skip allocating a hiz miptree for gen8. Instead, we calculate the required hiz buffer parameters and allocate a bo directly. v2: * Update hz_height calculation as suggested by Topi v3: * Bail if we failed to create the bo (Ben) v4: * CEILING => DIV_ROUND_UP * Make sure mt->logical_depth0 being 0 would not cause trouble * Fail if Y tiling is not returned Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67564 Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965/gen7: Don't allocate hiz miptree structureJordan Justen2015-03-091-2/+104
| | | | | | | | | | | | | | | | | | | We now skip allocating a hiz miptree for gen7. Instead, we calculate the required hiz buffer parameters and allocate a bo directly. v2: * Update hz_height calculation as suggested by Topi v3: * Bail if we failed to create the bo (Ben) v4: * CEILING => DIV_ROUND_UP * Make sure mt->logical_depth0 being 0 would not cause trouble * Fail if Y tiling is not returned Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67564 Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965/gen8: Don't rely directly on the hiz miptree structureJordan Justen2015-03-091-3/+3
| | | | | | | | | | | We are still allocating a miptree for hiz, but we only use fields from intel_miptree_aux_buffer. This will allow us to switch over to not allocating a miptree. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965/gen7: Don't rely directly on the hiz miptree structureJordan Justen2015-03-092-6/+7
| | | | | | | | | | | We are still allocating a miptree for hiz, but we only use fields from intel_miptree_aux_buffer. This will allow us to switch over to not allocating a miptree. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965/hiz: Start to separate miptree out from hiz buffersJordan Justen2015-03-099-31/+79
| | | | | | | | | | | | | | | | | | | | | | | Today we allocate a miptree's for the hiz buffer. We needed this in the past because we would point the hardware at offsets of the hiz buffer. Since the hiz format is not documented, this is not a good idea. Since moving to support layered rendering on Gen7+, we no longer point at an offset into the buffer on Gen7+. Therefore, to support hiz on Gen7+, we don't need a full miptree structure allocated. This patch starts to create a new auxiliary buffer structure (intel_miptree_aux_buffer) that can be a more simplistic miptree side-band buffer associated with a miptree. (For example, to serve the needs of the hiz buffer.) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* mesa/scissor: fix typos in debug namesDave Airlie2015-03-101-2/+2
| | | | | | Just noticed this when working on virgl. Signed-off-by: Dave Airlie <[email protected]>
* nvc0: fix wrong max value for driver queriesSamuel Pitoiset2015-03-091-4/+3
| | | | | | | | | | | The maximum value of a Gallium HUD's panel is automatically adjusted when the current value is greater than the max. If we set the pipe_query_driver_info::max_value to UINT64_MAX, the maximum value is never adjusted and this results in a flat line instead of a pretty curve which is correctly scaled. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* i965: Silence GCC maybe-uninitialized warning.Vinson Lee2015-03-091-1/+1
| | | | | | | | | | brw_shader.cpp: In function ‘bool brw_saturate_immediate(brw_reg_type, brw_reg*)’: brw_shader.cpp:618:31: warning: ‘sat_imm.brw_saturate_immediate(brw_reg_type, brw_reg*)::<anonymous union>::ud’ may be used uninitialized in this function [-Wmaybe-uninitialized] reg->dw1.ud = sat_imm.ud; ^ Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i915: Fix GCC unused-but-set-variable warning in release build.Vinson Lee2015-03-091-4/+1
| | | | | | | | | | i915_fragprog.c: In function ‘i915ValidateFragmentProgram’: i915_fragprog.c:1453:11: warning: variable ‘k’ set but not used [-Wunused-but-set-variable] int k; ^ Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
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