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* ac: handle subgroup intrinsicsDaniel Schürmann2018-04-141-29/+40
* ac: add LLVM build functions for subgroup instrinsicsDaniel Schürmann2018-04-142-1/+485
* ac: make ballot and umsb capable of 64bit inputsDaniel Schürmann2018-04-141-9/+25
* nir: lower 64bit subgroup shuffle intrinsicsDaniel Schürmann2018-04-142-13/+56
* nir/spirv: Fix warning and add missing breaks.Daniel Schürmann2018-04-142-0/+4
* nir: use ballot_bit_size when lowering ballot_bitfield_extractDaniel Schürmann2018-04-141-1/+1
* nir: subgroups instructions for 64bit ballot sizesDaniel Schürmann2018-04-141-6/+6
* glsl: #undef THIS macro to fix MSVC buildBrian Paul2018-04-131-0/+5
* glsl: rename 'interface' var to 'iface' to fix MSVC buildBrian Paul2018-04-131-7/+7
* mesa: remove snprintf macro in imports.h to fix MSVC buildBrian Paul2018-04-132-5/+1
* anv: fix number of planes for depth & stencilLionel Landwerlin2018-04-132-1/+5
* gallium: move ddebug, noop, rbug, trace to auxiliary to improve build timesMarek Olšák2018-04-1378-382/+96
* radeonsi: make sure CP DMA is idle at the end of IBsMarek Olšák2018-04-133-2/+16
* gallium/hud: add a simple HUD view that only draws textMarek Olšák2018-04-132-15/+60
* mesa: Include unistd.h in program_lexerDylan Baker2018-04-131-0/+1
* radeonsi: always prefetch later shaders after the draw packetMarek Olšák2018-04-133-26/+75
* radeonsi: emit shader pointers before cache flushes & waitsMarek Olšák2018-04-131-13/+7
* radeonsi/gfx9: don't use the workaround for gather4 + stencilMarek Olšák2018-04-131-2/+11
* radeonsi: disable TC-compat HTILE on Tonga and IcelandMarek Olšák2018-04-131-0/+7
* radeonsi: force 2D tiling on VI only when TC-compat HTILE is really enabledMarek Olšák2018-04-131-9/+7
* radeonsi: don't flush HTILE if there is no HTILE clearMarek Olšák2018-04-131-2/+2
* radeonsi: merge 2 identical if statements in si_clearMarek Olšák2018-04-131-9/+2
* radeonsi: don't do GFX-specific texture decompression for computeMarek Olšák2018-04-131-10/+10
* radeonsi: simplify generating the renderer stringMarek Olšák2018-04-131-11/+8
* winsys/amdgpu: allow local BOs on APUsMarek Olšák2018-04-131-1/+2
* getteximage: assume texture image is empty for non defined levelsJuan A. Suarez Romero2018-04-131-2/+25
* gettextureimage: verify cube map is completeJuan A. Suarez Romero2018-04-131-9/+14
* gettextsubimage: verify zoffset and depth are correctJuan A. Suarez Romero2018-04-131-2/+2
* mesa: free debug messages when destroying the debug stateTimothy Arceri2018-04-131-22/+23
* mesa: fix x86 buildsTimothy Arceri2018-04-131-0/+1
* Fix make checkMarek Olšák2018-04-121-0/+1
* Fix scons buildMarek Olšák2018-04-127-1/+13
* mesa: include mtypes.h lessMarek Olšák2018-04-12177-367/+477
* mesa: include dispatch.h lessMarek Olšák2018-04-1220-20/+0
* radv: Implement VK_EXT_vertex_attribute_divisor.Bas Nieuwenhuizen2018-04-126-11/+50
* ac/surface: Allow S swizzle for displayable surfaces.Bas Nieuwenhuizen2018-04-121-2/+5
* broadcom/vc5: Fix a stray '`' in a comment.Eric Anholt2018-04-121-1/+1
* broadcom/vc5: Update the UABI for in/out syncobjsEric Anholt2018-04-129-90/+55
* broadcom/vc5: Drop the finished_seqno optimization.Eric Anholt2018-04-122-11/+0
* broadcom/vc5: Drop the throttling code.Eric Anholt2018-04-121-9/+0
* broadcom/vc5: Move flush_last_load into load_general, like for stores.Eric Anholt2018-04-121-28/+29
* broadcom/vc5: Rename read_but_not_cleared to loads_pending.Eric Anholt2018-04-121-13/+13
* broadcom/vc5: Refactor the implicit coords/stores_pending logic.Eric Anholt2018-04-121-23/+13
* broadcom/vc5: Emit missing TILE_COORDINATES_IMPLICIT in separate z/s stores.Eric Anholt2018-04-121-5/+16
* broadcom/vc5: Add checks that we don't try to do raw Z+S load/stores.Eric Anholt2018-04-121-0/+8
* broadcom/vc5: Fix MSAA depth/stencil size setup.Eric Anholt2018-04-121-2/+4
* st/va: add VP9 config to enable profile2Leo Liu2018-04-122-1/+5
* radeonsi: use PIPE_FORMAT_P016 format for VP9 profile2Leo Liu2018-04-121-1/+2
* radeon/vcn: add VP9 profile2 supportLeo Liu2018-04-121-0/+16
* vl: add VP9 profile2 supportLeo Liu2018-04-122-1/+3
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