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* broadcom: Add V3D 3.3 gallium driver called "vc5", for BCM7268.Eric Anholt2017-10-1042-2/+9129
| | | | | | | | | | | | | | | | | | | | | | | | | V3D 3.3 is a continuation of the 3D implementation in VC4 (v2.1 and v2.6). V3D 3.3 introduces an MMU (no more CMA allocations) and support for GLES3.1. This driver is not currently conformant, though that will be a target as soon as possible. V3D 3.x parts use a new texture tiling layout common across many Broadcom graphics parts including and the HVS scanout engine. It also massively changes the QPU instructions, introducing a common physical register file (no more A/B split) and half-float instructions, while removing the 4x8 unorm instructions in favor of half-float for talking to fixed function interfaces. Because so much has changed, vc5 is implemented in a separate gallium driver, using only the XML code-generation support from vc4. v2: Fix tile layout for 64bpp textures. Fix texture swizzling for 32-bit returns. Fix up a bit of MRT setup. Sync the simulator to kernel behavior a bit more. Improve uniform debugging code. Rebase on QIR->VIR rename. Move texture state mostly to the CSOs. Improve cache flushing on the simulator. Fix program deletion use-after-frees. Acked-by: Dave Airlie <[email protected]> (uabi plan) Acked-by: Daniel Vetter <[email protected]> (uabi plan)
* broadcom: Add VC5 NIR compiler.Eric Anholt2017-10-1017-0/+7498
| | | | | | | | | | | This is a pretty straightforward fork of VC4's NIR compiler to VC5. The condition codes, registers, and I/O have all changed, making the backend hard to share, though their heritage is still recognizable. v2: Move to src/broadcom/compiler to match intel's layout, rename more "vc5" to "v3d", rename QIR to VIR ("V3D IR") to avoid symbol conflicts with vc4, use new v3d_debug header, add compiler init/free functions, do texture swizzling in NIR to allow optimization.
* broadcom: Add vc5 CLIF dumpingEric Anholt2017-10-103-0/+312
| | | | | | | | This will be usable with "VC5_DEBUG=cl" on the vc5 driver to stream a CLIF file (the Broadcom equivalent of i965's AUB) to stderr. I haven't tested that this is actually usable with the internal CLIF-consuming tools, but is close enough as a baseline and is useful for visually inspecting the command stream.
* broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm.Eric Anholt2017-10-1012-0/+2774
| | | | | | | | | | | | | | | | | Unlike VC4, I've defined an unpacked instruction format with pack/unpack functions to convert to 64-bit encoded instructions. This will let us incrementally put together our instructions and validate them in a more natural way than the QPU_GET_FIELD/QPU_SET_FIELD used to. The pack/unpack unfortuantely are written by hand. While I could define genxml for parts of it, there are many special cases (like operand order of commutative binops choosing which binop is being performed!) and it probably wouldn't come out much cleaner. The disasm unit test ensures that we have the same assembly format as Broadcom's internal tools, other than whitespace changes. v2: Fix automake variable redefinition complaints, add test to .gitignore
* broadcom: Introduce a v3d_debug.h header for vc5 and broadcom Vulkan.Eric Anholt2017-10-103-0/+173
| | | | | | | Unlike vc4, where the compiler and gallium driver live together, for vc5 the compiler will live up in the shared broadcom directory, and need access to the debug flags. Define a set of debug flags and helpers there, so it can be shared between compiler, vc5, and vulkan.
* configure: Add the new "vc5" driver to the list, requiring a simulator.Eric Anholt2017-10-101-1/+1
| | | | | | | | | | | | My intent is to develop the vc5 driver in-tree for some time to build the CL generation and shader compiler code, and keep out-of-tree patches for talking to an actual kernel driver until the kernel driver can be stabilized on the hardware. v2: Define a HAVE_BROADCOM_DRIVERS, like HAVE_INTEL or HAVE_AMD. Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* nir: Move vc4's alpha test lowering to core NIR.Eric Anholt2017-10-109-55/+168
| | | | | | | | | | | | | I've been doing this inside of vc4, but vc5 wants it as well and it may be useful for other drivers (Intel has a related path for pre-gen6 with MRT, and freedreno had a TGSI path for it at one point). This required defining a common enum for the standard comparison functions, but other lowering passes are likely to also want that enum. v2: Add to meson.build as well. Acked-by: Rob Clark <[email protected]>
* mesa: Alphabetize GL_MESA_tile_raster_order in the extensions list.Eric Anholt2017-10-101-1/+1
| | | | trivial, fixes make check.
* mesa: Implement a new GL_MESA_tile_raster_order extension.Eric Anholt2017-10-109-0/+76
| | | | | | | | | | | | | | The intent is to use this extension on vc4 to allow X11 to do overlapping CopyArea() within a pixmap without first blitting the pixmap to a temporary. With associated glamor patches, improves x11perf -copywinwin100 performance on a Raspberry Pi 3 from ~4700/sec to ~5130/sec, and is an even larger boost to uncomposited window movement performance (most copywinwin100 copies don't overlap). v2: Fix glIsEnabled() on the new enums. v3: Drop the local spec since I'm upstreaming the spec. Reviewed-by: Nicolai Hähnle <[email protected]>
* broadcom/vc4: Expose PIPE_CAP_TILE_RASTER_ORDEREric Anholt2017-10-107-20/+71
| | | | | | | | | | | | | | Because vc4 can control the order that tiles are rasterized in, we can use it to implement overlapping blits using normal drawing and GL_ARB_texture_barrier, as long as we can tell the kernel what order to render the tiles in. v2: Fix on the simulator. v3: Add the cap (disabled) to other drivers, add rst docs for the cap. v4: Rebase on PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS v5: Split from the core gallium commit, drop some unnecessary code related to glBlitFramebuffer(), fix a crash with clears before state has been bound.
* gallium: Create a new PIPE_CAP_TILE_RASTER_ORDER for vc4.Eric Anholt2017-10-1018-0/+29
| | | | | | | | | | | | | | | | Because vc4 can control the order that tiles are rasterized in, we can use it to implement overlapping blits using normal drawing and GL_ARB_texture_barrier, as long as we can tell the kernel what order to render the tiles in. This commit introduces the core gallium support, vc4 changes will follow. v2: Fix on the simulator. v3: Add the cap (disabled) to other drivers, add rst docs for the cap. v4: Rebase on PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS v5: Drop vc4 changes from this commit, for clarity. Reviewed-by: Nicolai Hähnle <[email protected]> (v3)
* broadcom/vc4: Implement GL_ARB_texture_barrier.Eric Anholt2017-10-102-1/+12
| | | | | | Improves x11perf -copywinwin100 from ~2000/sec to ~4700/sec. More importantly, this is a prerequisite for the new GL_MESA_tile_raster_order extension.
* mesa: move _mesa_half_is_negative() to half_float.hBrian Paul2017-10-102-6/+8
| | | | | | | | v2: use !! in the function to be explicit about type conversion. Though, gcc generates the same code with or without the logical !!. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* mesa: move _mesa_exec_malloc/free() prototypes to their own headerBrian Paul2017-10-106-7/+41
| | | | | | | | Try to start removing things from the cluttered imports.h file. v2: add new header to Makefile.sources Reviewed-by: Roland Scheidegger <[email protected]>
* i965: minor whitespace fixKenneth Graunke2017-10-101-1/+1
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* mesa: Set new renderbuffers to RGBA4 on all GLES contexts.Eric Anholt2017-10-101-1/+1
| | | | | | | | | Before we were doing RGBA4 on GLES3 only, but as of GLES2 2.0.22 it should be RGBA4 as well. Fixes DEQP functional.state_query.rbo.renderbuffer_internal_format. Tested-by: Matt Turner <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: Expose GL_OES_required_internalformat on GLES contexts.Eric Anholt2017-10-104-38/+74
| | | | | | | | | | | | | | | | | | | | | | | This extension is effectively a backport of GLES3's internalformat handling to GLES 1/2. It guarantees that sized internalformats specified for textures and renderbuffers have at least the specified size stored. That's a pretty minimal requirement, so I think it can be dummy_true and exposed as a standard in Mesa. As a side effect, it also allows GL_RGB565 to be specified as a texture format, not just as a renderbuffer. Mesa had previously been allowing 565 textures, which angered DEQP in the absence of this extension being exposed. v2: Allow 2101010rev with sized internalformats even on GLES3, citing the extension spec. Extend extension checks for GLES2 contexts exposing with texture_float, texture_half_float, and texture_rg. v3: Fix ALPHA/LUMINANCE/LUMINANCE_ALPHA error checking (GLES3 CTS failures) v4: Mark GL_RGB10 non-color-renderable on ES, fix A/L/LA errors on GLES2 with float formats. Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: Only expose GLES's EXT_texture_type_2_10_10_10_REV if supported in HW.Eric Anholt2017-10-105-2/+10
| | | | | | | | | | | | Previously, we were downconverting to 8888 automatically if the hardware didn't suport it. However, with the advent of GL_OES_required_internalformat, we have to actually store the internalformats we advertise support for. And, it seems rather disingenuous to advertise the extension if we don't actually support it. v2: Throw an error when using the format on ES2 without the extension present. Reviewed-by: Nicolai Hähnle <[email protected]>
* vc4: Add support for 5551 textures.Eric Anholt2017-10-102-3/+3
| | | | | This keeps us from promoting them up to 8888, at the cost of not being color-renderable.
* gallium: Add support for 5551 with the 1-bit field in the low bit.Eric Anholt2017-10-104-2/+18
| | | | | | | | | | | | This is how VC4 stores 5551 textures, which we need to support for GL_OES_required_internalformat. v2: Extend commit message, fix svga driver build, add BE ordering from Roland. v3: Rebase on PIPE_FORMAT_R10G10B10X2_UNORM addition. Reviewed-by: Marek Olšák <[email protected]> (v2) Reviewed-by: Nicolai Hähnle <[email protected]> (v2)
* mesa: Add X1B5G5R5 along with A1B5G5R5.Eric Anholt2017-10-105-0/+9
| | | | | | | | | | For supporting RGB5 in hardware with A in the low bit (vc4), we need this format as well. v2: Add proper _mesa_format_matches_format_and_type() support (from Nicolai). Reviewed-by: Nicolai Hähnle <[email protected]> (v1)
* st_api: remove unused get_resource_for_egl_imageNicolai Hähnle2017-10-101-37/+0
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* st/dri: implement createImageFromRenderbuffer(2)Nicolai Hähnle2017-10-104-7/+76
| | | | | | Tested with dEQP-EGL.functional.image.*renderbuffer* tests. Reviewed-by: Eric Anholt <[email protected]>
* egl/dri: remove old left-oversNicolai Hähnle2017-10-101-2/+0
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* egl/dri: use createImageFromRenderbuffer2 when availableNicolai Hähnle2017-10-101-3/+20
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* egl/dri: factor out egl_error_from_dri_image_errorNicolai Hähnle2017-10-101-28/+26
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* st/mesa: don't clobber glGetInternalformat* buffer for GL_NUM_SAMPLE_COUNTSNicolai Hähnle2017-10-101-1/+2
| | | | | | | | | | Applications might pass in a buffer that is sized too large and rely on the extra space of the buffer not being overwritten. Fixes dEQP-GLES31.functional.state_query.internal_format.partial_query.num_sample_counts Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* u_threaded_context: fix a memory leakNicolai Hähnle2017-10-101-7/+8
| | | | | | | | The uploaders can own transfers which need to be unmapped. Destroy them before the final sync (they're not used from the driver thread anyway) so that the transfer_unmap call is processed by the driver. Reviewed-by: Marek Olšák <[email protected]>
* disk_cache: remove unnecessary NULL-pointer guardsNicolai Hähnle2017-10-101-4/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* disk_cache: fix a memory leakNicolai Hähnle2017-10-101-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: whitespace fixNicolai Hähnle2017-10-101-1/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: fix import of EGL images with non-zero level or layerNicolai Hähnle2017-10-105-10/+28
| | | | | | | | | | In GL state, textures created from EGL images look like plain 2D textures with a single level, so we use the existing layer_override facility and add an analogous level_override one. Fixes dEQP-EGL.functional.image.create.gles2_cubemap_{positive,negative}_{x,y,z}_rgba_texture Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: fix switching from surface-based to non-surface-based texturesNicolai Hähnle2017-10-106-9/+14
| | | | | | | | | This can happen with surface-based texture objects derived from EGL images, since those aren't immutable. Fixes tests in dEQP-EGL.functional.sharing.gles2.multithread.random.images.teximage2d.* and others Reviewed-by: Marek Olšák <[email protected]>
* glsl/linker: add check for compute shared memory sizeNicolai Hähnle2017-10-103-6/+23
| | | | | | | | | | Unlike uniforms, the limit on shared memory size is not called out explicitly in the list of things that cause linker errors, but presumably that's just an oversight in the spec. Fixes dEQP-GLES31.functional.debug.negative_coverage.{callbacks,get_error,log}.compute.exceed_shared_memory_size_limit Reviewed-by: Timothy Arceri <[email protected]>
* etnaviv: update HW headers and fix provoking vertexLucas Stach2017-10-106-47/+67
| | | | | | | | | | Now that the real meaning of the 2 bits in PA_SYSTEM_MODE is known, we can set them according to the rasterizer state, which fixes uses that are setting provoking vertex first. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: remove flat shading workaroundLucas Stach2017-10-101-5/+1
| | | | | | | | | | It turned out not to be a hardware bug, but the shader compiler emitting wrong varying component use information. With that fixed we can turn flat shading back on. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: fix varying interpolationLucas Stach2017-10-101-12/+10
| | | | | | | | | | | | It seems that newer cores don't use the PA_ATTRIBUTES to decide if the varying should bypass the flat shading, but derive this from the component use. This fixes flat shading on GC880+. VARYING_COMPONENT_USE_POINTCOORD is a bit of a misnomer now, as it isn't only used for pointcoords, but missing a better name I left it as-is. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: fix bogus flush requests in transfer handlingLucas Stach2017-10-101-5/+10
| | | | | | | | | | The logic to decide if we need to flush the GPU command stream was broken and hard to reason about. Fix and clarify this. Fixes the data sync subtests from piglit arb_vertex_buffer_object. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* i965/tes: account for the fact that dvec3/4 inputs take two slotsIago Toral Quiroga2017-10-101-2/+7
| | | | | | | | | | | | | | | | | | | When computing the total size of the URB for tessellation evaluation inputs we were not accounting for this, and instead we were always assuming that each input would take a single vec4 slot, which could lead to computing a smaller read size than required. Specifically, this is a problem when the last input is a dvec3/4 such that its XY components are stored in the the second half of a payload register (which can happen if the offset for the input in the URB is not 64-bit aligned because there are 32-bit inputs mixed in) and the ZW components in the first half of the next, as in this case we would fail to account for the extra slot required for the ZW components. Fixes (requires another fix in CTS currently in review): KHR-GL45.enhanced_layouts.varying_locations KHR-GL45.enhanced_layouts.varying_array_locations Reviewed-by: Kenneth Graunke <[email protected]>
* anv: fix null pointer dereferenceTapani Pälli2017-10-101-0/+1
| | | | | | | | CID: 1419033 Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* radv: export KHR_relaxed_block_layoutDave Airlie2017-10-101-0/+4
| | | | | | | | This seems to pass all the cts tests it enables. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nv50/ir: fix 64-bit integer shiftsIlia Mirkin2017-10-091-1/+3
| | | | | | | | | TGSI was adjusted to always pass in 64-bit integers but nouveau was left with the old semantics. Update to the new thing. Fixes: d10fbe5159 (st/glsl_to_tgsi: fix 64-bit integer bit shifts) Reported-by: Karol Herbst <[email protected]> Cc: [email protected]
* i965: silence coverity warningLionel Landwerlin2017-10-101-1/+1
| | | | | | | | | Also makes this statement a bit clearer. CID: 1418920 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Antia Puentes <[email protected]>
* anv: Do not assert() on VK_ATTACHMENT_UNUSEDJózef Kucia2017-10-091-1/+2
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Nanley Chery <[email protected]> Cc: [email protected]
* spirv: Fix SpvOpAtomicISubJózef Kucia2017-10-091-0/+1
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Cc: [email protected]
* glsl: tidy up IR after loop unrollingTimothy Arceri2017-10-101-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | c7affbf6875622a enabled GLSLOptimizeConservatively on some drivers. The idea was to speed up compile times by running the GLSL IR passes only once each time do_common_optimization() is called. However loop unrolling can create a big mess and with large loops can actually case compile times to increase significantly due to a bunch of redundant if statements being propagated to other IRs. Here we make sure to clean things up before moving on. There was no measureable difference in shader-db compile times, but it makes compile times of some piglit tests go from a couple of seconds to basically instant. The shader-db results seemed positive also: Totals: SGPRS: 2829456 -> 2828376 (-0.04 %) VGPRS: 1720793 -> 1721457 (0.04 %) Spilled SGPRs: 7707 -> 7707 (0.00 %) Spilled VGPRs: 33 -> 33 (0.00 %) Private memory VGPRs: 3140 -> 2060 (-34.39 %) Scratch size: 3308 -> 2180 (-34.10 %) dwords per thread Code Size: 79441464 -> 79214616 (-0.29 %) bytes LDS: 436 -> 436 (0.00 %) blocks Max Waves: 558670 -> 558571 (-0.02 %) Wait states: 0 -> 0 (0.00 %) Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* glsl: make loop unrolling more like the nir unrolling pathTimothy Arceri2017-10-103-67/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The old code assumed that loop terminators will always be at the start of the loop, resulting in otherwise unrollable loops not being unrolled at all. For example the current code would unroll: int j = 0; do { if (j > 5) break; ... do stuff ... j++; } while (j < 4); But would fail to unroll the following as no iteration limit was calculated because it failed to find the terminator: int j = 0; do { ... do stuff ... j++; } while (j < 4); Also we would fail to unroll the following as we ended up calculating the iteration limit as 6 rather than 4. The unroll code then assumed we had 3 terminators rather the 2 as it wasn't able to determine that "if (j > 5)" was redundant. int j = 0; do { if (j > 5) break; ... do stuff ... if (bool(i)) break; j++; } while (j < 4); This patch changes this pass to be more like the NIR unrolling pass. With this change we handle loop terminators correctly and also handle cases where the terminators have instructions in their branches other than a break. V2: - fixed regression where loops with a break in else were never unrolled in v1. - fixed confusing/wrong naming of bools in complex unrolling. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* glsl: check if induction var incremented before use in terminatorTimothy Arceri2017-10-101-0/+38
| | | | | | | | | | | | | | | | | | do-while loops can increment the starting value before the condition is checked. e.g. do { ndx++; } while (ndx < 3); This commit changes the code to detect this and reduces the iteration count by 1 if found. V2: fix terminator spelling Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Elie Tournier <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* glsl: don't drop instructions from unreachable terminators continue branchTimothy Arceri2017-10-102-8/+27
| | | | | | | | | | | | | These instructions will be executed on every iteration of the loop we cannot drop them. V2: - move removal of unreachable terminators from the terminator list to the same place they are removed from the IR as suggested by Nicolai. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* meson: build classic swrastDylan Baker2017-10-092-0/+33
| | | | | | | | This adds support for building the classic swrast implementation. This driver has been tested with glxinfo and glxgears. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
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