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* i965/fs: Hook up coherent framebuffer reads to the NIR front-end.Francisco Jerez2016-08-251-2/+20
* i965/fs: Remove special casing of framebuffer writes in scheduler code.Francisco Jerez2016-08-251-2/+1
* i965/fs: Don't CSE render target messages with different target index.Francisco Jerez2016-08-251-0/+1
* i965/fs: Define logical framebuffer read opcode and lower it to physical reads.Francisco Jerez2016-08-254-0/+28
* i965/fs: Define framebuffer read virtual opcode.Francisco Jerez2016-08-255-0/+29
* i965/disasm: Fix RC message type strings on Gen7+.Francisco Jerez2016-08-251-3/+25
* i965/eu: Add codegen support for the Gen9+ render target read message.Francisco Jerez2016-08-253-0/+40
* i965/eu: Take into account the target cache argument in brw_set_dp_read_message.Francisco Jerez2016-08-252-4/+18
* i965: Flip the non-coherent framebuffer fetch extension bit on G45-Gen8 hardw...Francisco Jerez2016-08-251-0/+3
* i965: Implement glBlendBarrier.Francisco Jerez2016-08-251-0/+20
* i965: Upload surface state for non-coherent framebuffer fetch.Francisco Jerez2016-08-253-0/+94
* i965: Implement support for overriding the texture target in brw_emit_surface...Francisco Jerez2016-08-251-4/+50
* i965: Massage argument list of brw_emit_surface_state().Francisco Jerez2016-08-251-11/+11
* i965: Add missing has_surface_tile_offset flag to the Gen8+ device info struc...Francisco Jerez2016-08-251-0/+2
* i965: Return the correct layout from get_isl_dim_layout for pre-ILK cube text...Francisco Jerez2016-08-251-2/+5
* i965: Factor out isl_surf_dim/isl_dim_layout calculation into functions.Francisco Jerez2016-08-252-23/+55
* i965: Resolve color for non-coherent FB fetch at UpdateState time.Francisco Jerez2016-08-251-0/+17
* i965: Return whether the miptree was resolved from intel_miptree_resolve_colo...Francisco Jerez2016-08-252-5/+9
* i965/fs: Translate nir_intrinsic_load_output on a fragment output.Francisco Jerez2016-08-251-0/+20
* i965/fs: Allocate fragment output temporaries on demand.Francisco Jerez2016-08-251-46/+27
* i965/fs: Rework representation of fragment output locations in NIR.Francisco Jerez2016-08-253-10/+55
* i965: Fix undefined signed overflow in INTEL_MASK for bitfields of 31 bits.Francisco Jerez2016-08-251-1/+1
* i965/fs: Special-case nir_intrinsic_store_output for the fragment shader.Francisco Jerez2016-08-251-0/+15
* i965/fs: Implement non-coherent framebuffer fetch using the sampler unit.Francisco Jerez2016-08-252-0/+94
* i965/fs: Emit interpolation setup if non-coherent framebuffer fetch is in use.Francisco Jerez2016-08-251-1/+2
* i965/fs: Force per-sample dispatch if the shader reads from a multisample FBO.Francisco Jerez2016-08-251-1/+2
* i965: Allocate space in the binding table for non-coherent FB fetch.Francisco Jerez2016-08-254-7/+16
* i965/fs: Add brw_wm_prog_key bit specifying whether FB reads should be coherent.Francisco Jerez2016-08-252-0/+7
* i965/fs: Get rid of fs_visitor::do_dual_src.Francisco Jerez2016-08-253-26/+14
* nir: Handle FB fetch outputs correctly in nir_lower_io_to_temporaries.Francisco Jerez2016-08-251-0/+21
* nir: Pass through fb_fetch_output and OutputsRead from GLSL IR.Francisco Jerez2016-08-252-0/+11
* vc4: Add support for fddx/fddyEric Anholt2016-08-251-0/+52
* vc4: Add register allocation support for MUL output rotation.Eric Anholt2016-08-252-0/+14
* vc4: Add support for MUL output rotation.Eric Anholt2016-08-256-0/+51
* vc4: Add support for the 2-bit LOAD_IMM variants.Eric Anholt2016-08-256-0/+58
* vc4: Add QPU scheduling to handle MUL rotate sources.Eric Anholt2016-08-251-0/+13
* vc4: Add disassembly for constant MUL rotatesEric Anholt2016-08-251-9/+11
* vc4: Add real validation for MUL rotation.Eric Anholt2016-08-252-10/+43
* vc4: Add a QIR value for the QPU element register.Eric Anholt2016-08-254-0/+8
* i965: Respect miptree offsets in intel_readpixels_tiled_memcpy()Chad Versace2016-08-251-17/+4
* i965: Fix miptree layout for EGLImage-based renderbuffersChad Versace2016-08-251-0/+13
* intel: Flatten the makefile structureJason Ekstrand2016-08-258-182/+189
* isl/tests: Use a longer path for isl.hJason Ekstrand2016-08-251-2/+2
* intel/isl/gen9: Only use the magic 1D alignment for GEN9_1D surfacesJason Ekstrand2016-08-251-1/+1
* intel/isl: Pass the dim_layout into choose_alignment_elJason Ekstrand2016-08-2511-13/+24
* intel/isl: Use DIM_LAYOUT_GEN4_2D for tiled 1-D surfaces on SKLJason Ekstrand2016-08-251-5/+23
* nir/phi_builder: Don't recurse in value_get_block_defJason Ekstrand2016-08-251-29/+36
* nir: Walk blocks in source code order in lower_vars_to_ssa.Matt Turner2016-08-252-106/+106
* radeonsi: don't use allocas for arrays with LLVM 3.8Marek Olšák2016-08-251-1/+3
* gallium/radeon: unify and simplify checking for an empty gfx IBMarek Olšák2016-08-253-27/+23
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