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* nv50/ir: add precise field to InstructionKarol Herbst2017-07-212-0/+3
| | | | | | | v4: initialize field with NULL Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Pierre Moreau <[email protected]>
* st/glsl_to_tgsi: don't optimize mul+add to mad if expression is preciseKarol Herbst2017-07-211-1/+1
| | | | | Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/docs: add precise instruction modifierKarol Herbst2017-07-211-1/+10
| | | | | | | | v4: add comment about intermediate rounding step to MAD Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* tgsi/text: parse _PRECISE modifierKarol Herbst2017-07-211-3/+14
| | | | | | | | v2: use str_match_no_case to fix _SAT_PRECISE detection v4: usd is_digit_alpha_underscore to match end of mods Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi: populate preciseKarol Herbst2017-07-218-30/+51
| | | | | | | | | Only implemented for glsl->tgsi. Other converters just set precise to 0. v2: remove precise paramter from ureg_tex_insn and ureg_memory_insn Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/glsl_to_tgsi: handle precise modifierKarol Herbst2017-07-211-0/+13
| | | | | | | | | all subexpression inside an ir_assignment needs to be tagged as precise. v2: make precise handling more global inside the visitor Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi/dump: print _PRECISE modifier on InstructionsKarol Herbst2017-07-211-0/+4
| | | | | Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi: add precise flag to tgsi_instructionKarol Herbst2017-07-212-1/+3
| | | | | | Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* i965: Set lower_vote_trivial in vector_nir_options_gen6 too.Kenneth Graunke2017-07-211-0/+1
| | | | | | There's a second struct for Gen6+. Reviewed-by: Matt Turner <[email protected]>
* radv: reset non-syncobj semaphore context after wait.Dave Airlie2017-07-221-0/+2
| | | | | | | | | | | When I ported from libdrm, I forgot to add the line to reset the sem, we just need to reset the context. This fixes a regression in DOOM. Fixes: 9ac1432a571 ("radv: port to new libdrm API.") Reported-by: Grazvydas Ignotas <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* st/mesa: add destroy_drawable interfaceCharmaine Lee2017-07-207-3/+123
| | | | | | | | | | | | | | | With this patch, the st manager will maintain a hash table for the active framebuffer interface objects. A destroy_drawable interface is added to allow the state tracker to notify the st manager to remove the associated framebuffer interface object from the hash table, so the associated framebuffer and its resources can be deleted at framebuffers purge time. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101829 Fixes: 147d7fb772a ("st/mesa: add a winsys buffers list in st_context") Tested-by: Brad King <[email protected]> Tested-by: Gert Wollny <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* radv: rebase radv_entrypoints_gen.py on anv_entrypoints_gen.pyDylan Baker2017-07-212-275/+287
| | | | | | | | | | | | | The two generators forked from each other, and they remain basically the same. This rebases the radv version on the anv version, but with the radv changes ported over. The result is that we get rid of the "cat |" madness and gain mako, correct "generated by" attributions, and write files out directly. The only differences between the output is whitespace and comments. Signed-off-by: Dylan Baker <[email protected]> Acked-by: Dave Airlie <[email protected]>
* i965/miptree: Clean-up unusedTopi Pohjolainen2017-07-2214-1646/+96
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Switch remaining surfaces to islTopi Pohjolainen2017-07-222-93/+41
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Drop miptree_array_layout in get_isl_dim_layout()Topi Pohjolainen2017-07-223-11/+8
| | | | | | | | | | | | | This was only needed for checking gen6 stencil which is already using isl. One could delete GEN6_HIZ_STENCIL layout altogether but that will be gone with the rest after a while anyway. The dim_layout converter is needed even after transition to isl when setting up surface states - see brw_emit_surface_state(). Hence dropping the unneeded argument separately. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Relax size alignment for linear surfacesTopi Pohjolainen2017-07-221-1/+6
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Store compression flag also for isl basedTopi Pohjolainen2017-07-221-0/+1
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Check tex image allocation failuresTopi Pohjolainen2017-07-221-0/+2
| | | | | | | | | | | | | | allowing graceful failure instead of crash on assert later on. This can be hit, for example, on SNB when trying to allocate 8kx8k CUBE_MAP against isl: x-tiled buffer size becomes 2421161984 exceeding the maximum of 1 << 31 == 2147483648. Another way to hit this on SNB is with multisampling of over 64-bit formats. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* main/teximage: Even on failure use valid format for init()Topi Pohjolainen2017-07-221-1/+1
| | | | | | | | | Otherwise init_teximage_fields_ms() (called by _mesa_init_teximage_fields()) will always assert as it can't find valid base format. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl/gen7: Don't allow multisampled surfaces with valign2Topi Pohjolainen2017-07-221-19/+23
| | | | | | | | | | | | | | | | | There is the same constraintg later on as assert in isl_gen7_choose_image_alignment_el() so catch it earlier in order to return error instead of crash. Needed to avoid crashes with piglits on IVB and HSW: arb_internalformat_query2.image_format_compatibility_type pname checks arb_internalformat_query2.all internalformat_<x>_type pname checks arb_internalformat_query2.max dimensions related pname checks arb_copy_image.arb_copy_image-formats --samples=2/4/6/8 arb_texture_float.multisample-fast-clear gl_arb_texture_float Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl/gen7: Allow msaa with signed integer formatsTopi Pohjolainen2017-07-221-2/+3
| | | | | | | | | | | | | These formats are already allowed by the i965 GL driver, and the feature seems to work just fine. There are tests for multisampled rendering in piglit: tests/spec/ext_framebuffer_multisample which can be patched to try 16I/32I in addition to GL_RGBA8I. IvyBridge passed all tests with all sample numbers. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl/gen7: Allow msaa with 128-bit formatsTopi Pohjolainen2017-07-221-4/+7
| | | | | | | | | | | | | | These formats are already allowed by the i965 GL driver, and the feature seems to work just fine. There are tests for multisampled rendering in piglit: tests/spec/ext_framebuffer_multisample which can be patched to try GL_RGBA16F/32F/16I/16UI/32I/32UI in addition to GL_RGBA/8I. IvyBridge passed all tests with all sample numbers and even with 128-bit formats. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl: Allow 1D surfaces with compressed formatsTopi Pohjolainen2017-07-221-1/+1
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl: Align non-tiled horizontally by cache lineTopi Pohjolainen2017-07-221-1/+15
| | | | | | | in order to support blit engine. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree/gen4: Prepare x-tiled fallback for isl basedTopi Pohjolainen2017-07-221-6/+20
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Prepare non-tiled fallback for isl basedTopi Pohjolainen2017-07-221-0/+36
| | | | | | | See brw_miptree_choose_tiling(). Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Prepare has_color_unresolved() for isl basedTopi Pohjolainen2017-07-221-1/+5
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* gallivm: handle call attributes for llvm < 4.0 in lp_add_function_attrRoland Scheidegger2017-07-211-3/+7
| | | | | | | | | | | | | | | | | | | We had some caller using LLVMAddInstrAttributes, which couldn't be converted to lp_add_function_attr, because attributes were only handled for functions in this case, so fix this. For llvm >= 4.0, this already works correctly. (radeonsi seems to avoid setting call site attributes prior to llvm 4.0, the patch then citing it doesn't work when calling intrinsics. But at least for calling external functions we always used that, albeit only for actual call attributes, not call parameter attributes, though some quick test shows llvm seems to handle that as well. The attribute index is sort of iffy though, since attribute 0 of the call is the actual function, attribute 1 corresponds to the first parameter of the called function.) (Verified with GALLIVM_DEBUG=dumpbc plus llvm-dis that the correct attributes are shown for calls, both for llvm 4.0 and 3.3.) Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* radv: Generate storage image descriptors unconditionallyAlex Smith2017-07-221-4/+1
| | | | | | | | | | | | | We can also use storage images internally for resolves, which don't require TRANSFER_DST usage on the image, so currently we may not create the needed descriptors. Just create these descriptors unconditionally. Fixes: 0e1886efb9e ("radv: Fix descriptors for cube images with VK_IMAGE_USAGE_STORAGE_BIT") Reported-by: Grazvydas Ignotas <[email protected]> Signed-off-by: Alex Smith <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* swr/rast: quit using linux-specific gettid()Tim Rowley2017-07-212-4/+3
| | | | | | | | | | | | | Linux-specific gettid() syscall shouldn't be used in portable code. Fix does assume a 1:1 thread:LWP architecture, but works for our current target platforms and can be revisited later if needed. Fixes unresolved symbol in linux scons builds. v2: add comment in code about the 1:1 assumption. Cc: [email protected] Reviewed-by: Bruce Cherniak <[email protected]>
* radv: initial support for shared semaphores (v2)Dave Airlie2017-07-216-71/+359
| | | | | | | | | | | | | | | | | | | This adds support for sharing semaphores using kernel syncobjects. Syncobj backed semaphores are used for any semaphore which is created with external flags, and when a semaphore is imported, otherwise we use the current non-kernel semaphores. Temporary imports from syncobj fd are also available, these just override the current user until the next wait, when the temp syncobj is dropped. v2: allocate more chunks upfront, fix off by one after previous refactor of syncobj setup, remove unnecessary null check. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/winsys: add syncobj hooksDave Airlie2017-07-212-0/+44
| | | | | | | | This just adds syncobj create/destroy/export/import paths into the winsys interface. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/gpu: add code to detect if kernel supports sync objects.Dave Airlie2017-07-212-0/+10
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* swr/rast: fix memory paths for avx512 optimized avx/sseTim Rowley2017-07-212-10/+10
| | | | | | | Source/destination will not be AVX512 aligned, use the unaligned load/store intrinsics. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: cache line align hottile buffersTim Rowley2017-07-211-3/+3
| | | | | | Prevents unalignment crashes with avx512 code on gcc/clang. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: simdlib changes for clang/gccTim Rowley2017-07-212-10/+35
| | | | | | Tested with clang-4.0 and gcc-6.3. Reviewed-by: Bruce Cherniak <[email protected]>
* etnaviv: Avoid duplicates in formats tableWladimir J. van der Laan2017-07-211-5/+1
| | | | | | | | | | | | | | Remove the following duplicates from the formats table: - R8G8B8A8_UNORM (V_,_T) - R8G8B8X8_UNORM (_T,_T) - DXT3_RGBA (_T,_T) Only the first has an effect because the _T overrides the V_ initializer, the latter two were harmless duplications of the same. Signed-off-by: Wladimir J. van der Laan <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
* etnaviv: Add support for ETC2 texture compressionWladimir J. van der Laan2017-07-212-1/+22
| | | | | | | | | | | | | | | | Add support for ETC2 compressed textures in the etnaviv driver. One step closer towards GL ES 3 support. For now, treat SRGB and RGB formats the same. It looks like these are distinguished using a different bit in sampler state, and not part of the format, but I have not yet been able to confirm this for sure. (Only enabled on GC3000+ for now, as the GC2000 ETC2 decoder implementation is buggy and we don't work around that) Signed-off-by: Wladimir J. van der Laan <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
* gallium/util: Implement util_format_is_etcWladimir J. van der Laan2017-07-211-0/+13
| | | | | | | | | This is the equivalent of util_format_is_s3tc, but for ETC. Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
* Android: fix spirv_info.c generationChih-Wei Huang2017-07-211-5/+2
| | | | | | | | | | | | | | | | | It's incorrect to use $(LOCAL_PATH) in makefile recipes since it's changing. The typical way to handle it is to use private variable. Fortunately in this case we can just simplify them to $^. See further: https://patchwork.freedesktop.org/patch/167718/ Also simplify LOCAL_GENERATED_SOURCES. Fixes: 2dd4e2ec (spirv: Generate spirv_info.c) Signed-off-by: Chih-Wei Huang <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* android: fix libmesa_nir buildTapani Pälli2017-07-211-0/+1
| | | | | | | current build did not find required include 'spirv_info.h' Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* nir: Optimize find_lsb/imsb/umsb error checksMatt Turner2017-07-201-0/+11
| | | | | | | | Two of the ARB_shader_ballot piglit tests hit the find_lsb case, removing some of the noise allowed me to better debug the test when it was failing. Reviewed-by: Connor Abbott <[email protected]>
* i965/fs: Match destination type to size for ballotMatt Turner2017-07-202-2/+6
| | | | No use in taking a 64-bit value when we know the high 32-bits are zero.
* nir: Reduce destination size of ballot intrinsic when possibleMatt Turner2017-07-203-0/+21
| | | | | | | | | Some hardware, like i965, doesn't support group sizes greater than 32. In that case, we can reduce the destination size of the ballot intrinsic, which will simplify our code generation. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Enable ARB_shader_ballot on Gen8+Matt Turner2017-07-201-0/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Implement ARB_shader_ballot operationsMatt Turner2017-07-203-0/+48
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Do not move MOVs writing the flag outside of control flowMatt Turner2017-07-201-2/+4
| | | | | | | | | | | | | | | | | | | The implementation of ballotARB() will start by zeroing the flags register. So, a doing something like if (gl_SubGroupInvocationARB % 2u == 0u) { ... = ballotARB(true); [...] } else { ... = ballotARB(true); [...] } (like fs-ballot-if-else.shader_test does) would generate identical MOVs to the same destination (the flag register!), and we definitely do not want to pull that out of the control flow. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Handle explicit flag sources in flags_read()Francisco Jerez2017-07-201-4/+5
| | | | | | | The implementations of the ARB_shader_ballot intrinsics will explicitly read the flag as a source register. Reviewed-by: Matt Turner <[email protected]>
* nir: Add pass to scalarize read_invocation/read_first_invocationMatt Turner2017-07-203-1/+114
| | | | | | | i965 will want these to be scalar operations. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Add system values from ARB_shader_ballotMatt Turner2017-07-207-4/+84
| | | | | | | | | | | | | We already had a channel_num system value, which I'm renaming to subgroup_invocation to match the rest of the new system values. Note that while ballotARB(true) will return zeros in the high 32-bits on systems where gl_SubGroupSizeARB <= 32, the gl_SubGroup??MaskARB variables do not consider whether channels are enabled. See issue (1) of ARB_shader_ballot. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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