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Author
Age
Files
Lines
*
amd/common: add ac_vgt_gs_mode() helper
Samuel Pitoiset
2017-12-18
4
-55
/
+42
*
amd/common: add ac_get_cb_shader_mask() helper
Samuel Pitoiset
2017-12-18
4
-66
/
+40
*
Revert "radv: do not load unused gl_LocalInvocationID/gl_WorkGroupID components"
Samuel Pitoiset
2017-12-18
1
-5
/
+2
*
radv: port merge tess info from anv
Dave Airlie
2017-12-18
1
-0
/
+40
*
radv: Add external fence support.
Bas Nieuwenhuizen
2017-12-18
2
-0
/
+22
*
radv: Implement VK_KHR_external_fence_fd.
Bas Nieuwenhuizen
2017-12-18
2
-0
/
+48
*
radv: Implement fences based on syncobjs.
Bas Nieuwenhuizen
2017-12-18
3
-15
/
+109
*
amd/common: Add detection of the syncobj wait/signal/reset ioctls.
Bas Nieuwenhuizen
2017-12-18
2
-0
/
+2
*
radv: Add syncobj signal/reset/wait to winsys.
Bas Nieuwenhuizen
2017-12-18
2
-0
/
+44
*
android: fix vulkan driver build
Tapani Pälli
2017-12-18
1
-2
/
+3
*
r600: export robust buffer access
Dave Airlie
2017-12-18
1
-1
/
+1
*
r600: export GLSL 430
Dave Airlie
2017-12-18
1
-1
/
+1
*
r600/cs: add compute support to caps
Dave Airlie
2017-12-18
1
-2
/
+2
*
r600: always flush between gfx and compute
Dave Airlie
2017-12-18
5
-0
/
+21
*
r600: fix unused variable warning
Dave Airlie
2017-12-18
1
-1
/
+0
*
radv: Fix multi-layer blits.
Bas Nieuwenhuizen
2017-12-18
1
-25
/
+24
*
freedreno/a5xx: add a5xx blitter
Rob Clark
2017-12-17
8
-1
/
+498
*
freedreno: add generic blitter
Rob Clark
2017-12-17
7
-2
/
+161
*
freedreno: add non-draw batches for compute/blit
Rob Clark
2017-12-17
12
-32
/
+82
*
freedreno: track staging and shadow perf ctrs for the HUD
Rob Clark
2017-12-17
5
-0
/
+16
*
freedreno: staging upload transfers
Rob Clark
2017-12-17
3
-43
/
+135
*
freedreno: update generated headers
Rob Clark
2017-12-17
7
-63
/
+334
*
anv: Remove unused variable.
Bas Nieuwenhuizen
2017-12-17
1
-2
/
+0
*
radeonsi: don't call force_dcc_off for buffers
Marek Olšák
2017-12-16
1
-1
/
+1
*
isl: Don't require VALIGN_2 for R32G32B32_FLOAT on Haswell.
Kenneth Graunke
2017-12-15
1
-1
/
+3
*
radeon/uvd: add and manage render picture list
Boyuan Zhang
2017-12-15
1
-4
/
+25
*
radeon/vcn: add and manage render picture list
Boyuan Zhang
2017-12-15
1
-4
/
+24
*
vl: remove is idr flag
Boyuan Zhang
2017-12-15
1
-1
/
+0
*
st/va: directly use idr pic flag
Boyuan Zhang
2017-12-15
1
-5
/
+3
*
radeon/vce: determine idr by pic type
Boyuan Zhang
2017-12-15
1
-1
/
+1
*
radeon/vcn: determine idr by pic type
Boyuan Zhang
2017-12-15
1
-1
/
+1
*
util: scons: wire up the sha1 test
Emil Velikov
2017-12-15
1
-0
/
+7
*
swr/rast: Move more RTAI handling out of binner
Tim Rowley
2017-12-15
2
-12
/
+2
*
swr/rast: EXTRACT2 changed from vextract/vinsert to vshuffle
Tim Rowley
2017-12-15
3
-61
/
+32
*
swr/rast: Fix cache of API thread event manager
Tim Rowley
2017-12-15
1
-1
/
+1
*
swr/rast: Replace VPSRL with LSHR
Tim Rowley
2017-12-15
4
-41
/
+4
*
swr/rast: Rework thread binding parameters for machine partitioning
Tim Rowley
2017-12-15
7
-88
/
+322
*
swr/rast: Pull of RTAI gather & offset out of clip/bin code
Tim Rowley
2017-12-15
7
-146
/
+203
*
swr/rast: Remove no-op VBROADCAST of vID
Tim Rowley
2017-12-15
1
-2
/
+2
*
swr/rast: SIMD16 Fetch - Fully widen 32-bit integer vertex components
Tim Rowley
2017-12-15
4
-17
/
+109
*
swr/rast: Replace INSERT2 vextract/vinsert with JOIN2 vshuffle
Tim Rowley
2017-12-15
3
-105
/
+30
*
swr/rast: SIMD16 Fetch - Fully widen 16-bit float vertex components
Tim Rowley
2017-12-15
1
-7
/
+48
*
swr/rast: SIMD16 Fetch - Fully widen 32-bit float vertex components
Tim Rowley
2017-12-15
4
-32
/
+194
*
swr/rast: Pass prim to ClipSimd
Tim Rowley
2017-12-15
1
-5
/
+5
*
swr/rast: Pull most of the VPAI manipulation out of the binner/clipper
Tim Rowley
2017-12-15
7
-158
/
+177
*
swr/rast: Move GatherScissors to header
Tim Rowley
2017-12-15
2
-127
/
+127
*
swr/rast: Rewrite Shuffle8bpcGatherd using shuffle
Tim Rowley
2017-12-15
1
-182
/
+62
*
swr/rast: Convert gather masks to Nx1bit
Tim Rowley
2017-12-15
2
-40
/
+14
*
swr/rast: WIP - Widen fetch shader to SIMD16
Tim Rowley
2017-12-15
1
-27
/
+689
*
swr/rast: Corrections to multi-scissor handling
Tim Rowley
2017-12-15
1
-88
/
+88
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