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* mesa: Add a copy of the Khronos gl.xml (SVN #31705).Eric Anholt2015-12-011-0/+45348
| | | | | | | | The intention here is to keep a pristine copy of the upstream gl.xml that can be updated at any time with a new version, and use that to generate Mesa code from instead of our private XML. Reviewed-by: Ian Romanick <[email protected]>
* mesa: Cut enum_strings.cpp test down to a few hand-chosen enums.Eric Anholt2015-12-011-1822/+36
| | | | | | | | | | | | | | | | The previous contents appeared to be the output of some form of code generation for all enums, with a few entries hand-edited to deal with oddness. The downside to this was that when an enum gets promoted from vendor to _EXT or _EXT to _ARB or _ARB to core, make check starts failing even when the commiter has done nothing wrong. Instead of black-box testing the code generation, pick a few enums that intentionally poke the interesting cases of code generation. People editing the code generator should be diffing the generated code anyway. This should catch when they fail to do so, without throwing false negatives when people update the GL XML. Reviewed-by: Ian Romanick <[email protected]>
* clover: Handle NULL devices returned by pipe_loader_probe() v2Tom Stellard2015-12-011-1/+2
| | | | | | | | | | | | | | | | | | | | | When probing for devices, clover will call pipe_loader_probe() twice. The first time to retrieve the number of devices, and then second time to retrieve the device structures. We currently assume that the return value of both calls will be the same, but this will not be the case if a device happens to disappear between the two calls. When a device disappears, the pipe_loader_probe() will add a NULL device to the device list, so we need to handle this. v2: - Keep range for loop Reviewed-by: Francisco Jerez <[email protected]> Acked-by: Emil Velikov <[email protected]> CC: <[email protected]>
* automake: fix some occurrences of hardcoded -ldl and -lpthreadJonathan Gray2015-12-012-2/+3
| | | | | | | | | Correct some occurrences of -ldl and -lpthread to use $(DLOPEN_LIBS) and $(PTHREAD_LIBS) respectively. Signed-off-by: Jonathan Gray <[email protected]> Cc: "11.0 11.1" <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* glsl/lower_ubo_reference: split struct copies into element copiesIago Toral Quiroga2015-12-011-2/+54
| | | | | | | | Improves register pressure, since otherwise we end up emitting loads for all the elements in the RHS and them emitting stores for all elements in the LHS. Reviewed-by: Jordan Justen <[email protected]>
* glsl/lower_ubo_reference: split array copies into element copiesIago Toral Quiroga2015-12-011-0/+67
| | | | | | | | | | | | | | | | | | | | | | | Improves register pressure, since otherwise we end up emitting loads for all the elements in the RHS and them emitting stores for all elements in the LHS. v2: - Mark progress properly. This also fixes some instances where the added nodes with individual element copies where not being lowered, which is expected behavior as explained in the documentation for visit_list_elements. - Only need to do this if the RHS is a buffer-backed variable. - We can also have arrays inside structs. A later patch will make it so we also split struct copies and end up with multiple ir_dereference_record assignments, so make sure that if any of these is an array copy, we also split it. Fixes the following piglit tests: tests/spec/arb_shader_storage_buffer_object/execution/large-field-copy.shader_test tests/spec/arb_shader_storage_buffer_object/linker/copy-large-array.shader_test Reviewed-by: Jordan Justen <[email protected]>
* st/va: also retrieve reference frames info for h264Julien Isorce2015-12-011-0/+52
| | | | | | | | Other hardwares than AMD require to parse: VAPictureParameterBufferH264.ReferenceFrames[16] Signed-off-by: Julien Isorce <[email protected]> Reviewed-by: Christian König <[email protected]>
* st/va: delay decoder creation until max_references is knownJulien Isorce2015-12-014-34/+68
| | | | | | | | | | | | | | | | | | In general max_references cannot be based on num_render_targets. This patch allows to allocate buffers with an accurate size. I.e. no more than necessary. For other codecs it is a fixed value 2. This is similar behaviour as vaapi/vdpau-driver. For now HEVC case defaults to num_render_targets as before. But it could also benefits this change by setting a more accurate max_references number in handlePictureParameterBuffer. Signed-off-by: Julien Isorce <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* glsl/dead_builin_varyings: Fix gl_FragData array loweringIago Toral Quiroga2015-12-011-1/+1
| | | | | | | | | | | | | | | | | | | | | The current implementation looks for array dereferences on gl_FragData and immediately proceeds to lower them, however this is not enough because we can have array access on vector variables too, like in this code: out vec4 color; void main() { int i; for (i = 0; i < 4; i++) color[i] = 1.0; } Fix it by making sure that the actual variable being dereferenced is an array. Fixes a crash in: spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-ldexp-dvec4.shader_test Reviewed-by: Tapani Pälli <[email protected]>
* r600: workaround empty geom shader.Dave Airlie2015-12-011-0/+5
| | | | | | | | | | We need to emit at least one cut/emit in every geometry shader, the easiest workaround it to stick a single CUT at the top of each geom shader. Reviewed-by: Marek Olšák <[email protected]> Cc: "10.6 11.0 11.1" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: rv670 use at least 16es/gs threadsDave Airlie2015-12-011-4/+5
| | | | | | | | This is specified in the docs for rv670 to work properly. Reviewed-by: Marek Olšák <[email protected]> Cc: "10.6 11.0 11.1" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: geometry shader gsvs itemsize workaroundDave Airlie2015-12-011-0/+20
| | | | | | | | | | On some chips the GSVS itemsize needs to be aligned to a cacheline size. This only applies to some of the r600 family chips. Reviewed-by: Marek Olšák <[email protected]> Cc: "10.6 11.0 11.1" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* glsl: don't sort varying in separate shader modeGregory Hainaut2015-12-011-6/+32
| | | | | | | | | | | | | | | This fixes an issue where the addition of the FLAT qualifier in varying_matches::record() can break the expected varying order. It also avoids a future issue with the relaxing of interpolation qualifier matching constraints in GLSL 4.50. V2: (by Timothy Arceri) * reworked comment slightly Signed-off-by: Gregory Hainaut <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* glsl: don't dead code remove SSO varyings marked as activeGregory Hainaut2015-12-011-0/+14
| | | | | | | | | | | | | | | | | GL_ARB_separate_shader_objects allow matching by name variable or block interface. Input varyings can't be removed because it is will impact the location assignment. This fixes the bug 79783 and likely any application that uses GL_ARB_separate_shader_objects extension. V2 (by Timothy Arceri): * simplify now that builtins are not set as always active Signed-off-by: Gregory Hainaut <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> https://bugs.freedesktop.org/show_bug.cgi?id=79783
* glsl: add always_active_io attribute to ir_variableGregory Hainaut2015-12-013-0/+82
| | | | | | | | | | | | | | | | | | | | | | The value will be set in separate-shader program when an input/output must remains active. e.g. when deadcode removal isn't allowed because it will create interface location/name-matching mismatch. v3: * Rename the attribute * Use ir_variable directly instead of ir_variable_refcount_visitor * Move the foreach IR code in the linker file v4: * Fix variable name in assert v5 (by Timothy Arceri): * Rename functions and reword comments * Don't set always active on builtins Signed-off-by: Gregory Hainaut <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* glsl: copy how_declared when lowering interface blocksTimothy Arceri2015-12-011-0/+1
| | | | | Cc: Gregory Hainaut <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* glsl: optimise inputs/outputs with explicit locationsTimothy Arceri2015-12-012-14/+74
| | | | | | | | | | | | | | | | | | | This change allows used defined inputs/outputs with explicit locations to be removed if they are detected to not be used between shaders at link time. To enable this we change the is_unmatched_generic_inout field to be flagged when we have a user defined varying. Previously explicit_location was assumed to be set only in builtins however SSO allows the user to set an explicit location. We then add a function to match explicit locations between shaders. V2: call match_explicit_outputs_to_inputs() after is_unmatched_generic_inout has been initialised. Cc: Gregory Hainaut <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* r600/shader: split address get out to a function.Dave Airlie2015-12-011-1/+6
| | | | | | | This will be used in the tess shaders. Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* vl/buffers: fixes vl_video_buffer_formats for RGBXJulien Isorce2015-11-301-1/+1
| | | | | | | Fixes: 42a5e143a8d "vl/buffers: add RGBX and BGRX to the supported formats" Cc: [email protected] Signed-off-by: Julien Isorce <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965/fs: remove unused fs_reg offsetSamuel Iglesias Gonsálvez2015-11-301-1/+0
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Abdiel Janulgue <[email protected]>
* i965: Add src/dst interference for certain instructions with hazards.Kenneth Graunke2015-11-307-35/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When working on tessellation shaders, I created some vec4 virtual opcodes for creating message headers through a sequence like: mov(8) g7<1>UD 0x00000000UD { align1 WE_all 1Q compacted }; mov(1) g7.5<1>UD 0x00000100UD { align1 WE_all }; mov(1) g7<1>UD g0<0,1,0>UD { align1 WE_all compacted }; mov(1) g7.3<1>UD g8<0,1,0>UD { align1 WE_all }; This is done in the generator since the vec4 backend can't handle align1 regioning. From the visitor's point of view, this is a single opcode: hs_set_output_urb_offsets vgrf7.0:UD, 1U, vgrf8.xxxx:UD Normally, there's no hazard between sources and destinations - an instruction (naturally) reads its sources, then writes the result to the destination. However, when the virtual instruction generates multiple hardware instructions, we can get into trouble. In the above example, if the register allocator assigned vgrf7 and vgrf8 to the same hardware register, then we'd clobber the source with 0 in the first instruction, and read back the wrong value in the last one. It occured to me that this is exactly the same problem we have with SIMD16 instructions that use W/UW or B/UB types with 0 stride. The hardware implicitly decodes them as two SIMD8 instructions, and with the overlapping regions, the first would clobber the second. Previously, we handled that by incrementing the live range end IP by 1, which works, but is excessive: the next instruction doesn't actually care about that. It might also be the end of control flow. This might keep values alive too long. What we really want is to say "my source and destinations interfere". This patch creates new infrastructure for doing just that, and teaches the register allocator to add interference when there's a hazard. For my vec4 case, we can determine this by switching on opcodes. For the SIMD16 case, we just move the existing code there. I audited our existing virtual opcodes that generate multiple instructions; I believe FS_OPCODE_PACK_HALF_2x16_SPLIT needs this treatment as well, but no others. v2: Rebased by mattst88. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fix JIP to properly skip over unrelated control flow.Kenneth Graunke2015-11-301-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've apparently always been botching JIP for sequences such as: do cmp.f0.0 ... (+f0.0) break ... if ... else ... endif ... while Normally, UIP is supposed to point to the final destination of the jump, while in nested control flow, JIP is supposed to point to the end of the current nesting level. It essentially bounces out of the current nested control flow, to an instruction that has a JIP which bounces out another level, and so on. In the above example, when setting JIP for the BREAK, we call brw_find_next_block_end(), which begins a search after the BREAK for the next ENDIF, ELSE, WHILE, or HALT. It ignores the IF and finds the ELSE, setting JIP there. This makes no sense at all. The break is supposed to skip over the whole if/else/endif block entirely. They have a sibling relationship, not a nesting relationship. This patch fixes brw_find_next_block_end() to track depth as it does its search, and ignore anything not at depth 0. So when it sees the IF, it ignores everything until after the ENDIF. That way, it finds the end of the right block. I noticed this while reading some assembly code. We believe jumping earlier is harmless, but makes the EU walk through a bunch of disabled instructions for no reason. I noticed that GLBenchmark Manhattan had a shader that contained a BREAK with a bogus JIP, but didn't measure any performance improvement (it's likely miniscule, if there is any). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* r600: move per-type settings into a switch statementDave Airlie2015-11-301-5/+13
| | | | | | | This will allow adding tess stuff much cleaner later. Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: split out common alu_writes pattern.Dave Airlie2015-11-301-7/+12
| | | | | | | | This just splits out a common pattern into an inline function to make things cleaner to read. Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600/llvm: fix r600/llvm buildDave Airlie2015-11-301-1/+1
| | | | | | Reported on irc by gryffus Signed-off-by: Dave Airlie <[email protected]>
* r600: fixes for register definitions.Dave Airlie2015-11-301-3/+3
| | | | | | Forgot to add these. Signed-off-by: Dave Airlie <[email protected]>
* r600: add missing register to initial stateDave Airlie2015-11-303-7/+15
| | | | | | | | | | We really should initialise HS/LS_2 and SQ_LDS_ALLOC exists on all evergreen not just cayman, so we should initialise it as well. Reviewed-by: Glenn Kennard <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: define registers required for tessellationDave Airlie2015-11-302-27/+113
| | | | | | | | | This adds the defines for a bunch of registers and shader values that are required to implement tessellation. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: consolidate clip state updatesDave Airlie2015-11-302-17/+16
| | | | | | | | Move some common code into one place, tess will also need to use this function. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nv50/ir: always display the opcode number for unknown instructionsSamuel Pitoiset2015-11-292-2/+2
| | | | | | | This helps in debugging unknown instructions. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* mesa: remove len argument from _mesa_shader_debug()Emil Velikov2015-11-295-10/+9
| | | | | | | | | | There was only a single user which was using strlen(buf). As this function is not user facing (i.e. we don't need to feed back original length via a callback), we can simplify things. Suggested-by: Timothy Arceri <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* drivers/x11: scons: partially revert b9b40ef9b76Emil Velikov2015-11-291-2/+0
| | | | | | | | | | As glsl_types.{cpp,h} were moved out of the sconscript (commit b23a4859f4d "scons: Build nir/glsl_types.cpp once.") remove the dangling includes. Cc: Jose Fonseca <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* nir: remove recursive inclusion in builtin_type_macros.hEmil Velikov2015-11-291-2/+0
| | | | | | | The header is already included by glsl_types.{cpp,h}. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* nir: remove unneeded includeEmil Velikov2015-11-291-1/+0
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* mesa/program: remove dead function declarationsEmil Velikov2015-11-292-5/+0
| | | | | | | | | | | | Dead since 5e9aa9926b9 (2011) - _mesa_ir_compile_shader 69e07bdeb42 (2009) - _mesa_get_program_register Cc: Kenneth Graunke <[email protected]> Cc: Brian Paul <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* auxiliary/vl/dri: fd management cleanupsEmil Velikov2015-11-291-2/+5
| | | | | | | | | | Analogous to previous commit, minus the extra dup. We are the one opening the device thus we can directly use the fd. Spotted by Coverity (CID 1339867, 1339877) Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]>
* auxiliary/vl/drm: fd management cleanupsEmil Velikov2015-11-291-1/+7
| | | | | | | | | Analogous to previous commit. Spotted by Coverity (CID 1339868) Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]>
* st/xa: fd management cleanupsEmil Velikov2015-11-291-1/+8
| | | | | | | | | Analogous to previous commit. Spotted by Coverity (CID 1339866) Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]>
* st/dri: fd management cleanupsEmil Velikov2015-11-291-2/+14
| | | | | | | | | | | Add some checks if the original/dup'd fd is valid and ensure that we don't leak it on error. The former is implicitly handled within the pipe_loader, although let's make things explicit and check beforehand. Spotted by Coverity (CID 1339865) Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]>
* pipe-loader: check if winsys.name is non-null prior to strcmpEmil Velikov2015-11-291-4/+4
| | | | | | | | | | | | In theory this wouldn't be an issue, as we'll find the correct name and break out of the loop before we hit the sentinel. Let's fix this and avoid issues in the future. Spotted by Coverity (CID 1339869, 1339870, 1339871) Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]>
* st/va: add missing break statementEmil Velikov2015-11-291-0/+1
| | | | | | | | | | | | | | Earlier commit factored out the mpeg4 IQ matrix handling into separate function, although it forgot to add a break in its case statement. Thus the data ended up partially overwritten as the mpeg4 and h265 structs are members of the desc union. Spotted by Coverity (CID 1341052) Fixes: 64761a841db "st/va: move MPEG4 functions into separate file" Cc: Julien Isorce <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Christian König <[email protected]>
* mesa: support GL_RED/GL_RG in ES2 contexts when driver support existsIlia Mirkin2015-11-284-4/+11
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93126 Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Eduardo Lima Mitev <[email protected]> Cc: "11.0 11.1" <[email protected]>
* radeon: only suspend queries on flush if they haven't been suspended yetNicolai Hähnle2015-11-282-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Non-timer queries are suspended during blits. When the blits end, the queries are resumed, but this resume operation itself might run out of CS space and trigger a flush. When this happens, we must prevent a duplicate suspend during preflush suspend, and we must also prevent a duplicate resume when the CS flush returns back to the original resume operation. This fixes a regression that was introduced by: commit 8a125afa6e88a3eeddba8c7fdc1a75c9b99d5489 Author: Nicolai Hähnle <[email protected]> Date: Wed Nov 18 18:40:22 2015 +0100 radeon: ensure that timing/profiling queries are suspended on flush The queries_suspended_for_flush flag is redundant because suspended queries are not removed from their respective linked list. Reviewed-by: Marek Olšák <[email protected]> Reported-by: Axel Davy <[email protected]> Cc: "11.1" <[email protected]> Tested-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* scons: Use LD version script for libgl-xlib.Jose Fonseca2015-11-271-2/+6
| | | | Trivial.
* svga: Don't return value from void function.Jose Fonseca2015-11-271-1/+2
| | | | | | | Addresses MSVC warning C4098: 'svga_destroy_query' : 'void' function returning a value. Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: Make pipe_query_result::batch array length non-zero.Jose Fonseca2015-11-271-2/+2
| | | | | | | | | | | | Zero length arrays are non standard: warning C4200: nonstandard extension used : zero-sized array in struct/union Cannot generate copy-ctor or copy-assignment operator when UDT contains a zero-sized array And all code does `N * sizeof query_result->batch[0]`, so it should work exactly the same. Reviewed-by: Roland Scheidegger <[email protected]>
* util: Tiny optimisation for the linear→srgb conversionNeil Roberts2015-11-271-1/+1
| | | | | | When converting 0.0 it would be nice if it didn't do any arithmetic. Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: don't generate extra errors in ValidateProgramPipelineTimothy Arceri2015-11-271-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | From Section 11.1.3.11 (Validation) of the GLES 3.1 spec: "An INVALID_OPERATION error is generated by any command that trans- fers vertices to the GL or launches compute work if the current set of active program objects cannot be executed, for reasons including:" It then goes on to list the rules we validate in the _mesa_validate_program_pipeline() function. For ValidateProgramPipeline the only mention of generating an error is: "An INVALID_OPERATION error is generated if pipeline is not a name re- turned from a previous call to GenProgramPipelines or if such a name has since been deleted by DeleteProgramPipelines," Which we handle separately. This fixes: ES31-CTS.sepshaderobjs.PipelineApi No regressions on the eEQP 3.1 tests. Cc: Gregory Hainaut <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* freedreno/ir3: assign varying locations laterRob Clark2015-11-264-29/+37
| | | | | | | | | | | | | Rather than assigning inloc up front, when we don't yet know if it will be unused, assign it last thing before the legalize pass. Also, realize when inputs are unused (since for frag shader's we can't rely on them being removed from ir->inputs[]). This doesn't make sense if we don't also dynamically assign the inloc's, since we could end up telling the hw the wrong # of varyings (since we currently assume that the # of varyings and max-inloc are related..) Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: use instr flag to mark unused instructionsRob Clark2015-11-264-14/+24
| | | | | | Rather than magic depth value, which won't be available in later stages. Signed-off-by: Rob Clark <[email protected]>
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