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	Commit message (Expand)	Author	Age	Files	Lines
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*	i965/fs: Return 32 bit mask from fs_builder::sample_mask().	Francisco Jerez	2016-05-27	1	-1/+3
*	i965/fs: Emit fixed-width null register regardless of the dispatch width.	Francisco Jerez	2016-05-27	1	-8/+4
*	i965/fs: Fix half() to handle more exotic register files.	Francisco Jerez	2016-05-27	1	-21/+4
*	i965/fs: Fix horiz_offset() to handle ARF and HW GRF register files.	Francisco Jerez	2016-05-27	1	-4/+10
*	i965/fs: Clean up remaining uses of fs_inst::reads_flag and ::writes_flag.	Francisco Jerez	2016-05-27	5	-24/+12
*	i965/fs: Keep track of flag dependencies with byte granularity during schedul...	Francisco Jerez	2016-05-27	1	-10/+31
*	i965/fs: Track flag register liveness with byte granularity.	Francisco Jerez	2016-05-27	2	-25/+9
*	i965/fs: Define methods to calculate the flag subset read or written by an fs...	Francisco Jerez	2016-05-27	2	-11/+67
*	i965/fs: Expose arbitrary channel execution groups to the IR.	Francisco Jerez	2016-05-27	6	-32/+35
*	i965/ir: Make BROADCAST emit an unmasked single-channel move.	Francisco Jerez	2016-05-27	4	-3/+17
*	i965/fs: Allow specifying arbitrary quarter control to FIND_LIVE_CHANNEL.	Francisco Jerez	2016-05-27	1	-7/+12
*	i965/fs: Allow specifying arbitrary execution sizes up to 32 to FIND_LIVE_CHA...	Francisco Jerez	2016-05-27	1	-8/+17
*	i965/fs: Lower 32-wide scratch writes in the generator.	Francisco Jerez	2016-05-27	1	-6/+24
*	i965/fs: Implement scratch reads and writes of 4 GRFs at a time.	Francisco Jerez	2016-05-27	3	-21/+18
*	i965/eu: Fix Gen7+ DP scratch message size calculation on Gen7.	Francisco Jerez	2016-05-27	1	-1/+4
*	i965/eu: Set execution size explicitly for memory fence send message.	Francisco Jerez	2016-05-27	1	-4/+7
*	i965/eu: Consider QtrCtrl 3Q-4Q in typed surface message descriptor setup.	Francisco Jerez	2016-05-27	1	-6/+6
*	i965/fs: Clean up remaining uses of dispatch_width in the generator.	Francisco Jerez	2016-05-27	3	-9/+8
*	i965/eu: Remove brw_codegen::compressed and ::compressed_stack.	Francisco Jerez	2016-05-27	3	-11/+5
*	i965/eu: Use current exec size instead of p->compressed in surface message ge...	Francisco Jerez	2016-05-27	1	-6/+8
*	i965/fs: No need to reset predicate control after emitting some instructions.	Francisco Jerez	2016-05-27	1	-2/+0
*	i965/fs: Pass current execution size to brw_IF() and brw_DO().	Francisco Jerez	2016-05-27	1	-2/+2
*	i965/eu: Stop using p->compressed to specify the exec size of control flow in...	Francisco Jerez	2016-05-27	1	-13/+11
*	i965/fs: Extend region width calculation to allow arbitrary execution sizes.	Francisco Jerez	2016-05-27	1	-16/+23
*	i965/fs: Pass the compression mode to brw_reg_from_fs_reg().	Kenneth Graunke	2016-05-27	1	-5/+6
*	i965/fs: Simplify per-instruction compression control setup in generator.	Francisco Jerez	2016-05-27	1	-27/+17
*	i965/fs: No need to set compression control at the top of generate_code().	Francisco Jerez	2016-05-27	1	-2/+0
*	i965/eu: Fix a bunch of compression control bugs in the generator.	Francisco Jerez	2016-05-27	2	-10/+9
*	i965/eu: Define alternative interface for setting compression and group contr...	Francisco Jerez	2016-05-27	2	-0/+75
*	i965/fs: Remove FS_OPCODE_PACK_STENCIL_REF virtual instruction.	Francisco Jerez	2016-05-27	5	-52/+2
*	i965/fs: Remove extract virtual opcodes.	Francisco Jerez	2016-05-27	5	-53/+9
*	i965: Define brw_int_type() helper.	Francisco Jerez	2016-05-27	1	-0/+20
*	i965/fs: Remove manual splitting of DDY ops in the generator.	Francisco Jerez	2016-05-27	1	-37/+1
*	i965/fs: Remove manual unrolling of BFI instructions from the generator.	Francisco Jerez	2016-05-27	1	-34/+2
*	i965/fs: Drop Gen7 CMP SIMD unrolling workaround from the generator.	Francisco Jerez	2016-05-27	1	-36/+10
*	i965/fs: Drop lowering code for a few three-source instructions from the gene...	Francisco Jerez	2016-05-27	1	-47/+4
*	i965/fs: Set default access mode to Align1 for all instructions in the genera...	Francisco Jerez	2016-05-27	1	-0/+1
*	i965/fs: Remove handcrafted math SIMD lowering from the generator.	Francisco Jerez	2016-05-27	2	-101/+21
*	i965/fs: Limit SIMD width of various virtual opcodes to the maximum supported...	Francisco Jerez	2016-05-27	1	-5/+40
*	i965/fs: Lower LOAD_PAYLOAD instructions of unsupported width.	Francisco Jerez	2016-05-27	1	-0/+19
*	i965/fs: Lower DDY instructions to SIMD8 during SIMD lowering time	Francisco Jerez	2016-05-27	1	-0/+29
*	i965/fs: Apply usual FPU-like execution size restrictions to MULH.	Francisco Jerez	2016-05-27	1	-1/+2
*	i965/fs: Calculate maximum execution size of MOV_INDIRECT correctly.	Francisco Jerez	2016-05-27	1	-9/+3
*	i965/fs: Assert that IF instruction with embedded compare has legal exec_size.	Francisco Jerez	2016-05-27	1	-0/+4
*	i965/fs: Implement HSW BFI exec size workarounds in the SIMD lowering pass.	Francisco Jerez	2016-05-27	1	-2/+8
*	i965/fs: Implement workaround for IVB CMP dependency race in the SIMD lowerin...	Francisco Jerez	2016-05-27	1	-1/+17
*	i965/fs: Enforce common regioning restrictions by SIMD splitting.	Francisco Jerez	2016-05-27	1	-20/+104
*	i965/fs: Enforce extended math exec size limits during SIMD lowering.	Francisco Jerez	2016-05-27	1	-10/+24
*	i965/fs: Handle SAMPLEINFO consistently like other texturing instructions.	Francisco Jerez	2016-05-27	4	-17/+15
*	i965/fs: Lower math into Gen4-5 send-like instructions in lower_logical_sends.	Francisco Jerez	2016-05-27	2	-42/+60