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* radeonsi: allow copying between compatible compressed and uncompressed formatsMarek Olšák2015-10-281-1/+1
* mesa: set TargetIndex in VDPAURegister*SurfaceNV (v2)Marek Olšák2015-10-281-2/+3
* i965: remove unneeded src_reg copy in emit_shader_time_writeEmil Velikov2015-10-281-1/+1
* i965: remove cache_aux_free_func arrayEmil Velikov2015-10-282-12/+5
* main: fix GL_MAX_NUM_ACTIVE_VARIABLES value for shader storage blocksSamuel Iglesias Gonsalvez2015-10-281-1/+20
* st/vdpau: disable RefPicList for Vdpau HEVCBoyuan Zhang2015-10-271-0/+1
* st/va: add VAAPI HEVC decode supportBoyuan Zhang2015-10-274-1/+208
* radeon/uvd: implement and add flag for VAAPI HEVC decodeBoyuan Zhang2015-10-272-0/+16
* vl: add RefPicList defines for VAAPI HEVC decodeBoyuan Zhang2015-10-271-0/+2
* mesa: Draw indirect is not allowed if the default VAO is bound.Marta Lofstedt2015-10-271-0/+12
* winsys/amdgpu: remove the dcc_enable surface flagMarek Olšák2015-10-273-10/+7
* radeonsi: add debug flags that disable DCC and DCC fast clearMarek Olšák2015-10-273-0/+10
* radeonsi: properly check if DCC is enabled and allocatedMarek Olšák2015-10-275-8/+8
* radeonsi: simplify DCC handling in si_initialize_color_surfaceMarek Olšák2015-10-271-7/+3
* mesa: Draw indirect is not allowed when xfb is active and unpausedMarta Lofstedt2015-10-271-0/+9
* mesa: Draw Indirect return wrong error code on unalingedMarta Lofstedt2015-10-271-4/+6
* main: Remove interface block array index for doing the name comparisonSamuel Iglesias Gonsalvez2015-10-271-1/+42
* vc4: Add support for copy propagation with unpack flags present.Eric Anholt2015-10-262-36/+109
* vc4: Rewrite the pack instructions as a MOV with a dst pack flagEric Anholt2015-10-263-37/+18
* vc4: Move dst pack setup out to a helper function with more asserts.Eric Anholt2015-10-261-10/+22
* vc4: Switch the unpack ops to being unpack flags on a mov.Eric Anholt2015-10-266-123/+42
* vc4: Drop some confused code about pack/unpack handling.Eric Anholt2015-10-261-23/+4
* vc4: Reduce MOV special-casing in QIR-to-QPU.Eric Anholt2015-10-261-8/+11
* vc4: Fix up the test for whether the unpack can be from r4.Eric Anholt2015-10-263-8/+27
* vc4: Don't try to follow MOVs across a pack.Eric Anholt2015-10-261-1/+2
* vc4: Only copy propagate raw MOVs.Eric Anholt2015-10-261-6/+1
* vc4: If a QIR source has an unpack set, print it.Eric Anholt2015-10-263-3/+13
* glsl: Convert TES gl_PatchVerticesIn into a constant when using a TCS.Kenneth Graunke2015-10-261-0/+16
* i965: Add missing close-parenthesis in error messagesIan Romanick2015-10-261-2/+2
* i965: Fix is-renderable check in intel_image_target_renderbuffer_storageIan Romanick2015-10-261-5/+1
* glsl: keep track of intra-stage indices for atomicsTimothy Arceri2015-10-2711-40/+96
* gallivm: disable f16c when not using AVXRoland Scheidegger2015-10-261-0/+3
* st/va: pass picture desc to begin and decodeJulien Isorce2015-10-261-2/+2
* mesa: add additional checks for uniform location queryTapani Pälli2015-10-261-0/+8
* i965: Make brw_varying_to_offset take a const pointer to the VUE map.Kenneth Graunke2015-10-241-2/+2
* vc4: Fix names of the 16-bit unpacksEric Anholt2015-10-243-6/+6
* vc4: Don't try to register coalesce into the VPM across non-raw MOVs.Eric Anholt2015-10-241-1/+1
* vc4: Take advantage of the 8888 pack function in pack_unorm_4x8.Eric Anholt2015-10-241-0/+14
* vc4: Fix the test for skipping raw MOVs.Eric Anholt2015-10-243-1/+10
* i965: Remove unused devinfo revisionBen Widawsky2015-10-243-5/+13
* freedreno: remove unnecessary null checksRob Clark2015-10-244-13/+13
* radeonsi: Implement DCC fast clear.Bas Nieuwenhuizen2015-10-243-14/+100
* gallivm: fix tex offsets with mirror repeat linearRoland Scheidegger2015-10-241-4/+5
* gallivm: fix sampling with texture offsets in SoA pathRoland Scheidegger2015-10-241-3/+8
* softpipe: fix using non-zero layer in non-array view from array resourceRoland Scheidegger2015-10-242-9/+31
* llvmpipe: fix using non-zero layer in non-array view from array resourceRoland Scheidegger2015-10-242-8/+8
* radeonsi: add Stoney to si_init_gs_info()Alex Deucher2015-10-231-0/+1
* radeonsi: Enable DCC.Bas Nieuwenhuizen2015-10-246-6/+50
* radeonsi: Add FLUSH_AND_INV_CB_DATA_TS for DCC.Bas Nieuwenhuizen2015-10-241-0/+11
* radeonsi: Disable operations that do not work with DCC.Bas Nieuwenhuizen2015-10-244-3/+11
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