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* r600g/compute: Use evergreen_cb() for binding RATsTom Stellard2012-07-095-70/+48
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* r600g: Add support for RATs in evergreen_cb()Tom Stellard2012-07-091-3/+11
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* r600g: Use a texture as the underlying resource for compute_memory_poolTom Stellard2012-07-092-18/+37
| | | | This the first step towards being able to use evergreen_cb to bind RATs.
* r600g: Add is_rat flag to r600_resource_textureTom Stellard2012-07-091-0/+1
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* r600g: Add r600_context_pipe_state_emit()Tom Stellard2012-07-092-6/+71
| | | | | | | | This function is used when dispatching compute shader in order to avoid mixing compute and 3D registers in the context's dirty list. This allows the compute code to resuse 3D functions like evergreen_cb, which return a struct r600_pipe_state and still have control over when and how the register writes are emitted.
* r600g: Add pkt_flag parameter to r600_context_block_emit_dirty()Tom Stellard2012-07-093-3/+15
| | | | | | | This allows the shader type bit to be set in the pm4 header when emitting registers for compute shaders. Reviewed-by: Marek Olšák <[email protected]>
* r600g/compute: Move LOOP_CONST initialization to start_compute_cs atomTom Stellard2012-07-091-14/+16
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* r600g: Add start_compute_cs atom to struct r600_contextTom Stellard2012-07-094-94/+96
| | | | | | | | | The start_compute_cs atom initializes some config and context registers to the values needed for running compute shaders. When a compute shader is dispatched, this atom is emitted after the start_cs_cmd atom, which initializes registers that are common to both 3D and compute. Reviewed-by: Marek Olšák <[email protected]>
* r600g: Add pkt_flag member to struct r600_command_bufferTom Stellard2012-07-091-3/+16
| | | | | | | | | | Some packets require the shader type bit (bit 1) to be set when used for compute shaders. The pkt_flag will be initialized to RADEON_CP_PACKET3_COMPUTE_MODE for any struct r600_command_buffer used for dispatching compute shaders and it will be or'd against the result of the PKT3 macro when adding a new packet to a struct r600_command buffer. Reviewed-by: Marek Olšák <[email protected]>
* r600g: Only emit start_cs_cmd atom once for compute command streamsTom Stellard2012-07-091-2/+0
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* r600g: fix stencil texturing with Z32_FLOAT_S8X24_UINTMarek Olšák2012-07-091-0/+2
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* r600g: add assertions after translate_colorswap/colorformat/dbformat/texformatMarek Olšák2012-07-092-3/+17
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* r600g: inline r600_hw_copy_regionMarek Olšák2012-07-091-21/+5
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* r600g: enable dual src blending on r7xxMarek Olšák2012-07-091-1/+1
| | | | No lockups here.
* r600g: use depth format from pipe_surface, not pipe_resourceMarek Olšák2012-07-092-4/+4
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* r600g: use u_box_origin_2d helper functionMarek Olšák2012-07-091-10/+3
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* gallium/u_blitter: consolidate some state changesMarek Olšák2012-07-091-32/+17
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* r600g: remove stray semicolonMarek Olšák2012-07-071-1/+1
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* i965/fs: Invalidate live intervals after copy propagation.Eric Anholt2012-07-061-0/+3
| | | | | | | | For copy propgation, we've dropped the use of a GRF in favor of a (probably later) use of a different GRF. This definitely requires invalidating intervals. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Invalidate live intervals in passes that remove an instruction.Eric Anholt2012-07-061-0/+6
| | | | | | | | | Since live intervals are based on ip, removing an instruction trashes the intervals unless we were to go do some surgery. These happen to usually remove a use of a grf, so it's time to recalculate, anyway. Reviewed-by: Kenneth Graunke <[email protected]> NOTE: This is a candidate for the 8.0 release branch.
* i965/vs: Move the other two src_reg/dst_reg constructors to brw_vec4.cpp.Eric Anholt2012-07-062-43/+43
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vs: Move class functions to brw_vec4.cpp.Eric Anholt2012-07-062-106/+126
| | | | | | | This has less impact than for the FS (4k savings), because it was partially done already, but makes things more consistent. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Move class functions from the header to .cpp files.Eric Anholt2012-07-063-278/+326
| | | | | | | Cuts compile time for brw_fs.h changes from 2.7s to .7s and reduces i965_dri.so size by 70k. Reviewed-by: Kenneth Graunke <[email protected]>
* galahad: Check that texture format is supported.José Fonseca2012-07-061-0/+7
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* galahad: More detailed resource checks.José Fonseca2012-07-062-19/+64
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* galahad: Fix zealous warnings.José Fonseca2012-07-061-6/+10
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* galahad: Enumerate all methods that are missing.José Fonseca2012-07-062-24/+49
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* galahad: Implement render_condition.José Fonseca2012-07-061-1/+13
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* galahad: Don't implement context methods that are not implemented by the ↵José Fonseca2012-07-061-104/+115
| | | | underlying pipe driver.
* galahad: Use debug_printf.José Fonseca2012-07-061-3/+5
| | | | stderr is not visible on windows.
* galahad: Silence creation messages.José Fonseca2012-07-062-4/+0
| | | | Let galahad warnings be true warnings.
* galahad: Use reference counting when destroying the wraped objects.José Fonseca2012-07-061-3/+2
| | | | As the wrapped pipe driver may hold internal references.
* galahad: Point to the galahad objects from the galahad sampler view.José Fonseca2012-07-061-2/+2
| | | | And not the wraped driver's objects.
* galahad: Don't defer index buffer when it's NULL.José Fonseca2012-07-061-16/+16
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* target-helpers: Enable debug helpers only on debug builds.José Fonseca2012-07-061-0/+7
| | | | Some of these helpers use debug_get_option, which works also on releases.
* st/mesa: only expose ARB_shader_bit_encoding with GLSL 1.3Marek Olšák2012-07-061-4/+1
| | | | | | I don't think it's possible or even useful to use the extension with GLSL 1.2. Reviewed-by: Brian Paul <[email protected]>
* egl_dri2: Reorganize the EGLImage constructors to share more codeKristian Høgsberg2012-07-051-78/+37
| | | | | | | We factor out all the EGL book-keeping into dri2_create_image() and simplify the wayland case by using dupImage. Signed-off-by: Kristian Høgsberg <[email protected]>
* intel: Share common __DRIimage allocation codeKristian Høgsberg2012-07-051-40/+19
| | | | | | | We have the same switch and allocation code in two places. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Just look up image->internal_format using _mesa_get_format_base_formatKristian Høgsberg2012-07-051-10/+2
| | | | | Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Remove unused __DRIimage::data_type fieldKristian Høgsberg2012-07-052-13/+0
| | | | | Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* svga: whitespace fixesBrian Paul2012-07-051-114/+90
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* Revert "mesa: #define fprintf to be __mingw_fprintf() on Mingw32"Brian Paul2012-07-051-10/+0
| | | | | | | | | This reverts commit cbffaf20e9e6154310ba68bb2b44adc37ba83bcd. Use the PRIx64 macro in the fprintf() call instead, as suggested by Dylan Noblesmith. Reviewed-by: José Fonseca <[email protected]>
* mesa: use the PRIx64 macro for printing 64-bit hexadecimal valuesBrian Paul2012-07-051-5/+6
| | | | | | We'll revert the #define fprintf __mingw_fprintf change next. Reviewed-by: José Fonseca <[email protected]>
* svga: implement TGSI_OPCODE_ROUNDBrian Paul2012-07-051-15/+51
| | | | | | | ROUND and TRUNC are implemented with one function to reduce code duplication. Note: ROUND isn't actually used yet, but probably will be soon. Reviewed-by: José Fonseca <[email protected]>
* svga: fix CMP translation for vertex shadersBrian Paul2012-07-051-36/+37
| | | | | | | | | | Converting CMP to SLT+LRP didn't work when src2 or src3 was Inf/NaN. That's the case for GLSL sqrt(0). sqrt(0) actually happens in many piglit auto-generated tests that use the distance() function. v2: remove debug/devel code, per Jose Reviewed-by: José Fonseca <[email protected]>
* svga: properly implement TRUNC instructionBrian Paul2012-07-051-1/+54
| | | | | | | | | | Was previously implemented with FLOOR. Fixes quite a few piglit tests of float->int conversion, integer division, etc. v2: clean up left over debug/devel code, per Jose Reviewed-by: José Fonseca <[email protected]>
* svga: fix register collision issue in emit_conditional()Brian Paul2012-07-051-0/+24
| | | | | | | If the 'dst' register is the same as the 'pass' register we'll generate invalid code. Use a temporary register in that case. Reviewed-by: José Fonseca <[email protected]>
* svga: emit some debug messages when shader compilation failsBrian Paul2012-07-051-4/+10
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* intel: Fix a comment typo.Eric Anholt2012-07-041-1/+1
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* mesa: add GL_EXT_texture_rg extension for OpenGL ES 2.x.Gwenole Beauchesne2012-07-043-0/+10
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