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* i965/vec4: Add a pass to reduce swizzles.Matt Turner2014-08-192-0/+99
| | | | | | | total instructions in shared programs: 4344280 -> 4288033 (-1.29%) instructions in affected programs: 397468 -> 341221 (-14.15%) Reviewed-by: Kenneth Graunke <[email protected]>
* vc4: Plumb the texture index from TGSI through to the sampler uniforms.Eric Anholt2014-08-191-15/+11
| | | | | This commit and the last one fix ARB_fragment_program/sparse-samplers and 6 other tests.
* vc4: Avoid a null-deref if a sampler index isn't used.Eric Anholt2014-08-191-2/+5
| | | | Part of fixing ARB_fragment_program/sparse-samplers
* mesa: fix NULL pointer deref bug in _mesa_drawbuffers()Brian Paul2014-08-191-1/+1
| | | | | | | | | This is a follow-on fix to commit 39b40ad144. Fixes a crash if the user calls glDrawBuffers(0, NULL). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82814 Cc: "10.2" <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* r600g: Fix missing SET_TEXTURE_OFFSETSGlenn Kennard2014-08-194-57/+87
| | | | | | | | | | | | SB needs a bit of special handling to handle instructions without obvious side effects, to avoid it deleting them. Fixes failing non-const ARB_gpu_shader5 textureOffsets piglits with sb enabled. Signed-off-by: Glenn Kennard <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/target: Add needed mesautil lib to haiku-softpipeAlexander von Gluck IV2014-08-191-0/+1
| | | | Acked-by: Brian Paul <[email protected]>
* gallium/aux: Fill in Haiku get process name codeAlexander von Gluck IV2014-08-191-0/+7
| | | | Acked-by: Brian Paul <[email protected]>
* haiku/swrast: Add missing src include search path for missing util/macros.hAlexander von Gluck IV2014-08-191-0/+1
| | | | Acked-by: Brian Paul <[email protected]>
* llvmpipe/softpipe: enable ARB_conditional_render_invertedTobias Klausmann2014-08-192-2/+3
| | | | | | Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Tobias Klausmann <[email protected]>
* nvc0: Handle ARB_conditional_render_inverted and enable itTobias Klausmann2014-08-194-32/+37
| | | | | Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Tobias Klausmann <[email protected]>
* mesa/st: Support ARB_conditional_render_inverted modesTobias Klausmann2014-08-192-1/+20
| | | | | | Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Tobias Klausmann <[email protected]>
* gallium: Add and handle PIPE_CAP_CONDITIONAL_RENDER_INVERTEDTobias Klausmann2014-08-1915-0/+18
| | | | | | Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Tobias Klausmann <[email protected]>
* mesa: add ARB_conditional_render_inverted flagsTobias Klausmann2014-08-193-2/+10
| | | | | | | | | Also add an extension bit so we can safely enable Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Signed-off-by: Tobias Klausmann <[email protected]>
* glapi: add GL_ARB_conditional_render_invertedTobias Klausmann2014-08-192-1/+14
| | | | | | Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Signed-off-by: Tobias Klausmann <[email protected]>
* ilo: fix PIPE_CAP_VIDEO_MEMORYChia-I Wu2014-08-191-2/+2
| | | | | | I changed Emil's patch in f921131a5cebc233749a86cdd44b409c0cecc4ef to report raw values in the winsys, but forgot to convert the values to megabytes in the pipe driver.
* ilo: enable HiZ in more cases on GEN6Chia-I Wu2014-08-193-31/+44
| | | | | With layer offsetting killed, we no longer need to restrict HiZ to non-mipmapped and non-arary depth buffers.
* ilo: remove layer offsettingChia-I Wu2014-08-197-393/+27
| | | | Follow i965 to kill layer offsetting for GEN6.
* ilo: migrate to ilo_layoutChia-I Wu2014-08-198-1454/+213
| | | | Embed an ilo_layout in ilo_texture, and remove now duplicated members.
* ilo: add new resource layout codeChia-I Wu2014-08-193-0/+1779
| | | | | | | Based on the old code, the new layout code describes the layout with the new, well-documented, ilo_layout. It also gains new features such as MCS support and extended ARYSPC_LOD0 that i965 comes up with (see 6345a94a9b134b1321b3b290bacde228b12af415).
* gallium/radeon: Do not use u_upload_mgr for buffer downloadsNiels Ole Salscheider2014-08-191-12/+8
| | | | | | | | | | | | | | Instead create a staging texture with pipe_buffer_create and PIPE_USAGE_STAGING. u_upload_mgr sets the usage of its staging buffer to PIPE_USAGE_STREAM. But since 150ac07b855b5c5f879bf6ce9ca421ccd1a6c938 CPU -> GPU streaming buffers are created in VRAM. Therefore the staging texture (in VRAM) does not offer any performance improvements for buffer downloads. Signed-off-by: Niels Ole Salscheider <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600g: copy IA_MULTI_VGT_PARAM programming from radeonsi for CaymanMarek Olšák2014-08-194-3/+36
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: bump PRIMGROUP_SIZE for some casesMarek Olšák2014-08-191-1/+4
| | | | | | | Recommended by hw people. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set PARTIAL_VS_WAVE(0) when appropriateMarek Olšák2014-08-191-1/+6
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set IA_MULTI_VGT_PARAM on SI the same as on CIK (v2)Marek Olšák2014-08-192-46/+50
| | | | | | | Nothing's changed for CIK here. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: simplify si_num_banks functionMarek Olšák2014-08-193-15/+13
| | | | | | This makes it easier to use. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use r600_draw_rectangle from r600gMarek Olšák2014-08-199-75/+77
| | | | | | Rectangles are easier than triangles for the rasterizer. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: save scissor state and sample mask for u_blitterMarek Olšák2014-08-193-8/+29
| | | | | Cc: [email protected] Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't set CB_SHADER_MASK=1 if there are no color outputsMarek Olšák2014-08-191-4/+0
| | | | | | This hack isn't needed anymore because of the previous u_blitter commit. Reviewed-by: Michel Dänzer <[email protected]>
* gallium/u_blitter: don't use an empty fragment shader if there's a colorbufferMarek Olšák2014-08-191-1/+1
| | | | | | This is custom code used by some drivers. Reviewed-by: Roland Scheidegger <[email protected]>
* gallium/util: handle PIPE_BUFFER in util_pipe_tex_to_tgsi_texMarek Olšák2014-08-191-0/+3
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: only add textures to the listMarek Olšák2014-08-191-2/+5
| | | | | | rbug-gui cannot display buffers, so it's pointless to add them. Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: fix a crash in sampler_view_destroy caused by incorrect contextMarek Olšák2014-08-191-1/+1
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: send the actual number of layers to the clientMarek Olšák2014-08-191-1/+4
| | | | | | This sends the correct value for array textures. Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: implement streamout context functionsMarek Olšák2014-08-191-0/+46
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: fix crash in set_vertex_buffersMarek Olšák2014-08-191-1/+1
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: remove contexts from the list properlyMarek Olšák2014-08-191-1/+3
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* ilo: fold drm_intel_get_aperture_sizes() within probe_winsys()Emil Velikov2014-08-194-15/+15
| | | | | | | | | ... and store the value in intel_winsys_info/ilo_dev_info. Suggested-by: Chia-I Wu <[email protected]> Signed-off-by: Emil Velikov <[email protected]> olv: check for errors and report raw values
* i965/cfg: Add a foreach_block_and_inst_safe macro.Matt Turner2014-08-181-0/+4
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/cfg: Add a foreach_inst_in_block_safe macro.Matt Turner2014-08-181-0/+8
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/cfg: Add a foreach_block_safe macro.Matt Turner2014-08-181-0/+3
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Pass a cfg pointer to generate_{code,assembly}.Matt Turner2014-08-1810-41/+39
| | | | | | | The loop over all instructions is now two-fold, over all of the blocks and all of the instructions in each block. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Add and use foreach_block macro.Matt Turner2014-08-1814-143/+119
| | | | | Use this as an opportunity to rename 'block_num' to 'num'. block->num is clear, and block->block_num has always been redundant.
* i965/cfg: Embed link in bblock_t for main block list.Matt Turner2014-08-182-5/+7
| | | | | | | | The next patch adds a foreach_block (block, cfg) macro, which works better if it provides a direct bblock_t pointer, rather than a bblock_link pointer that you have to use to find the actual block. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Optimize gl_FrontFacing calculation on Gen4/5.Matt Turner2014-08-181-5/+16
| | | | | | Doesn't use fewer instructions, but it does avoid writing the flag register and if we want to switch the representation of true for Gen4/5 in the future, we can just delete the AND instruction.
* i965/fs: Optimize gl_FrontFacing calculation on Gen6+.Matt Turner2014-08-181-6/+15
| | | | | | | total instructions in shared programs: 4288650 -> 4282838 (-0.14%) instructions in affected programs: 595018 -> 589206 (-0.98%) Reviewed-by: Anuj Phogat <[email protected]>
* i965: Use ~0 to represent true on Gen >= 6.Matt Turner2014-08-184-34/+102
| | | | | | | total instructions in shared programs: 4292303 -> 4288650 (-0.09%) instructions in affected programs: 299670 -> 296017 (-1.22%) Reviewed-by: Anuj Phogat <[email protected]>
* i965/fs: Optimize emit_bool_to_cond_code for logical exprs.Matt Turner2014-08-181-54/+87
| | | | | | | | | AND, OR, and XOR can generate the conditional code directly. total instructions in shared programs: 4293335 -> 4292303 (-0.02%) instructions in affected programs: 121408 -> 120376 (-0.85%) Reviewed-by: Anuj Phogat <[email protected]>
* i965: Use UniformBooleanTrue value for boolean literal true.Matt Turner2014-08-182-2/+6
| | | | Reviewed-by: Anuj Phogat <[email protected]>
* glsl: Use UniformBooleanTrue value for uniform initializers.Matt Turner2014-08-188-34/+52
| | | | Reviewed-by: Anuj Phogat <[email protected]>
* mesa: Upload boolean uniforms using UniformBooleanTrue.Matt Turner2014-08-181-2/+2
| | | | Reviewed-by: Anuj Phogat <[email protected]>
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