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* radeon/uvd: add UVD implementation v5Christian König2013-04-1115-21/+1924
* radeon/winsys: add uvd ring support to winsys v3Christian König2013-04-113-0/+31
* st/mesa: fix UBO offsets.Dave Airlie2013-04-111-0/+1
* egl/x11: Fix initialisation of swap_intervalRalf Jung2013-04-101-2/+2
* intel: Fall back to X-tiling when larger than estimated aperture size.Kenneth Graunke2013-04-101-2/+26
* intel: Refactor code in intel_miptree_choose_tiling().Kenneth Graunke2013-04-101-4/+6
* intel: Move the max_gtt_map_object_size estimation to intel_context.Kenneth Graunke2013-04-103-18/+20
* r600g: Add support for GL_ARB_texture_buffer_rangeFredrik Höglund2013-04-113-5/+11
* i965/blorp: Remove unnecessary test in gen7_blorp_emit_depth_stencil_config.Paul Berry2013-04-101-7/+5
* r600g: fix valgrind warning on CaymanMarek Olšák2013-04-101-1/+1
* gallivm/tgsi: handle untyped movesZack Rusin2013-04-102-0/+10
* gallivm: fix loops and conditionals within GSZack Rusin2013-04-102-19/+105
* llvmpipe: implement PIPE_QUERY_SO_STATISTICSZack Rusin2013-04-102-0/+21
* gallivm: fix unsigned divide and remainder opcodesZack Rusin2013-04-101-4/+33
* gallivm: fix breakcZack Rusin2013-04-101-12/+14
* intel/hsw: Enable hiz (v2)Chad Versace2013-04-102-2/+51
* i965: Remove brw_context::depthstencil::hiz_mtChad Versace2013-04-102-3/+0
* intel: Replace checks for hiz_mt with intel_has*hiz()Chad Versace2013-04-108-40/+36
* i965: Change signature of brw_get_depthstencil_tile_masks()Chad Versace2013-04-104-3/+16
* i965/blorp: Add fields brw_blorp_mip_info::level,layerChad Versace2013-04-102-0/+15
* intel: Add field intel_mipmap_slice::has_hizChad Versace2013-04-104-2/+44
* i965/blorp: Align rectangle primitive for hiz opsChad Versace2013-04-101-0/+29
* i965/vs: Use GRFs for pull constant offsets on gen7.Eric Anholt2013-04-106-22/+56
* i965/vs: When asked to make a dst_reg for a src.xxxx, just write to src.x.Eric Anholt2013-04-101-1/+8
* i965/gen6: Reduce updates of transform feedback offsets with HW contexts.Eric Anholt2013-04-101-1/+1
* i965/gen7: Skip resetting SOL offsets at batch start with HW contexts.Eric Anholt2013-04-102-6/+21
* radeonsi: remove sampler writemask v3Christian König2013-04-102-13/+8
* pipe-loader: Fix out of source buildNiels Ole Salscheider2013-04-101-2/+2
* st/mesa: remove #if FEATURE_GL/ES testsBrian Paul2013-04-091-7/+0
* mesa: remove old comment about FEATURE_GLBrian Paul2013-04-091-2/+1
* mesa: remove #ifdef FEATURE_ES2, add some comments insteadBrian Paul2013-04-091-2/+9
* st/mesa: remove #include mfeatures.hBrian Paul2013-04-0924-24/+0
* st/osmesa: re-use buffers in OSMesaMakeCurrent()Brian Paul2013-04-091-7/+54
* mesa: update derived framebuffer state in GetMultisamplefvMarek Olšák2013-04-101-0/+5
* mesa: fix glGet queries depending on derived framebuffer state (v2)Marek Olšák2013-04-102-7/+26
* i965/gen7.5: Allow HW primitive restart for all primitive types.Paul Berry2013-04-091-7/+6
* i965: Only use brw_draw.c's trim() function when necessary.Paul Berry2013-04-091-2/+14
* i965/vs: Fix DEBUG_SHADER_TIME when VS terminates with 2 URB writes.Paul Berry2013-04-091-4/+2
* st/vdpau: fix subtitle related bug v2Christian König2013-04-091-0/+4
* glsl/linker: Reduce scope of non-flat integer varying fix.Paul Berry2013-04-091-4/+3
* glsl/linker: Adapt flat varying handling in preparation for geometry shaders.Paul Berry2013-04-091-10/+20
* glsl: Document lower_packed_varyings' "flat" requirement with an assert.Paul Berry2013-04-091-0/+8
* glsl/linker: fix varying packing for non-flat integer varyings.Paul Berry2013-04-091-0/+19
* glsl: Check the size of ir_print_visitor's mode[] array with STATIC_ASSERT.Paul Berry2013-04-092-1/+3
* glsl: Fix ir_print_visitor's handling of interpolation qualifiers.Paul Berry2013-04-092-2/+5
* softpipe: misc updates to image dumping in softpipe_flush()Brian Paul2013-04-091-3/+4
* tgsi: Ensure struct tgsi_ind_register field Index is initialized.Vinson Lee2013-04-081-0/+1
* r600g: Fix UMAD on CaymanMartin Andersson2013-04-091-13/+32
* intel: Remove the texture_tiling driconf option.Kenneth Graunke2013-04-084-11/+1
* i965: Prefer Y-tiling on Gen6+.Kenneth Graunke2013-04-081-1/+1
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