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| * nir/glsl: Propagate invariant into NIR alu opsJason Ekstrand2016-03-231-0/+3
| * glsl/rebalance_tree: Don't handle invariant or precise treesJason Ekstrand2016-03-231-0/+16
| * glsl/opt_algebraic: Don't handle invariant or precise treesJason Ekstrand2016-03-231-0/+19
| * glsl: Add a pass to propagate the "invariant" and "precise" qualifiersJason Ekstrand2016-03-234-0/+128
| * nir/alu_to_scalar: Propagate the "exact" bitJason Ekstrand2016-03-231-0/+1
| * i965/peephole_ffma: Don't fuse exact addsJason Ekstrand2016-03-231-1/+3
| * nir/cse: Properly handle nir_ssa_def.exactJason Ekstrand2016-03-231-2/+14
| * nir/algebraic: Flag inexact optimizationsJason Ekstrand2016-03-231-59/+62
| * nir/algebraic: Fix fmin detection to match the specJason Ekstrand2016-03-231-1/+1
| * nir/algebraic: Get rid of an invlid fxor optimizationJason Ekstrand2016-03-231-1/+0
| * nir/algebraic: Allow for flagging operations as being inexactJason Ekstrand2016-03-234-2/+26
| * nir/search: Propagate exactness into newly created expressionsJason Ekstrand2016-03-231-4/+5
| * nir/builder: Add a flag for setting exactJason Ekstrand2016-03-231-0/+9
| * nir: Add an "exact" bit to nir_alu_instrJason Ekstrand2016-03-233-0/+14
| * nir/clone: Export nir_variable_cloneJason Ekstrand2016-03-232-4/+13
| * nir/clone: Expose nir_constant_cloneJason Ekstrand2016-03-232-4/+5
| * nir: Fix whitespaceJason Ekstrand2016-03-231-1/+1
| * compiler/glsl: allow sequence op as a const expr in gles 1.0Lars Hamre2016-03-231-1/+3
| * radeonsi: fix out-of-bounds indexing of shader imagesNicolai Hähnle2016-03-231-1/+43
| * radeonsi: cache flush/invalidation for missing PIPE_BARRIER_*_BUFFER bits (v2)Nicolai Hähnle2016-03-231-2/+12
| * st/mesa: add missing MemoryBarrier bits and some explanationsNicolai Hähnle2016-03-231-1/+24
| * gallium: add PIPE_BARRIER_STREAMOUT_BUFFERNicolai Hähnle2016-03-231-0/+1
| * radeonsi: fix 2D array MSAA failures since image support landedMarek Olšák2016-03-231-1/+2
| * i965/fs: Don't constant-fold RCPJason Ekstrand2016-03-221-15/+0
| * i965: Remove the RCP+RSQ algebraic optimizationsJason Ekstrand2016-03-222-22/+0
| * nir: Don't abs slt and friendsIan Romanick2016-03-221-0/+4
| * nir: Don't abs the result of b2f or b2iIan Romanick2016-03-221-0/+2
| * nir: Simplify 0 < fabs(a)Ian Romanick2016-03-221-0/+6
| * nir: Simplify 0 >= b2f(a)Ian Romanick2016-03-221-0/+7
| * nir: Simplify i2b with negated or abs operandIan Romanick2016-03-221-0/+2
| * nir: Lower flrp with Boolean interpolator to bcselIan Romanick2016-03-221-2/+5
| * i965: Have NIR lower flrp on pre-GEN6 vec4 backendIan Romanick2016-03-221-2/+26
| * swrast: fix discarded const warning in s_texture.cBrian Paul2016-03-221-1/+1
| * i965: fix invalid memory writeMarc-André Lureau2016-03-211-1/+1
| * tgsi: drop unused set_exec/kill_mask interfaces.Dave Airlie2016-03-223-37/+0
| * st/mesa: add support for internalformat query2.Dave Airlie2016-03-222-10/+45
| * i965: Fix assert conditions for src/dst x/y offsetsAnuj Phogat2016-03-211-3/+3
| * swrast: Move assert for 'slice' in to check_map_teximageAnuj Phogat2016-03-211-1/+1
| * r600/sb: Do not distribute neg in expr_handler::fold_assoc() when folding mul...xavier2016-03-221-2/+6
| * nvc0: make sure to delete samplers used by compute shadersSamuel Pitoiset2016-03-211-1/+1
| * i965/blorp: Make BlitFramebuffer() do sRGB encoding in ES 3.x.Kenneth Graunke2016-03-211-1/+4
| * i965/blorp: Refactor sRGB encoding/decoding.Kenneth Graunke2016-03-214-11/+23
| * meta: Make BlitFramebuffer() do sRGB encoding in ES 3.x.Kenneth Graunke2016-03-213-9/+43
| * radeonsi: Set PIPE_SHADER_CAP_MAX_SHADER_IMAGESEdward O'Callaghan2016-03-211-1/+2
| * radeonsi: disable early Z if the fragment shader writes to memoryNicolai Hähnle2016-03-211-2/+12
| * tgsi/scan: add writes_memory to flag presence of stores or atomicsNicolai Hähnle2016-03-212-4/+9
| * radeonsi: force the DCC enable bit off in image descriptors for writing (v2)Nicolai Hähnle2016-03-211-8/+49
| * radeonsi: implement MemoryBarrier (v2)Nicolai Hähnle2016-03-211-0/+37
| * radeonsi: implement volatile memory accessNicolai Hähnle2016-03-211-0/+4
| * radeonsi: implement coherent memory access (v2)Nicolai Hähnle2016-03-211-4/+13
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