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* anv/memcpy: Use addresses instead of bo+offsetJason Ekstrand2018-09-143-35/+34
* anv/so_memcpy: Use the correct SO_BUFFER size on gen8+Jason Ekstrand2018-09-141-1/+1
* ac: fix get_image_coords() for radeonsiTimothy Arceri2018-09-151-1/+2
* gallium/util: don't let child processes inherit our thread affinityMarek Olšák2018-09-141-4/+32
* gallium/util: start with a random L3 cache index for AMD ZenMarek Olšák2018-09-141-4/+16
* st/mesa: Validate the result of pipe_transfer_map in make_texture (v2)Josh Pieper2018-09-141-8/+12
* radv: emit the initial config only once in the preamblesSamuel Pitoiset2018-09-144-50/+48
* radv: fix setting global locations for indirect descriptorsSamuel Pitoiset2018-09-141-1/+0
* radv: fix flushing indirect descriptorsSamuel Pitoiset2018-09-141-3/+9
* radv: fix GPU hangs with 32-bit indirect descriptorsSamuel Pitoiset2018-09-141-3/+5
* radv: handle loc->indirect correctly for the first descriptorSamuel Pitoiset2018-09-142-11/+10
* radv: bump the maximum number of arguments to 64Samuel Pitoiset2018-09-141-1/+1
* radv: tidy up ac_setup_rings() for the GSVS ringsSamuel Pitoiset2018-09-141-13/+34
* radv: fix setting the number of entries for GSVS on VI+Samuel Pitoiset2018-09-141-3/+0
* radv: always compute the number of components from the output maskSamuel Pitoiset2018-09-141-12/+2
* radv: emit data contiguously in the GS->VS ring bufferSamuel Pitoiset2018-09-141-16/+12
* radv: make use of the output usage mask in GS copy shaderSamuel Pitoiset2018-09-141-0/+3
* radv: improve a comment in si_emit_set_predication_state()Samuel Pitoiset2018-09-141-8/+6
* radv: fix VK_EXT_conditional_rendering visibilitySamuel Pitoiset2018-09-141-4/+12
* radv: make use of ac_unpack_param() instead of ac_build_bfe()Samuel Pitoiset2018-09-141-15/+6
* nir: add loop unroll support for complex wrapper loopsTimothy Arceri2018-09-141-37/+76
* nir: propagates if condition evaluation down some alu chainsTimothy Arceri2018-09-141-0/+128
* nir: evaluate if condition uses inside the if branchesTimothy Arceri2018-09-142-0/+138
* virgl: adjust strides when mapping temp-resourcesErik Faye-Lund2018-09-141-0/+2
* nvir: Always split 64-bit IMAD/IMUL operationsPierre Moreau2018-09-131-1/+1
* st/vdpau: Use output buffer as back buffer with 24-bit color onlyLeo Liu2018-09-131-1/+2
* vl/dri: add color depth to vl winsysLeo Liu2018-09-132-0/+2
* vl/dri3: add support for 10 bits formatLeo Liu2018-09-131-4/+25
* vl/dri: add 10 bits format supportsLeo Liu2018-09-132-10/+65
* egl/android: Declare droid_load_driver() staticKristian H. Kristensen2018-09-131-1/+1
* radv: fix function names for VK_EXT_conditional_renderingSamuel Pitoiset2018-09-131-2/+2
* anv: Silence a couple compiler warningsJason Ekstrand2018-09-122-3/+2
* loader/dri3: Don't wait for fence of old buffer when re-allocating itMichel Dänzer2018-09-121-1/+0
* loader/dri3: Only wait for back buffer fences in dri3_get_bufferMichel Dänzer2018-09-121-1/+3
* glsl/linker: Check the invariance of built-in special variablesVadym Shovkoplias2018-09-121-0/+66
* intel/tools: fix initial position of window in aubinator viewerTapani Pälli2018-09-121-4/+17
* winsys/virgl: avoid unintended behaviorErik Faye-Lund2018-09-121-1/+1
* radv: adjust ESGS ring buffer size computation on VI+Samuel Pitoiset2018-09-111-1/+5
* mesa/texture: Also check for LA texture when querying intensity component sizeGert Wollny2018-09-111-0/+5
* nv50,nvc0: warn on not-explicitly-handled capsIlia Mirkin2018-09-112-14/+26
* mesa: remove duplicate dispatch sanity testsTimothy Arceri2018-09-111-265/+0
* mesa: tidy up init_matrix_stack()Timothy Arceri2018-09-111-7/+3
* radeon: fix ColorMaskChristopher Egert2018-09-102-8/+8
* gallium: Correctly handle no config context creationElie Tournier2018-09-103-2/+13
* radv: Support v3 of VK_EXT_vertex_attribute_divisor.Bas Nieuwenhuizen2018-09-102-1/+8
* radeonsi/nir: port some bindless and sampler code from TGSIMarek Olšák2018-09-101-30/+50
* radeonsi: adjust and simplify max_alloc_size determinationMarek Olšák2018-09-102-11/+13
* radeonsi: split si_copy_bufferMarek Olšák2018-09-105-17/+33
* radeonsi: don't call VBO prefetch with size=0Marek Olšák2018-09-101-1/+1
* radeonsi: merge SI and CI dma_clear_buffer and remove the callbackMarek Olšák2018-09-108-90/+66
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