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* freedreno: update generated headersRob Clark2018-08-179-27/+32
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix srgbRob Clark2018-08-171-7/+13
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix dEQP-GLES3.functional.fence_sync.*Rob Clark2018-08-171-0/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* radv/winsys: fix creating the BO list for virtual buffersSamuel Pitoiset2018-08-171-1/+1
| | | | | | | | | | | | | | When the number of unique BO is 0, we optimize the list creation by copying all buffers of the current CS directly into it. But this is only valid if the CS doesn't have virtual buffers, otherwise they are not added and hw might report VM faults. This fixes VM faults with: dEQP-VK.sparse_resources.image_sparse_binding.2d.rgba8ui.1024_128_1 CC: <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* freedreno: Add a6xx backendKristian H. Kristensen2018-08-1638-17/+6368
| | | | | | | | | | This adds a freedreno backend for the a6xx generation GPUs, which at the time of this commit is about 98% GLES2 conformant. Much remains to be done - both performance work and feature work towards more recent GLES versions, but this is a good start. Signed-off-by: Kristian H. Kristensen <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-08-167-66/+4928
| | | | | | pull in a6xx registers Signed-off-by: Rob Clark <[email protected]>
* freedreno: Fix warningsKristian H. Kristensen2018-08-165-15/+9
| | | | | Signed-off-by: Kristian H. Kristensen <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* svga: simplify Mesa version stringEric Engestrom2018-08-161-1/+1
| | | | | | Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* bin: always define MESA_GIT_SHA1 to make it directly usable in codeEric Engestrom2018-08-165-25/+5
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* git_sha1: simplify logicEric Engestrom2018-08-163-3/+2
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: drop unused assignmentEric Engestrom2018-08-161-2/+0
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: drop cast-to-void of used variableEric Engestrom2018-08-161-1/+0
| | | | | | | `device` is used 2 lines below, even visible in the diff context printed. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: use safer snprintf() to ensure NULL string-terminatorEric Engestrom2018-08-161-1/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/batch-decoder: replace local ARRAY_LENGTH() macro with global ARRAY_SIZE()Eric Engestrom2018-08-161-3/+2
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: various python cleanupsEric Engestrom2018-08-165-26/+21
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl: check for buffer overflow *before* corrupting our memoryEric Engestrom2018-08-161-4/+15
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl/wayland: remove sign from bitfield `formats`Eric Engestrom2018-08-162-6/+6
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl: some spelling fixesEric Engestrom2018-08-161-5/+5
| | | | Signed-off-by: Eric Engestrom <[email protected]>
* radv: initialize the DCC predicate correctly when it's compressedSamuel Pitoiset2018-08-161-1/+4
| | | | | | | | | | We have to do a fast-clear eliminate when clearing DCC metadata with 0x20202020. I don't know if that fixes anything but that seems correct to me. CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: fix missing initialization of the conditional rendering stateSamuel Pitoiset2018-08-161-0/+1
| | | | | | | | | | | | | | This was missing when VK_EXT_conditional_rendering has been implemented. The predication type should be -1 to avoid restoring previous state when performing a decompression pass with DCC enabled. Note that we don't have to handle secondary command buffers because we don't support this feature currently. CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Revert divisor = 0 case for vertex attribute extension.Bas Nieuwenhuizen2018-08-161-1/+1
| | | | | | | | | | Seems like DXVK depends on that and it might get reverted upstream. Since apps are not supposed to use 0 in v2 anyway, we should be safe implementing the old behavior there. Fixes: 66e12451ac4 "radv: Update to new VK_EXT_vertex_attribute_divisor to version 2." CC: 18.2 <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Possible on-demand compilation fix.Bas Nieuwenhuizen2018-08-161-0/+8
| | | | | | | | | | Seems that in a single case we use the renderpass before checking the pipeline, so check the renderpass before we use it. Fixes: fbcd1673144 "radv: Add on-demand compilation of built-in shaders." Tested-by: Timothy Arceri <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* mesa/st: fix array indices off-by-one error in remappingGert Wollny2018-08-162-6/+6
| | | | | | | | | | | | | | | When moving the array sizes from the old list to the new one it was not taken into account that the array indices start with one, but the array_size array started at index zero, which resulted in incorrect array sizes when arrays were merged. Correct this by copying the array_size values of the retained arrays with an offset of -1. Also fix whitespaces for the replaced lines. Fixes: d8c2119f9b0b257a23ceb398f6d0d78da916417e mesa/st/glsl_to_tgsi: Expose array live range tracking and merging Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* meson: fix build for egl platform_x11 without dri3 and gbmAlexander Tsoy2018-08-151-1/+1
| | | | | | | | | | | | | | | | Compiling EGL's platform_x11 without dri3 and gbm yields this compile failure: platform_x11 needs inc_loader: ../mesa-18.2.0-rc2/src/egl/drivers/dri2/platform_x11.c:48:10: fatal error: loader.h: No such file or directory #include "loader.h" ^~~~~~~~~~ Fixes: 108d257a1685 ("meson: build libEGL") Bugzilla: https://bugs.gentoo.org/663534 Reviewed-by: Matt Turner <[email protected]>
* Revert "intel/nir: Call nir_lower_io_to_scalar_early"Jason Ekstrand2018-08-151-12/+5
| | | | | | | | | | | | | Commit 4434591bf56a6b0 caused substantially more URB messages in geometry and tessellation shaders. Before we can really enable this sort of optimization, We either need some way of combining them back together into vectors or we need to do cross-stage vector element elimination without splitting everything into scalars. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107510 Fixes: 4434591bf56a6 "intel/nir: Call nir_lower_io_to_scalar_early" Acked-by: Kenneth Graunke <[email protected]> Tested-by: Mark Janes <[email protected]>
* i965: do not emit empty surface stateErik Faye-Lund2018-08-151-0/+5
| | | | | | | | | | | | | | If called with an empty size, brw_emit_buffer_surface_state asserts. We already have a dedicated helper for uploading nothing, so let's use that instead. Avoids an assert in dEQP-GLES31.functional.shaders.opaque_type_indexing.ssbo.const_literal_vertex when running a debug build of i965. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/ppgtt: 4096 replaced by PAGE_SIZESergii Romantsov2018-08-151-6/+6
| | | | | | | Usage of number 4096 replaced by PAGE_SIZE. Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/ppgtt: memory address alignmentSergii Romantsov2018-08-151-4/+3
| | | | | | | | | | | | | | | | | | Kernel (for ppgtt) requires memory address to be aligned to page size (4096). -v2: added marking that also fixes initial commit 01058a552294. -v3: numbers replaced by PAGE_SIZE; buffer-object size is aligned instead of alignment of offsets (Chris Wilson). -v4: changes related to PAGE_SIZE moved to separate commit -v5: restored alignment to page-size for 0-size. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106997 Fixes: a363bb2cd0e2 (i965: Allocate VMA in userspace for full-PPGTT systems.) Fixes: 01058a552294 (i965: Add virtual memory allocator infrastructure to brw_bufmgr.) Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* radv: add Doom workaroundTimothy Arceri2018-08-161-0/+3
| | | | | | Cc: <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* i965: Emitting 3DSTATE_SO_BUFFER of 0-size.Sergii Romantsov2018-08-151-4/+5
| | | | | | | Avoided filling of whole structure and bo-allocation if size of surface is 0. Signed-off-by: Sergii Romantsov <[email protected]>
* virgl: report actual max-texture sizesErik Faye-Lund2018-08-152-0/+10
| | | | | | | | Instead of doing conservative guesses, we should report the max levels based on the max sizes we get from GL on the host. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* virgl: do not use SP_MAX_TEXTURE_*_LEVELS definesErik Faye-Lund2018-08-151-7/+3
| | | | | | | | | | | | | These macro-names are also used for softpipe, so let's avoid confusion by avoiding them. Besides, they are just used in one place in virgl, so let's just inline them into the place they are used instead. While we're at it, fixup an error in the comment for the 3D version. Mesa subtracts computes max-size by doing by 2^(n-1), which means this should be 256 cubed, not 512 cubed. The other comments are correct. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* radv: disable the auto-waitcnt-before-barrier LLVM optionSamuel Pitoiset2018-08-153-1/+4
| | | | | | | | | | | | | | This option allows us to remove additional s_waitcnt instructions because s_barrier internally does s_waitcnt 0. Though, apparently there is a problem with LDS accesses that causes rendering issues with FFXV and DXVK. Disable this optimization for now (RadeonSI still uses it). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107460 CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: fix memory leaks in radv_load_meta_pipeline()Samuel Pitoiset2018-08-151-2/+3
| | | | | | | | Reported by Coverity. Fixes: fbcd167314 ("radv: Add on-demand compilation of built-in shaders.") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: drop wrong initialization of COMPUTE_RESOURCE_LIMITSSamuel Pitoiset2018-08-151-3/+1
| | | | | | | | | | | | The last parameter of radeon_set_sh_reg_seq() is the number of dwords to emit. We were lucky because WAVES_PER_SH(0x3) is 3 but it was initialized to 0. COMPUTE_RESOURCE_LIMITS is correctly set when generating compute pipelines, so we don't need to initialize it. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/meta_decompress: fix pointer to integer conversionMauro Rossi2018-08-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | VK_NULL_HANDLE replaces NULL to avoid following building error: external/mesa/src/amd/vulkan/radv_meta_decompress.c:365:54: error: incompatible pointer to integer conversion passing 'void *' to parameter of type 'VkShaderModule' (aka 'unsigned long long') [-Werror,-Wint-conversion] VkResult ret = create_pipeline(cmd_buffer->device, NULL, samples, ^~~~ prebuilts/clang/host/linux-x86/clang-4053586/lib64/clang/5.0.300080/include/stddef.h:105:16: note: expanded from macro 'NULL' # define NULL ((void*)0) ^~~~~~~~~~ external/mesa/src/amd/vulkan/radv_meta_decompress.c:97:32: note: passing argument to parameter 'vs_module_h' here VkShaderModule vs_module_h, ^ 1 error generated. Fixes: fbcd167314 ("radv: Add on-demand compilation of built-in shaders.") Signed-off-by: Mauro Rossi <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* egl/android: fix regression in drm_gralloc path (v2)Mauro Rossi2018-08-151-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a regression in mesa 18.2 and mesa-dev branches for HAVE_DRM_GRALLOC code path which is causing black screen on Android and prevents boot due to SIGSEGV MAPERR crash related to unproper handling of drm_gralloc drm FD in new droid_open_device() path. Problem is due to c7bb82136b ("egl/android: Add DRM node probing and filtering") To avoid the crash the former existing working droid_open_device() is restored, renamed droid_open_device_drm_gralloc() and kept within HAVE_DRM_GRALLOC braces. Tested with mesa-dev and mesa 18.2 branch and oreo-x86 bootanimation and Androdi GUI booting is fixed with i965, nouveau, radeon. The changes are compatible with gbm_gralloc, I've tested build with hwc too. (v2) remove indentation from HAVE_DRM_GRALLOC pre-processor directive NOTE: Definition of enum{} for GRALLOC_MODULE_PERFORM_GET_DRM_FD is not necessary and it's actually causing a redefinition building error, because in HAVE_DRM_GRALLOC path gralloc_drm.h is already exported by libgralloc_drm which is currently still a dependency. Fixes: c7bb82136b ("egl/android: Add DRM node probing and filtering") Cc: "18.2" <[email protected]> Signed-off-by: Mauro Rossi <[email protected]>
* mesa: shader dump/read support for ARB programsTapani Pälli2018-08-153-7/+31
| | | | | | Signed-off-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106283 Reviewed-by: Alejandro Piñeiro <[email protected]>
* glsl: Avoid calling get_array_element for scalar constantsDanylo Piliaiev2018-08-151-1/+1
| | | | | | | | | | | | | Accessing scalar constant as an array in function call or initializer list triggered assert in get_array_element. Examples: func(0[0]); vec2 t = { 0[0], 0 }; Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107550 Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* radeonsi: enable 1 missing PS_SU perf counter on PolarisMarek Olšák2018-08-141-1/+1
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* radeonsi: use radeon_info::nameMarek Olšák2018-08-143-40/+12
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* ac: add radeon_info::nameMarek Olšák2018-08-143-2/+12
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: split si_clear_buffer to remove enum si_methodMarek Olšák2018-08-146-53/+60
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: replace CP_DMA_USE_L2 with enum si_cache_policyMarek Olšák2018-08-142-26/+41
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: declare coher in si_copy_bufferMarek Olšák2018-08-141-8/+7
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: make PFP_SYNC_ME an explicit CP DMA flagMarek Olšák2018-08-141-17/+25
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: don't use emit_data->args in load_emitMarek Olšák2018-08-141-94/+37
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: don't use emit_data->args in store_emitMarek Olšák2018-08-141-92/+71
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: don't use emit_data->args in atomic_emitMarek Olšák2018-08-143-36/+47
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: don't use emit_data->args in build_interp_intrinsicMarek Olšák2018-08-141-19/+13
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
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