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* mesa/glsl: rename preprocess to glcpp_preprocessDave Airlie2012-09-157-7/+7
* glcpp: fix abuse of yylexDave Airlie2012-09-152-9/+1
* mesa: use a prefix for the program lexDave Airlie2012-09-152-1/+2
* meta: Refactor handling of GL_MULTISAMPLE.Paul Berry2012-09-143-36/+25
* _mesa_meta_GenerateMipmap: Generate separate shaders for glsl 120 / 130Anuj Phogat2012-09-141-20/+58
* _mesa_meta_GenerateMipmap: Support all texture targets by generating shaders ...Anuj Phogat2012-09-142-6/+74
* radeon/llvm: Support frint on SIChristian König2012-09-141-1/+3
* r600g: consolidate decompression code for the blitterMarek Olšák2012-09-141-29/+37
* r600g: do not require MSAA renderbuffer support if not asked forMarek Olšák2012-09-142-16/+4
* gallium/u_blitter: fix stencil-only blitsMarek Olšák2012-09-141-0/+15
* r300g: fix colormask with non-BGRA formatsMarek Olšák2012-09-144-31/+160
* r600g: reduce quant mode on evergreen+Alex Deucher2012-09-131-1/+1
* radeonsi: don't use a staging resource for large transfersMarek Olšák2012-09-131-10/+0
* r600g: don't use a staging resource for large transfersMarek Olšák2012-09-131-10/+0
* r600g: convert the remnants of VGT state into immediate register writes/atoms v4Marek Olšák2012-09-138-57/+65
* r600g: emit the primitive type and associated regs only if the type is changedMarek Olšák2012-09-135-48/+38
* r600g: add clip_misc_state for clip registers emitted in draw_vboMarek Olšák2012-09-138-22/+44
* r600g: fix computing how much space is needed for a draw commandMarek Olšák2012-09-132-6/+12
* r600g: fix the number of CS dwords of cb_misc_stateMarek Olšák2012-09-132-2/+2
* r600g: atomize clip stateMarek Olšák2012-09-136-148/+38
* r600g: atomize blend colorMarek Olšák2012-09-136-27/+25
* r600g: atomize viewport stateMarek Olšák2012-09-137-40/+28
* r600g: atomize stencil ref stateMarek Olšák2012-09-137-51/+56
* r600g: remove unused state ID definitionsMarek Olšák2012-09-131-8/+0
* r600g: initialize the first CS just like any other CSMarek Olšák2012-09-136-26/+24
* r600g: add support for geometry shader samplers and constant buffersMarek Olšák2012-09-135-1/+52
* r600g: put sampler states and views into an array indexed by shader typeMarek Olšák2012-09-136-72/+44
* r600g: do fine-grained sampler state updatesMarek Olšák2012-09-136-51/+110
* r600g: consolidate set_viewport_state functionsMarek Olšák2012-09-133-48/+24
* r600g: consolidate set_sampler_views functionsMarek Olšák2012-09-134-38/+17
* r600g: put constant buffer state into an array indexed by shader typeMarek Olšák2012-09-136-40/+33
* r600g: cleanup state function namesMarek Olšák2012-09-133-37/+37
* r600g: consolidate initialization of common state functionsMarek Olšák2012-09-135-150/+81
* r600g: simplify flushingMarek Olšák2012-09-1312-190/+210
* radeon/llvm: Fix lowering of vbuildTom Stellard2012-09-137-93/+19
* radeon/llvm: Support fmul on SITom Stellard2012-09-131-1/+4
* i965: Fix out-of-order sampler unit usage in ARB fragment programs.Kenneth Graunke2012-09-122-2/+5
* mesa: Add a _mesa_fls() function to find the last bit set in a word.Kenneth Graunke2012-09-121-0/+22
* i965/blorp: Fix offsets and width/height for stencil blits.Paul Berry2012-09-121-9/+37
* i965/blorp: Reduce alignment restrictions for stencil blits.Paul Berry2012-09-121-6/+17
* i965/blorp: don't reduce stencil alignment restrictions when multisampling.Paul Berry2012-09-121-9/+1
* intel: Add map_stencil_as_y_tiled to intel_region_get_aligned_offset.Paul Berry2012-09-128-13/+31
* intel: Add map_stencil_as_y_tiled to intel_region_get_tile_masks.Paul Berry2012-09-128-13/+21
* i965/blorp: Account for offsets when emitting SURFACE_STATE.Paul Berry2012-09-124-4/+48
* i965/blorp: Thread level and layer through brw_blorp_blit_miptrees().Paul Berry2012-09-123-6/+19
* i965/blorp: Don't create a dummy renderbuffer just to fetch image offsets.Paul Berry2012-09-121-8/+1
* i965/blorp: store x and y offsets in brw_blorp_mip_info.Paul Berry2012-09-124-28/+31
* i965/blorp: store surface width/height in brw_blorp_mip_info.Paul Berry2012-09-125-37/+48
* i965/blorp: Change gl_renderbuffer* params to intel_renderbuffer*.Paul Berry2012-09-121-28/+32
* i965/blorp: Clarify why width/height must be adjusted for Gen6 IMS surfaces.Paul Berry2012-09-122-1/+10
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