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* mesa: reimplement IROUND(), add F_TO_I()Brian Paul2012-05-191-21/+36
* mesa: fix Z32_FLOAT -> uint conversion functionsBrian Paul2012-05-191-2/+2
* st/mesa: remove unused pipe variableBrian Paul2012-05-191-1/+0
* svga: whitespace, comments, formatting clean-upsBrian Paul2012-05-191-38/+31
* st/mesa: added st_print_current_vertex_program(), for debuggingBrian Paul2012-05-192-0/+27
* svga: return PIPE_OK instead of 0Brian Paul2012-05-195-11/+11
* svga: fix zero-stride vertex array bugBrian Paul2012-05-191-2/+6
* mesa: add GLSL_REPORT_ERRORS debug flagBrian Paul2012-05-192-0/+15
* mesa: add some comments on shaderapi.c functionsBrian Paul2012-05-191-1/+14
* mesa: Remove undefinition of _P symbol.Vinson Lee2012-05-181-6/+0
* darwin: Address a build failure on Leopard and earlier OS versionsJeremy Huddleston2012-05-181-0/+10
* radeonsi: Only honour point related rasterizer state when rendering points.Michel Dänzer2012-05-181-2/+3
* radeonsi: Fix parameter cache offsets for fragment shader inputs.Michel Dänzer2012-05-183-2/+4
* gallium/tgsi/text: Ensure ret is initialized in parse_immediate_data.Vinson Lee2012-05-171-0/+4
* radeon/llvm: Fix segfault while lowering lrp intrinsicTom Stellard2012-05-171-2/+3
* radeon/llvm: Add DAG nodes for MIN instructionsTom Stellard2012-05-176-14/+38
* llvmpipe: Avoid adding floating point zero to flat inputs.José Fonseca2012-05-181-1/+4
* Fix fetching integer inputs.José Fonseca2012-05-181-0/+8
* llvmpipe: Implement TXQ.Olivier Galibert2012-05-187-6/+227
* llvmpipe: Don't mess with the provoking vertex when inverting a triangle.Olivier Galibert2012-05-181-5/+40
* radeon/llvm: Lower lrp intrinsic during ISelTom Stellard2012-05-173-7/+19
* radeon/llvm: Remove AMDIL MAD instruction defsTom Stellard2012-05-176-7/+14
* radeon/llvm: Remove AMDIL MUL_IEEE* instructionsTom Stellard2012-05-173-7/+3
* r600g: Handle MUL_IEEE in r600_bytecode_get_num_operandsTom Stellard2012-05-171-0/+2
* radeon/llvm: Expand fsub during ISelTom Stellard2012-05-172-11/+2
* radeon/llvm: Remove AMDIL floating-point ADD instruction defsTom Stellard2012-05-175-8/+9
* radeon/llvm: Remove AMDIL CMOVLOG* instruction defsTom Stellard2012-05-174-26/+6
* radeon/llvm: Move lowering of ABS_i32 to ISelTom Stellard2012-05-174-17/+16
* radeon/llvm: Remove sub patterns from AMDILInstrPatterns.tdTom Stellard2012-05-172-21/+1
* radeon/llvm: Add custom SDNodes for MAXTom Stellard2012-05-1710-10/+108
* state_tracker: remove sw_primitive_restart from st_contextJordan Justen2012-05-172-2/+0
* state_tracker: remove software handling of primitive restartJordan Justen2012-05-171-178/+2
* state_tracker: set PrimitiveRestartInSoftware if neededJordan Justen2012-05-171-0/+1
* vbo: use software primitive restart in the VBO moduleJordan Justen2012-05-171-6/+37
* mesa: add PrimitiveRestartInSoftware to gl_context.ConstJordan Justen2012-05-172-0/+8
* vbo: add software primitive restart supportJordan Justen2012-05-174-0/+241
* mesa: Check for framebuffer completeness before looking at the rb.Eric Anholt2012-05-171-6/+6
* mesa: Fix assertion failure when a cube face is not present.Eric Anholt2012-05-171-1/+2
* glsl: Drop the extra NULL specifiction on ir_assignment constructors.Eric Anholt2012-05-171-21/+14
* glsl: Fix assertion failure on handling switch on uint expressions.Eric Anholt2012-05-171-1/+1
* glsl: Reject non-scalar switch expressions.Eric Anholt2012-05-171-4/+2
* glsl: Let the constructor figure out the types of switch-related expressions.Eric Anholt2012-05-171-4/+1
* glsl: Fix indentation of switch code.Eric Anholt2012-05-171-282/+263
* i965/vs: Fix up swizzle for dereference_array of matrices.Eric Anholt2012-05-171-2/+2
* mesa: Throw error on glGetActiveUniform inside Begin/End.Eric Anholt2012-05-171-0/+2
* glsl: Improve the local dead code optimization to eliminate unused channels.Eric Anholt2012-05-171-23/+126
* i965/fs: Do more register coalescing by using the interference graph.Eric Anholt2012-05-172-0/+62
* nouveau: place static buffers in VRAM if preferred by the driverChristoph Bumiller2012-05-176-12/+62
* nv50/ir: fix reversed order of lane ops in quadopsChristoph Bumiller2012-05-172-4/+6
* nv50,nvc0: handle user vertex buffersChristoph Bumiller2012-05-1714-308/+423
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