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* nv50/ir/nir: implement load/store_globalKarol Herbst2019-07-101-0/+36
* nv50/ir/nir: handle kernel inputsKarol Herbst2019-07-101-3/+18
* nv50/ir/nir: don't assert on !mainKarol Herbst2019-07-101-2/+0
* nv50/ir/nir: parse system values first and stop for compute shadersKarol Herbst2019-07-101-29/+32
* nir/lower_io: Don't use variable to get deref modeConnor Abbott2019-07-101-2/+3
* radv: Don't optimize after lowering FS inputsConnor Abbott2019-07-101-1/+0
* android: amd/addrlib: add gfx10 supportMauro Rossi2019-07-101-0/+1
* android: amd/common/gfx10: add register JSONMauro Rossi2019-07-101-8/+26
* android: radeonsi/gfx10: generate gfx10_format_table.h (v2)Mauro Rossi2019-07-101-0/+16
* android: virgl: remove unnecessary LOCAL_C_INCLUDESChih-Wei Huang2019-07-102-4/+0
* android: vulkan/util: fix generating vk_enum_to_str.*Chih-Wei Huang2019-07-101-2/+4
* android: radv: import include paths from used librariesChih-Wei Huang2019-07-101-11/+5
* android: anv: import include path of libmesa_nirChih-Wei Huang2019-07-101-18/+18
* android: anv: eliminate libmesa_anv_entrypointsChih-Wei Huang2019-07-101-62/+20
* android: vulkan/util: fix export pathChih-Wei Huang2019-07-103-4/+1
* android: radv: fix improper use of LOCAL_WHOLE_STATIC_LIBRARIESChih-Wei Huang2019-07-101-2/+3
* android: anv: fix improper use of LOCAL_WHOLE_STATIC_LIBRARIESChih-Wei Huang2019-07-101-9/+9
* android: radv: remove unused LOCAL_EXPORT_C_INCLUDE_DIRSChih-Wei Huang2019-07-101-4/+0
* android: anv: remove unused LOCAL_EXPORT_C_INCLUDE_DIRSChih-Wei Huang2019-07-101-2/+0
* nir/loop_analyze: Pass nir_const_values directly to helpersJason Ekstrand2019-07-101-13/+10
* nir/loop_analyze: Properly handle swizzles in loop conditionsJason Ekstrand2019-07-101-140/+149
* nir/loop_analyze: Refactor detection of limit varsJason Ekstrand2019-07-101-54/+51
* nir: Add some helpers for chasing SSA values properlyJason Ekstrand2019-07-101-0/+80
* nir/loop_analyze: Bail if we encounter swizzlesJason Ekstrand2019-07-101-0/+22
* nir/loop_analyze: Use new eval_const_* helpers in test_iterationsJason Ekstrand2019-07-101-6/+4
* nir/loop_analyze: Handle bit sizes correctly in calculate_iterationsJason Ekstrand2019-07-101-27/+48
* nir/loop_analyze: Fix phi-of-identical-alu detectionJason Ekstrand2019-07-101-26/+29
* nir/instr_set: Expose nir_instrs_equal()Jason Ekstrand2019-07-102-59/+62
* nir/builder: Use nir_const_value_for_* for constructing immediatesJason Ekstrand2019-07-101-102/+50
* nir: Refactor nir_src_as_* constant functionsJason Ekstrand2019-07-102-101/+28
* nir: Add more helpers for working with const valuesJason Ekstrand2019-07-102-0/+135
* virgl: remove virgl_transfer_queue_listsChia-I Wu2019-07-092-36/+13
* virgl: simplify virgl_transfer_queue_extendChia-I Wu2019-07-091-34/+5
* virgl: remove transfer after transfer_writeChia-I Wu2019-07-091-2/+1
* virgl: improve virgl_transfer_queue_is_queuedChia-I Wu2019-07-091-30/+21
* virgl: fix transfers_intersect for mipmapsChia-I Wu2019-07-091-7/+2
* virgl: fix some false positives in transfers_overlapChia-I Wu2019-07-091-27/+86
* radeonsi/gfx10: enable primitive binning by defaultMarek Olšák2019-07-091-5/+7
* radeonsi/gfx10: implement primitive binningMarek Olšák2019-07-092-8/+127
* radeonsi: simplify primitive binning enablementMarek Olšák2019-07-091-4/+4
* radeonsi: set primitive binning tunables for dGPUsMarek Olšák2019-07-091-6/+11
* radeonsi: set FLUSH_ON_BINNING_TRANSITION when neededMarek Olšák2019-07-093-3/+15
* radeonsi/gfx10: use the new scan converter when binning is disabledMarek Olšák2019-07-093-4/+38
* radeonsi/gfx9: fix an oversight in primitive binning codeMarek Olšák2019-07-091-1/+1
* radeonsi: use BREAK_BATCH instead of FLUSH_DFSM when CB_TARGET_MASK changesMarek Olšák2019-07-091-2/+2
* radeonsi/gfx10: don't expose unimplemented PIPE_CAP_QUERY_SO_OVERFLOWMarek Olšák2019-07-091-1/+3
* radeonsi/gfx10: launch 2 compute waves per CU before going onto the next CUMarek Olšák2019-07-091-2/+9
* radeonsi/gfx10: set more registers and fieldsMarek Olšák2019-07-092-4/+26
* radeonsi/gfx10: enable LATE_ALLOC_GSMarek Olšák2019-07-091-6/+23
* radeonsi/gfx10: set HS/GS/CS.WGP_MODEMarek Olšák2019-07-092-0/+4
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 12:17:48 +0000