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* mesa: Inherit texture view multi-sample information from the original ↵Henri Verbeet2018-04-123-14/+26
| | | | | | | | | | | | | | | texture images. Found running "The Witness" in Wine. Without this patch, texture views created on multi-sample textures would have a GL_TEXTURE_SAMPLES of 0. All things considered such views actually work surprisingly well, but when combined with (plain) multi-sample textures in a framebuffer object, the resulting FBO is incomplete because the sample counts don't match. CC: <[email protected]> Signed-off-by: Henri Verbeet <[email protected]> Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit 0b73c86b8030a7f7cb35fc85c83eff7f2b8c24a4)
* nir: fix per_vertex_output intrinsicRob Clark2018-04-121-1/+1
| | | | | | | | | | This is supposed to have both BASE and COMPONENT but num_indices was inadvertantly set to 1. Cc: <[email protected]> Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit cc3a88e81dbceb12b79eb4ebe7a4ce5ba97fc291)
* i965/vec4: Fix null destination register in 3-source instructionsIan Romanick2018-04-122-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | A recent commit (see below) triggered some cases where conditional modifier propagation and dead code elimination would cause a MAD instruction like the following to be generated: mad.l.f0 null, ... Matt pointed out that fs_visitor::fixup_3src_null_dest() fixes cases like this in the scalar backend. This commit basically ports that code to the vec4 backend. NOTE: I have sent a couple tests to the piglit list that reproduce this bug *without* the commit mentioned below. This commit fixes those tests. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]> Tested-by: Tapani Pälli <[email protected]> Cc: [email protected] Fixes: ee63933a7 ("nir: Distribute binary operations with constants into bcsel") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105704 (cherry picked from commit 91225cb33f0baede872114bd416084b3b52937a1)
* meson/configure: detect endian.h instead of trying to guess when it's availableEric Engestrom2018-04-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cc: Maxin B. John <[email protected]> Cc: Khem Raj <[email protected]> Cc: Rob Herring <[email protected]> Suggested-by: Jon Turney <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Cc: <[email protected]> (cherry picked from commit cbee1bfb34274668a05995b9d4c78ddec9e5ea4c) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <[email protected]> Conflicts: meson.build Squashed with: configure: use AC_CHECK_HEADERS to check for endian.h The currently we use the singular CHECK_HEADER combined with explicit append to the DEFINES variable. That is a legacy misnomer, since it requires us to add $DEFINES to every piece that we build. Using the plural version of the helper sets the HAVE_ macro for us, plus ensures it's passed to the compiler - if config.h is available in there (not in the case of mesa) otherwise on the command line. In hindsight, we should replace all the AC_CHECK_{FUNC,HEADER} instances with the plural version (or even the _ONCE suffixed version) and drop the DEFINES hacks. Fixes: cbee1bfb342 ("meson/configure: detect endian.h instead of trying to guess when it's available") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105717 Signed-off-by: Emil Velikov <[email protected]> Acked-by: Eric Engestrom <[email protected]> Tested-by: Clayton Craft <[email protected]> (cherry picked from commit 5a75019ad0270a974788a9b8648ba98ff4203768)
* radeon/vce: move feedback command inside of destroy functionLeo Liu2018-04-123-9/+12
| | | | | | | | | | | | | | | | | | On the CI family, firmware requires the destory command have to be the last command in the IB, moving feedback command after destroy is causing issues on CI cards, so we have to keep the previous logic that moves destroy back to the last command. But as the original issue fixed previously, with the newer family like Vega10, feedback command have to be included inside of the task info command along with destroy command. Fixes: 6d74cb25("radeon/vce: move destroy command before feedback command") Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]> Cc: [email protected] (cherry picked from commit c4de2f0880cfa49bd6fd3138564ee64ef4e637a1)
* st/nine: Fix non inversible matrix checkAxel Davy2018-04-121-1/+1
| | | | | | | | | | | | | | There was a missing absolute value when checking if the determinant was big enough. Fixes: https://github.com/iXit/Mesa-3D/issues/292 Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]> Tested-by: Dieter Nützel <[email protected]> CC: "17.3 18.0" <[email protected]> (cherry picked from commit dbc24835d75466951a44b391b42e39461a6ac5a2)
* st/nine: Fixes warning about implicit conversionAxel Davy2018-04-121-1/+1
| | | | | | | | | | | | | Makes the conversion explicit. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=102542 Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]> Tested-by: Dieter Nützel <[email protected]> CC: "17.3 18.0" <[email protected]> (cherry picked from commit f61e9a958bd8d61cb7ca575ca987caefc6edbffd)
* st/nine: Fix bad tracking of vs textures for NINESBT_ALLAxel Davy2018-04-121-1/+1
| | | | | | | | | | | | | | | | | Stateblocks with NINESBT_ALL should track all textures. For better performance they have a faster path which copies all the required. This path was only tracking ps textures. Fixes: https://github.com/iXit/Mesa-3D/issues/303 Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Patrick Rudolph <[email protected]> Tested-by: Dieter Nützel <[email protected]> CC: "17.3 18.0" <[email protected]> (cherry picked from commit 71eae7940ef7fa92e01cdc9afa1172f92d4b489e)
* radeonsi: prevent a negative buffer offset in si_upload_descriptorsMarek Olšák2018-03-201-4/+3
| | | | (cherry picked from commit 16856a1ee86f364212674dddf154caa374310a6b)
* radeonsi: fix vertex buffer address computation with full 64-bit addressesMarek Olšák2018-03-201-3/+3
| | | | (cherry picked from commit 2a47660754ba49d5998929550f639677506c4515)
* mesa: add glsl version query (v4)Vadym Shovkoplias2018-03-206-0/+104
| | | | | | | | | | | | | | | | | | | | | | Add support for GL_NUM_SHADING_LANGUAGE_VERSIONS and glGetStringi for GL_SHADING_LANGUAGE_VERSION v2: - Combine similar functionality into _mesa_get_shading_language_version() function. - Change GLSL version return mechanism. v3: - Add return of empty string for GLSL ver 1.10. - Move _mesa_get_shading_language_version() function to src/mesa/main/version.c. v4: - Add OpenGL version check. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104915 Signed-off-by: Andriy Khulap <[email protected]> Signed-off-by: Vadym Shovkoplias <[email protected]> Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit a553c54abf92533daf442073dd3408c35f57d8ba)
* i965: Silence compiler warning about promoted_constants.Eric Anholt2018-03-201-1/+1
| | | | | | | | | We only have a cfg != NULL if we went through one of the paths that set it, but my compiler doesn't figure that out. Reviewed-by: Lionel Landwerlin <[email protected]> Fixes: 6411defdcd6f ("intel/cs: Re-run final NIR optimizations for each SIMD size") (cherry picked from commit d25640c3a3b914059abd661f0651d88b4fe408e8)
* radv: mark all tess output for an indirect access.Dave Airlie2018-03-201-8/+13
| | | | | | | | | | | | | | | | | If a shader does a tcs store with an indirect access, we were only marking the first spot as used. For indirect access we always now mark all slots used by the variable. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464 Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.) Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit 27a5e5366e89498d98d786cc84fafbdb220c4d94) Emil Velikov: move hunks {radv,ac}_nir_to_llvm.c] Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/amd/vulkan/radv_nir_to_llvm.c
* ac/nir: pass the nir variable through tcs loading.Dave Airlie2018-03-203-22/+15
| | | | | | | | | | | | | | | | | | | | I was going to have to add another parameter to this monster, so we should just pass the nir_variable in, I can't find any reason this would be a bad idea. This needed for the next fix. Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit 4f0c89d66c570e82d832e2e49227517302e271a2) [Emil Velikov: move hunk {radv,ac}_nir_to_llvm.c] Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/amd/common/ac_nir_to_llvm.c src/amd/common/ac_shader_abi.h src/amd/vulkan/radv_nir_to_llvm.c
* radv: get correct offset into LDS for indexed vars.Dave Airlie2018-03-201-1/+1
| | | | | | | | | | | | | | | | | | This seems more correct to me, since if we have an array of floats they'll be vec4 aligned, and if we do af[2], we want the const index to increase by 2 slots in the non compact case. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464 Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit f9de2d409bf4f068a99d358d592d96ab4803f7fb) [Emil Velikov: hunk belongs to another file {radv,ac}_nir_to_llvm.c] Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/amd/vulkan/radv_nir_to_llvm.c
* i965: Emit texture cache invalidates around blorp_copyJason Ekstrand2018-03-201-0/+15
| | | | | | | | | | | | This is a terrible hack but it fixes CTS regressions. It's still incredibly unclear exactly what is going wrong in the hardware to cause this to be an issue so this isn't a good fix by any means. However, it does fix tests so there is that. Fixes: fb0e9b5197 "i965: Track the depth and render caches separately" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103746 Acked-by: Kenneth Graunke <[email protected]> (cherry picked from commit 8379bff6c4456f8a77041eee225dcd44e5e00a76)
* meson: Add moduledir to d3d.pcDylan Baker2018-03-201-0/+1
| | | | | | | | | | | This is required to build wine with the nine patchset Fixes: 6b4c7047d57178d3362a710ad503057c6a582ca3 ("meson: build gallium nine state_tracker") Reported-by: Mike Lothian <[email protected]> Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit b7c6870f87acafd592629d1c3127b54e52689f02)
* mesa: Don't write to user buffer in glGetTexParameterIuiv on errorIan Romanick2018-03-201-26/+2
| | | | | | | | | | | | | | | | | | | | | | | | With some sets of optimization flags, GCC will generate warnings like this: src/mesa/main/texparam.c:2327:27: warning: ‘*((void *)&ip+12)’ may be used uninitialized in this function [-Wmaybe-uninitialized] params[3] = ip[3]; ~~^~~ src/mesa/main/texparam.c:2320:16: note: ‘*((void *)&ip+12)’ was declared here GLint ip[4]; ^~ ip is not initialized in cases where a GL error is generated. In these cases, we should *not* write to the user's buffer, so this is actually a bug. I wrote a new piglit test gl-3.0-texparameteri to show this bug. I suspect that Coverity also detected this, but the scan site is currently down. Fixes: c2c507786 "main: Added entry points for glGetTextureParameteriv, Iiv, and Iuiv." Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit def0030e64dd3a4eb3487dd40bf64b9a71a70af3)
* st/dri: fix OpenGL-OpenCL interop for GL_TEXTURE_BUFFERMarek Olšák2018-03-201-24/+34
| | | | | | | | | Tested by our OpenCL team. Fixes: 9c499e6759b26c5e "st/mesa: don't invoke st_finalize_texture & st_convert_sampler for TBOs" Acked-by: Alex Deucher <[email protected]> (cherry picked from commit db495b8962909f74e90b9eb0463fb37f37ac5f62)
* autotools: include all meson.build filesDylan Baker2018-03-201-0/+2
| | | | | | | | | | | Otherwise SWR cannot be built with meson from an autotools generated tarball, such as the 18.0.0-rc4 tarball. Fixes: 16bf81383080 ("meson/swr: re-shuffle generated files") Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: George Kyriazis <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit 7258be91c59b20a6479b3b0d750ff8b4a32cf032)
* radv: Fix copying from 3D images starting at non-zero depth.Bas Nieuwenhuizen2018-03-201-0/+3
| | | | | | Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit eea20d59abd304953c8c1591612d45d3d94eb785)
* swr/rast: Fix macOS macro.Vinson Lee2018-03-201-2/+2
| | | | | | | | Fixes: a25093de7188 ("swr/rast: Implement JIT shader caching to disk") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-By: George Kyriazis <[email protected]> (cherry picked from commit bb742b6ebf2d8c8dcc77f69b44995be2971e116a)
* i965: Fix RELOC_WRITE typo in brw_store_data_imm64()Andriy Khulap2018-03-201-1/+1
| | | | | | | | | | | Fixes: 6c530ad11605 ("i965: Reduce passing 2x32b of reloc_domains to 2 bits") Signed-off-by: Andriy Khulap <[email protected]> Signed-off-by: Vadym Shovkoplias <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 7859701920adc7f25696a05ae4715a4694109e1d)
* i965/sbe: fix number of inputs for active componentsIago Toral Quiroga2018-03-201-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In 16631ca30ea6 we fixed gen9 active components to account for padded inputs in the URB, which we can have with SSO programs. To do that, instead of going through the bitfield of inputs (which doesn't include padding information), we compute the number of inputs from the size of the URB entry. Unfortunately, there are some special inputs that are not stored in the URB and that we also need to account for. These special inputs are identified and handled during calculate_attr_overrides(). Instead of keeping track of the exact number of inputs, we just program active components for all possible inputs like we do in anvil. This fixes a regression in a WebGL program that uses Point Sprite functionality (specifically, VARYING_SLOT_PNTC). v2: - Add 'Fixes' tag (Mark Janes) - make no_vue_inputs int instead of uint32_t, and add const qualifier to num_inputs variable (Ian) v3: - Do not try to count inputs correctly, just program all input slots like we do in anvil (Ken) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105224 Fixes: 16631ca30ea6 (i965/sbe: fix active components for SSO programs with over 16 inputs) Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit bc73016703f8f2815e000f1c100532cf6e13cd3c)
* radv: Implement waiting on non-submitted fences.Bas Nieuwenhuizen2018-03-201-2/+11
| | | | | | Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit 6968d782d3063c639e80dbcf6df944902d72692f)
* radv: Implement WaitForFences with !waitAll.Bas Nieuwenhuizen2018-03-201-5/+15
| | | | | | | | | | | Nothing to do except using a busy wait loop. At least for old kernels. A better implementation for newer kernels to come later. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105255 Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit 2a404c6f923880cfd0bc04f9db1890cadce8bd92)
* ac/nir: don't apply slice rounding on txf_msDave Airlie2018-03-201-1/+1
| | | | | | | | | | | | | | | | | This matches the tgsi code. Fixes arb_texture_multisample texelFetch piglit tests. Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Fixes: f4e499ec7914 (radv: add initial non-conformant radv vulkan driver) Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit 69495b30a38fbb01a937cdea6f7674f89a2e60e7) [Emil Velikov: trivial conflicts] Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/amd/common/ac_nir_to_llvm.c
* glsl: Fix memory leak with known glsl_type instancesSimon Hausmann2018-03-202-87/+47
| | | | | | | | | | | | | | | | | | | When looking up known glsl_type instances in the various hash tables, we end up leaking the key instances used for the lookup, as the glsl_type constructor allocates memory on the global mem_ctx. This patch changes glsl_type to manage its own memory, which fixes the leak and also allows getting rid of the global mem_ctx and its mutex. v2: remove lambda usage (Tapani) (+keep ASSERT_BITFIELD_SIZE, modify dummy ctor to initialize mem_ctx) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104884 Cc: [email protected] Signed-off-by: Simon Hausmann <[email protected]> Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit fb5825e7ceeb16ac05f870ffe1e5a5daa09e68dd)
* intel/compiler: Memory fence commit must always be enabled for gen10+Anuj Phogat2018-03-201-1/+3
| | | | | | | | | | | | | Commit bit in the message descriptor (Bit 13) must be always set to true in CNL+ for memory fence messages. It also fixes a piglit GPU hang on cnl+ in simulation environment. Piglit test: arb_shader_image_load_store-shader-mem-barrier See HSD ES # 1404612949 Signed-off-by: Anuj Phogat <[email protected]> Cc: [email protected] Reviewed-by: Francisco Jerez <[email protected]> (cherry picked from commit 56dc9f9f49638e0769d6bc696ff7f5dafccec9fc)
* radv: do not set pending_reset_query in BeginCommandBuffer()Samuel Pitoiset2018-03-201-7/+0
| | | | | | | | | | | | | | This is just useless for two reasons: 1) flush_bits is not set accordingly, so nothing will be flushed in BeginQuery(). 2) we always flush caches in EndCommandBuffer(), so if a reset is done in a previous command buffer we are safe. Cc: "18.0" <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Alex Smith <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit c133a3411bbf47c2ba7d9cdae7e35a64fe276068)
* r600/cayman: fix fragcood loading recip generation.Dave Airlie2018-03-201-1/+1
| | | | | | | | | This fixes some hangs seen where the recip_ieee opcodes would end up split across the wrong slots. Cc: <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit bf2af063c3ac1ef7b948ddfb203aea04f857fc0f)
* intel/fs: Set up sampler message headers in the visitor on gen7+Jason Ekstrand2018-03-202-22/+39
| | | | | | | | | | | | | | | This gives the scheduler visibility into the headers which should improve scheduling. More importantly, however, it lets the scheduler know that the header gets written. As-is, the scheduler thinks that a texture instruction only reads it's payload and is unaware that it may write to the first register so it may reorder it with respect to a read from that register. This is causing issues in a couple of Dota 2 vertex shaders. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104923 Cc: [email protected] Reviewed-by: Francisco Jerez <[email protected]> (cherry picked from commit ff4726077d86800d33520581f154a27dac408588)
* Revert "mesa: do not trigger _NEW_TEXTURE_STATE in glActiveTexture()"Samuel Pitoiset2018-03-201-0/+13
| | | | | | | | | | | | | | | | | This reverts commit f314a532fdc7af8381586144d2631d9968331f05. This appears to introduce some blinking textures in UT2004. Not sure exactly what's the root cause because we don't have much information about the issue. Anyway, this was just a micro optimization that actually breaks, at least, one app almost one year later. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105436 Cc: <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit f02f1ad13fa4123986d17a5d04b0e2831c3a7091)
* radv: Fix CmdCopyImage between uncompressed and compressed imagesAlex Smith2018-03-201-6/+17
| | | | | | | | | | | | | | | | | | From the spec: "When copying between compressed and uncompressed formats the extent members represent the texel dimensions of the source image and not the destination." However, as per 7b890a36, we must still use the destination image type when clamping the extent so that we copy the correct number of layers for 2D to 3D copies. Fixes: 7b890a36 "radv: Fix vkCmdCopyImage for 2d slices into 3d Images" Cc: <[email protected]> Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit fcf267ba087dd00c48ceaf9277424dac079f9319)
* radv: Increase the number of dynamic uniform buffers.Bas Nieuwenhuizen2018-03-202-3/+5
| | | | | | | | | | | | | | The vulkan API is not ideal as it does not allow us have a shared limit. Feral needs 15+6 for one of their games, and I'm not a fan of overcommitting the limits, so increase the number of dynamic uniform buffers to 16. CC: <[email protected]> CC: Alex Smith <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit 997306c031327b7e034e617736c868d6d21919eb)
* r600: implement callstack workaround for evergreen.Dave Airlie2018-03-201-8/+31
| | | | | | | | | | | | | | | | | | | | | This is ported from the sb backend, there are some issues with evergreen stacks on the boundary between entries and ALU_PUSH_BEFORE instructions. Whenever we are going to use a push before, we check the stack usage and if we have to use the workaround, then we switch to a separate push. I noticed this problem dealing with some of the soft fp64 shaders, in nosb mode, they are quite stack happy. This fixes all the glitches and inconsistencies I've seen with them Reviewed-by: Roland Scheidegger <[email protected]> Tested-by: Elie Tournier <[email protected]> Cc: <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit 5d4fbc2b54cb2aaea1cbb52ec087f31009f3ac76)
* intel/vulkan: Hard code CS scratch_ids_per_subslice for CherryviewJordan Justen2018-03-201-17/+28
| | | | | | | | | | | Ken suggested that we might be underallocating scratch space on HD 400. Allocating scratch space as though there was actually 8 EUs seems to help with a GPU hang seen on synmark CSDof. Cc: <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 24b415270ffeef873ba4772d1b3c7c185c9b1958)
* i965: Hard code CS scratch_ids_per_subslice for CherryviewJordan Justen2018-03-201-17/+27
| | | | | | | | | | | | | | Ken suggested that we might be underallocating scratch space on HD 400. Allocating scratch space as though there was actually 8 EUs seems to help with a GPU hang seen on synmark CSDof. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104636 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105290 Cc: <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Eero Tamminen <[email protected]> (cherry picked from commit 06e3bd02c01e499332a9c02b40f506df9695bced)
* radeonsi: add a workaround for GFX9 hang with init_config alignmentMarek Olšák2018-03-201-1/+2
| | | | | | Fixes: 75c5d25f0f34cd702 "radeonsi: align command buffer starting address to fix some Raven hangs" Cc: 17.3 18.0 <[email protected]> (cherry picked from commit 2bdb54bce77828ef20b730ad869b66c5889b5347)
* radeonsi: align command buffer starting address to fix some Raven hangsMarek Olšák2018-03-205-5/+27
| | | | | | | | | | | | Cc: 17.3 18.0 <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> (cherry picked from commit 75c5d25f0f34cd70246ee1b0b77a75ec82dfcecb) [Emil Velikov: remove uvd_enc hunk - missing in branch] Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/amd/common/ac_gpu_info.c
* st/mesa: expose 0 shader binary formats for compat profiles for QtMarek Olšák2018-03-204-6/+14
| | | | | | | | Bugzilla: https://bugreports.qt.io/browse/QTBUG-66420 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105065 Cc: "18.0" <[email protected]> Tested-by: Kai Wasserbäch <[email protected]> (cherry picked from commit 55376cb31e2f495a4d872b4ffce2135c3365b873)
* radv: make sure to emit cache flushes before starting a querySamuel Pitoiset2018-03-203-7/+33
| | | | | | | | | | | | If the query pool has been previously resetted using the compute shader path. Fixes: a41e2e9cf5 ("radv: allow to use a compute shader for resetting the query pool") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105292 Cc: "18.0" <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit c956d0f4069cf39d8d3c57ebed8d905575e9ea34)
* swr/rast: Fix index buffer overfetch issue for non-indexed drawsGeorge Kyriazis2018-03-201-0/+15
| | | | | | | | | | | | Populate pLastIndex, even for the non-indexed case. An zero pLastIndex can cause the index offsets inside the fetcher to have non-sensical values that can be either very large positive or very large negative numbers. cc: "18.0" <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]> (cherry picked from commit 539de78633c45598e0b1e3b7763ea318f9200c32) [George Kyriazis: patch is a backport for 18.0 of the cherry-pick above]
* glsl/linker: fix bug when checking precision qualifierSamuel Iglesias Gonsálvez2018-03-201-8/+3
| | | | | | | | | | | | | | | | According to GLSL ES 3.2 spec, see table in 9.2.1 "Linked Shaders" section, the precision qualifier should match for uniform variables. This also applies to previous GLSL ES 3.x specs. This 'if' checks the condition for uniform variables, while for UBOs it is checked in link_interface_blocks.cpp. Fixes: b50b82b8a553 ("glsl/es31: precision qualifier doesn't need to match in shader interface block members") Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> (cherry picked from commit e207b2e2c8dea99972e744c8fdfa0b9a9481ea5e)
* r600: partly revert disabling tiling for 1d texture.Dave Airlie2018-03-201-0/+5
| | | | | | | | | | | | | Previously we had a check for 1d of narrow 2D textures, however narrow 2d textures caused gpu hangs, but it was correct for 1d textures. This fixes a bunch of 1D image piglits for me. Fixes: 7b8e1c089d (r600/texture: drop lowering 1d/2d images to linear.) Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit a5853a33332d51382cae42397f353817e47cccc9)
* nir: fix interger divide by zero crash during constant foldingTimothy Arceri2018-03-201-2/+2
| | | | | | | | | | | | | From the GLSL 4.60 spec Section 5.9 (Expressions): "Dividing by zero does not cause an exception but does result in an unspecified value." Fixes: 89285e4d47a6 "nir: add new constant folding infrastructure" Reviewed-by: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105271 (cherry picked from commit 0c1f37cc2d8555223ade73b244a3ee374be8d9cd)
* meson: fix building without GLDylan Baker2018-03-201-9/+10
| | | | | | | | | | | | | | | | | libgl will be undefined _glx, so move that check inside the `if with_glx != 'disabled'` block. v2: - Simplify commit message (Eric, Emil) Fixes: 5c460337fd9c109 ("meson: Fix GL and EGL pkg-config files with glvnd") Reported-by: Jason Ekstrand <[email protected]> Signed-off-by: Dylan Baker <[email protected]> CC: Daniel Stone <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Untested-by: Jason Ekstrand <[email protected]> Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit b9636fe38aea6af1d3a30528da89069fc390b6a0)
* r600: fix tgsi clock last settingDave Airlie2018-03-201-0/+1
| | | | | | | | On cayman this was hitting an assert later, which probably wasn't see on non-cayman due to having the t slot. Fixes: 9041730d1 (r600: add support for ARB_shader_clock.) (cherry picked from commit 0cc5be7741aa77bd65046d627370c18839e0da25)
* meson: Fix GL and EGL pkg-config files with glvndDylan Baker2018-03-202-2/+21
| | | | | | | | | | | | | | Currently meson will generate a pkg-config that links to EGL_mesa (or GLX_mesa), but this isn't correct, it should always link to EGL or GL. Probably the "right" solution is to have glvnd itself provide the pkg config files for GL and EGL, but that also means that glvnd needs to provide many of the header files, which makes it a more involved job. Fixes: a47c525f3281a27 ("meson: build glx") Fixes: 035ec7a2bb2d5e4 ("meson: Add support for EGL glvnd") Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Daniel Stone <[email protected]> (cherry picked from commit 5c460337fd9c1096dea4bc569bd876a112ed6f16)
* egl/dri2: fix segfault when display initialisation failsFrank Binns2018-03-201-1/+1
| | | | | | | | | | | | | dri2_display_destroy() is called when platform specific display initialisation fails. However, this would typically lead to a segfault due to the dri2_egl_display vbtl not having been set up. Fixes: 2db95482964 ("loader_dri3/glx/egl: Optionally use a blit context for blitting operations") Signed-off-by: Frank Binns <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit 6160bf97db8bc493512795b1fa49c072a703df50)
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 15:37:15 +0000